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2 Commits

Author SHA1 Message Date
Alexey Lapshin
61a7342acd tools: add riscv zicsr/zifencei because they were separated from i 
https://groups.google.com/a/groups.riscv.org/g/sw-dev/c/aE1ZeHHCYf4
 2023-02-22 05:33:03 +00:00
Sudeep Mohanty
2ed15d8b1e ulp: Added ULP RISC-V support for esp32s3 
This commit adds support for ULP RISC-V for esp32s3.

Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
 2022-01-18 10:58:00 +05:30