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2 Commits

Author SHA1 Message Date
jack
24011ddd05 header files: modify rom code and soc header files 
1. timer reg file for both time group 0 and time group 1, not only timer group 0
2. fix bug that io mux header file mismatch with chip
3. fix bug that some BASE address not correct
4. add some static function to eagle.fpga32.rom.addr.v7.ld
5. add interrupts usage table
6. add some comments for rom code functions
 2016-09-12 17:47:49 +08:00
Wu Jian Gang
ec1869d43b add esp_intr.h 2016-08-26 19:06:38 +08:00