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3 Commits

Author SHA1 Message Date
Mahavir Jain
e0d29d4ada esp_system: create ld template to abstract few common settings 
PMS aware chips require prefetch padding size for instruction fetch, or
some memory alignment considerations. These settings are now exposed
through kconfig options (hidden) and used through common ld template.
This shall help to add and manage future chips support easily for
these considerations.

Closes IDF-3624
 2021-09-02 16:13:17 +08:00
Martin Vychodil
ce28af2dd4 System/memprot: ESP32C3 IRAM section alignment fix (LD) 
IRAM section didn't contain sufficient padding for possible CPU instruction prefetch,
ie instruction fetch could happen in DRAM section which is prohibited by the Memprot module.
This is fixed by adding 16B to the end of IRAM section in LD script (C3 CPU prefetch buffer depth is 4 words)

Closes IDF-3554

* fix
 2021-07-23 17:11:12 +02:00
Renz Bagaporo
b06dba7823 esp32: move app linker scripts 2021-07-16 20:14:27 +08:00