505 Commits

Author SHA1 Message Date
laokaiyao
6321c4c339
refactor(ecdsa): rely on efuse to get chip revision 2025-02-10 21:25:07 +05:30
Aditya Patwardhan
9b8a21d128
fix(soc): Fixed ECDSA register compatibility 2025-02-10 21:25:06 +05:30
Mahavir Jain
84d2a8818c
feat(ecc): enable ECC constant time mode for ESP32-H2 ECO5 2025-02-06 08:14:50 +05:30
Marius Vikhammer
0fc594154a Merge branch 'feature/efuse_update_for_esp32h2_eco5_v5.2' into 'release/v5.2'
feat(efuse): Adds efuses for esp32h2 eco5 (v5.2)

See merge request espressif/esp-idf!36246
2025-01-16 17:50:54 +08:00
laokaiyao
43ad52ee95 refactor(lpperi): improve compatibility solution 2025-01-15 20:42:44 +08:00
laokaiyao
be89694353 refactor(lpperi): compatible refactor for H2 ECO5 2025-01-15 20:42:44 +08:00
Jiang Jiang Jian
58001363d6 Merge branch 'fix/c61_h2_pmu_icg_csv_update_v5.2' into 'release/v5.2'
fix(pmu): h2 update pmu_icg_mapping.h (v5.2)

See merge request espressif/esp-idf!34798
2025-01-09 11:50:27 +08:00
Konstantin Kondrashov
c827c83fee feat(espefuse): Adds efuses for esp32h2 eco5
- Support efuses that are not present in the main efuse table
2025-01-08 12:18:34 +02:00
Michael (XIAO Xufeng)
b3b14bdf43 Merge branch 'bugfix/warn_rc32k_use_in_kconfig_v5.2' into 'release/v5.2'
fix(clk): add an inevitable kconfig option to be selected to use rc32k (v5.2)

See merge request espressif/esp-idf!35966
2025-01-07 15:49:51 +08:00
wanckl
c5a5c98660 fix(pmu): c61 and h2 update pmu_icg_mapping.h 2025-01-06 21:08:41 +08:00
C.S.M
5559c32a8e fix(bod): Improve esp32h2 brownout handling 2024-12-30 12:17:10 +08:00
Song Ruo Jing
47c9382cc2 fix(clk): add an inevitable kconfig option to be selected to use rc32k 2024-12-25 20:07:26 +08:00
Song Ruo Jing
54ca0cf944 fix(clk): rtc_clk_cpu_freq_set_xtal will always disable CPU's PLL
Align C6/H2 rtc_clk_cpu_freq_set_xtal behavior to other chips
2024-12-24 22:29:14 +08:00
Li Shuai
a87c6408ec
fix(esp_hw_support): fix the issue of regdma wait node to immediately return to done 2024-12-03 10:35:43 +08:00
Chen Jichang
d5cbc525e8 fix(parlio): fix spelling error in reg_base.h 2024-11-07 15:00:05 +08:00
Song Ruo Jing
707aebc607 feat(uart): support uart module sleep retention on c6/h2 2024-06-18 15:04:20 +08:00
Song Ruo Jing
373e585bb7 fix(gpio_etm): allow one GPIO binds to multiple ETM tasks 2024-04-24 16:01:34 +08:00
Song Ruo Jing
c55a07bf57 refactor(uart): add support to be able to test LP_UART port
Increase LP_UART_EMPTY_THRESH_DEFAULT value to 4. The original value
could cause the FIFO become empty before filling next data into the FIFO
when the buadrate is high. TX_DONE interrupt would raise before actual
transmission complete in such case.
2024-04-15 19:39:30 +08:00
harshal.patil
bd826801ba
fix(mbedtls/ecdsa): Fix dependant peripheral's enable and reset 2024-04-11 13:46:59 +05:30
Cao Sen Miao
2291ded9a1 fix(i2c): Use hardware fsm reset on esp32c6/h2/p4 2024-04-01 10:15:50 +08:00
Jiang Jiang Jian
2d818bbfe5 Merge branch 'docs/rf_coexistence_api_guides_support_esp32c2_v5.2' into 'release/v5.2'
Docs: RF coexistence api guides support esp32c2 (v5.2)

See merge request espressif/esp-idf!29213
2024-03-11 10:40:40 +08:00
Marius Vikhammer
9e5c30baff Merge branch 'bugfix/reset_reasons_v5.2' into 'release/v5.2'
Update reset reasons for C6, H2, P4 and C5 (v5.2)

See merge request espressif/esp-idf!29180
2024-03-08 09:42:36 +08:00
linruihao
3d5852131b fix(esp_coex): add support_coexistence soc_caps for esp32c2 and esp32h2 2024-02-23 16:15:45 +08:00
Marius Vikhammer
e930ff0b1f fix(system): update reset reasons for C6 and H2 2024-02-22 12:37:49 +08:00
Cao Sen Miao
4df78f9cff fix(temperature_sensor): Cannot switch the range smmothly on esp32h2 2024-02-21 18:51:29 +08:00
Jiang Jiang Jian
3c7c5829b7 Merge branch 'h2_auto_dbias_master_hsq_v5.2' into 'release/v5.2'
ESP32H2: Active & sleep dbias get from efuse to fix the voltage (v5.2)

See merge request espressif/esp-idf!28714
2024-02-21 10:49:16 +08:00
morris
81dc597d1f Merge branch 'bugfix/fix_incorrect_regbase_name_of_i2s_v5.2' into 'release/v5.2'
fix(i2s): fixed incorrect reg base name on C3 (v5.2)

See merge request espressif/esp-idf!28629
2024-02-18 11:29:42 +08:00
Mahavir Jain
e173895618 fix(soc): change debug addr range to CPU subsystem range
For C6/H2/P4/C5, there is no SoC specific debug range. Instead the same
address range is part of CPU Subsystem range which contains debug mode
specific code and interrupt config registers (CLINT, PLIC etc.).

For now the PMP entry is provided with RWX permission for both machine
and user mode but we can save this entry and allow the access to only
machine mode for this range.

For P4/C5 case, this PMP entry can have RW permission as the debug mode
specific code is not present in this memory range.
2024-01-29 13:57:04 +08:00
laokaiyao
66d7410051 fix(i2s): fixed incorrect reg base name on C3
Closes https://github.com/espressif/esp-idf/issues/12643
2024-01-26 18:44:38 +08:00
KonstantinKondrashov
bc6072c754 feat(efuse): Adds new efuse for esp32h2 2024-01-26 11:36:56 +08:00
Roshan Bangar
962b105be5 fix(nimble): Added periodic_adv_enh soc_caps for c2, h2 2023-12-26 10:09:12 +05:30
Jiang Jiang Jian
99d10ca3d2 Merge branch 'change/change_regdma_power_issue_macro_v5.2' into 'release/v5.2'
change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG (backport v5.2)

See merge request espressif/esp-idf!27992
2023-12-25 20:38:48 +08:00
Xu Si Yu
6b8740ae8d feat(ieee802154): add tx/rx report for IEEE802.15.4 debug 2023-12-21 15:01:44 +08:00
Lou Tianhao
7b5799830c change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG 2023-12-19 11:52:25 +08:00
Jiang Jiang Jian
6a34106488 Merge branch 'contrib/github_pr_12559_v5.2' into 'release/v5.2'
fix(spi): correct macro REG_SPI_BASE(i) for all targets (GitHub PR) (v5.2)

See merge request espressif/esp-idf!27708
2023-12-11 16:01:48 +08:00
morris
61bd19b446 Merge branch 'bugfix/fix_adc_cali_error_after_light_sleep_wake_on_h2_v5.2' into 'release/v5.2'
adc: fix calibration error when waking up from light sleep on H2 and enable test (v5.2)

See merge request espressif/esp-idf!27602
2023-12-07 14:29:55 +08:00
wanlei
572a66b62e fix(spi): correct some signals and dummy bits docs 2023-12-06 16:05:36 +08:00
TD-er
a4bfa19ebd fix(spi): Correct REG_SPI_BASE(i) macro for all targets
The existing formula can never match these registers.

Closes https://github.com/espressif/esp-idf/pull/12559
Closes https://github.com/espressif/esp-idf/pull/12562
2023-12-06 14:44:26 +08:00
harshal.patil
a168fde297
fix(soc/esp32h2): Fix llperi_rng_data field discrepancy 2023-12-05 21:08:33 +05:30
gaoxu
44f266693a fix(adc): restore cali registers after light sleep wake up on H2 and enable test 2023-12-04 12:03:49 +08:00
Song Ruo Jing
55ed548cc6 fix(console): enable to select UART1 port for console output
This feature was only enabled for esp32, esp32s2, esp32s3 previously.
Now, enabling this feature for all targets.
2023-11-30 11:26:09 +08:00
Mahavir Jain
d3b4acf7a0 fix(esp32h2): program use_hardware_k efuse bit for ECDSA key purpose
In ESP32-H2, the ECDSA peripheral by default uses the TRNG (hardware)
generated k value but it can be overridden to software supplied k.
This can happen through by overriding the `ECDSA_SOFTWARE_SET_K` bit
in the configuration register. Even though the HAL API is not exposed
for this but still it could be achieved by direct register
programming. And for this scenario, if sufficiently random k is not
supplied by the software then it could posses a security risk.

In this change, we are unconditionally programming the efuse
`ESP_EFUSE_ECDSA_FORCE_USE_HARDWARE_K` bit during startup security
checks itself. Additionally, same is ensured in the `esp_efuse_write_key`
API as well. This always enforces the hardware k mode in the ECDSA
peripheral and ensures strongest possible security.
2023-11-17 07:13:53 +00:00
wuzhenghui
4379d26f65
change(soc): rename SOC_CPU_WATCHPOINT_SIZE to SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 2023-11-16 20:23:57 +08:00
gaoxu
7f3221aa09 feat(adc_cali): Add ADC calibration support for ESP32H2 2023-11-06 10:57:36 +08:00
morris
80997d5860 fix(i2c): read write FIFO memory by volatile 2023-10-30 10:34:43 +08:00
Konstantin Kondrashov
a304cc230e Merge branch 'feature/esp32h2_adds_adc_calib_efuses' into 'master'
feat(efuse): Adds efuse ADC calibration data for ESP32H2

See merge request espressif/esp-idf!26305
2023-10-25 15:58:24 +08:00
Cao Sen Miao
8d639492f2 feat(i2c_slave): Add new implementation and API for I2C slave 2023-10-24 18:44:49 +08:00
wuzhenghui
6a436286dc feat(esp_hw_support): add api to gpio driver to support output internal clock on GPIO 2023-10-20 14:35:26 +08:00
Mahavir Jain
2407813a67 Merge branch 'feature/update_esp32c6-h2_apm_api' into 'master'
apm: updated APM HAL/LL APIs.

See merge request espressif/esp-idf!26368
2023-10-18 12:26:38 +08:00
Sachin Billore
c106f5caf6 apm: updated APM HAL/LL APIs. 2023-10-17 18:20:36 +05:30