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5 Commits

Author SHA1 Message Date
morris
ef00bd59dc esp_rom: extract int matrix route and cpu ticks getter 2022-02-09 13:52:20 +08:00
Jan Brudný
1e896e5def log: update copyright year 2021-04-18 23:53:48 +02:00
KonstantinKondrashov
dada7cd035 global: Uses CCOUNT API instead of XTHAL macro 2021-01-12 16:24:23 +08:00
Angus Gratton
420aef1ffe Updates for riscv support 
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
 2020-11-13 07:49:11 +11:00
Ivan Grokhotkov
676b5e0deb log: refactoring to make compatible with no-FreeRTOS builds 2019-11-22 11:41:35 +01:00