6 Commits

Author	SHA1	Message	Date
cjin	20ca1c0dfa	change(ble): added option for msys buffer source	2023-11-01 17:25:09 +08:00
cjin	926695b000	change: changed ble msys init for controller	2023-09-05 20:40:04 +08:00
Roshan Bangar	27dc6d95f6	NimBLE : Sync porting files	2023-06-07 13:03:53 +05:30
zwl	46127774fa	Unify controller internal error code on ESP32-C2	2022-12-09 15:23:44 +08:00
zwl	1732a6d044	Fixed memory leak when RAM free size is insufficient or setting ext scan parameters failed on ESP32-C2	2022-11-29 16:29:26 +08:00
GengYuchao	61ee34f713	Add new porting file	2022-06-20 17:00:12 +08:00