Merge branch 'bugfix/clang-atomics' into 'master'

newlib: provide missing atomic libcalls

Closes IDFGH-5896 and IDFGH-5897

See merge request espressif/esp-idf!15332

.gitlab/CODEOWNERS

@@ -161,6 +161,7 @@
 /examples/ethernet/           @esp-idf-codeowners/network
 /examples/get-started/        @esp-idf-codeowners/system
 /examples/mesh/               @esp-idf-codeowners/wifi
+/examples/network/            @esp-idf-codeowners/network @esp-idf-codeowners/wifi
 /examples/openthread/         @esp-idf-codeowners/ieee802154
 /examples/peripherals/        @esp-idf-codeowners/peripherals
 /examples/protocols/          @esp-idf-codeowners/network @esp-idf-codeowners/app-utilities
@@ -182,6 +183,7 @@
 /tools/cmake/                 @esp-idf-codeowners/build-config
 /tools/esp_prov/              @esp-idf-codeowners/app-utilities
 /tools/find_build_apps/       @esp-idf-codeowners/ci
+/tools/idf_size_yaml/         @esp-idf-codeowners/peripherals
 /tools/kconfig*/              @esp-idf-codeowners/build-config
 /tools/ldgen/                 @esp-idf-codeowners/build-config
 /tools/mass_mfg/              @esp-idf-codeowners/app-utilities
@@ -198,3 +200,11 @@
 /tools/unit-test-app/         @esp-idf-codeowners/system @esp-idf-codeowners/tools
 
 requirements.txt              @esp-idf-codeowners/tools
+
+# sort-order-reset
+
+^[Ignore Lists]
+/tools/ci/check_copyright_ignore.txt                    @esp-idf-codeowners/ci @esp-idf-codeowners/tools
+/tools/ci/check_examples_cmake_make-cmake_ignore.txt    @esp-idf-codeowners/ci @esp-idf-codeowners/tools
+/tools/ci/check_examples_cmake_make-make_ignore.txt     @esp-idf-codeowners/ci @esp-idf-codeowners/tools
+/tools/ci/mypy_ignore_list.txt                          @esp-idf-codeowners/ci @esp-idf-codeowners/tools

.gitlab/ci/target-test.yml

@@ -270,20 +270,17 @@ example_test_ESP32_SDSPI:
     - ESP32
     - UT_T1_SPIMODE
 
-# uncomment when ESP32S2 & ESP32C3 runners with external SD connected over SPI are available
-# ensure the runners have required tags created
-#
-#example_test_ESP32S2_SDSPI:
-#  extends: .example_test_esp32s2_template
-#  tags:
-#    - ESP32S2
-#    - UT_T1_SPIMODE
-#
-#example_test_ESP32C3_SDSPI:
-#  extends: .example_test_esp32c3_template
-#  tags:
-#    - ESP32C3
-#    - UT_T1_SPIMODE
+example_test_ESP32S2_SDSPI:
+  extends: .example_test_esp32s2_template
+  tags:
+    - ESP32S2
+    - UT_T1_SPIMODE
+
+example_test_ESP32C3_SDSPI:
+  extends: .example_test_esp32c3_template
+  tags:
+    - ESP32C3
+    - UT_T1_SPIMODE
 
 .test_app_template:
   extends: .target_test_job_template
@@ -306,6 +303,11 @@ example_test_ESP32_SDSPI:
     - .test_app_template
     - .rules:test:custom_test-esp32c3
 
+.test_app_esp32s3_template:
+  extends:
+    - .test_app_template
+    - .rules:test:custom_test-esp32s3
+
 test_app_test_001:
   extends: .test_app_esp32_template
   tags:
@@ -348,6 +350,24 @@ test_app_test_esp32_generic:
   variables:
     SETUP_TOOLS: "1"
 
+test_app_test_flash_psram_f4r4:
+  extends: .test_app_esp32s3_template
+  tags:
+    - ESP32S3
+    - MSPI_F4R4
+
+test_app_test_flash_psram_f4r8:
+  extends: .test_app_esp32s3_template
+  tags:
+    - ESP32S3
+    - MSPI_F4R8
+
+test_app_test_flash_psram_f8r8:
+  extends: .test_app_esp32s3_template
+  tags:
+    - ESP32S3
+    - MSPI_F8R8
+
 .component_ut_template:
   extends: .target_test_job_template
   variables:
@@ -644,6 +664,12 @@ UT_S2_SPI_DUAL:
     - ESP32S2_IDF
     - Example_SPI_Multi_device
 
+UT_S2_SDSPI:
+  extends: .unit_test_esp32s2_template
+  tags:
+    - ESP32S2_IDF
+    - UT_T1_SPIMODE
+
 UT_C3:
   extends: .unit_test_esp32c3_template
   parallel: 32
@@ -682,6 +708,12 @@ UT_C3_FLASH_SUSPEND:
     - ESP32C3_IDF
     - UT_T1_Flash_Suspend
 
+UT_C3_SDSPI:
+  extends: .unit_test_esp32c3_template
+  tags:
+    - ESP32C3_IDF
+    - UT_T1_SPIMODE
+
 UT_S3:
   extends: .unit_test_esp32s3_template
   parallel: 29

components/asio/port/include/esp_asio_config.h

@@ -18,6 +18,11 @@
 #  define ASIO_NO_TYPEID
 # endif   // CONFIG_COMPILER_RTTI
 
+//
+// Supress OpenSSL deprecation warning, when building ASIO
+//
+#define ESP_OPENSSL_SUPPRESS_LEGACY_WARNING
+
 //
 // LWIP compatibility inet and address macros/functions
 //

components/bootloader/Kconfig.projbuild

@@ -893,6 +893,8 @@ menu "Security features"
                 It is also possible to enable secure download mode at runtime by calling
                 esp_efuse_enable_rom_secure_download_mode()
 
+                Note: Secure Download mode is not available for ESP32 (includes revisions till ECO3).
+
         config SECURE_INSECURE_ALLOW_DL_MODE
             bool "UART ROM download mode (Enabled (not recommended))"
             help

components/bootloader/subproject/CMakeLists.txt

@@ -37,7 +37,7 @@ set(COMPONENTS
 # Make EXTRA_COMPONENT_DIRS variable to point to the bootloader_components directory
 # of the project being compiled
 set(PROJECT_EXTRA_COMPONENTS "${PROJECT_SOURCE_DIR}/bootloader_components")
-set(EXTRA_COMPONENT_DIRS "${PROJECT_EXTRA_COMPONENTS}" APPEND)
+list(APPEND EXTRA_COMPONENT_DIRS "${PROJECT_EXTRA_COMPONENTS}")
 
 # Consider each directory in project's bootloader_components as a component to be compiled
 file(GLOB proj_components RELATIVE ${PROJECT_EXTRA_COMPONENTS} ${PROJECT_EXTRA_COMPONENTS}/*)

components/bt/host/bluedroid/bta/dm/bta_dm_act.c

@@ -126,7 +126,7 @@ static void bta_dm_ctrl_features_rd_cmpl_cback(tBTM_STATUS result);
 #endif
 #endif
 #if (SMP_INCLUDED == TRUE)
-static void bta_dm_remove_sec_dev_entry(BD_ADDR remote_bd_addr);
+static BOOLEAN bta_dm_remove_sec_dev_entry(BD_ADDR remote_bd_addr);
 #endif  ///SMP_INCLUDED == TRUE
 #if (BLE_INCLUDED == TRUE)
 static void bta_dm_observe_results_cb(tBTM_INQ_RESULTS *p_inq, UINT8 *p_eir);
@@ -3069,7 +3069,9 @@ static UINT8 bta_dm_authentication_complete_cback(BD_ADDR bd_addr, DEV_CLASS dev
             bta_dm_cb.p_sec_cback(BTA_DM_AUTH_CMPL_EVT, &sec_event);
         }
 
-        bta_dm_remove_sec_dev_entry(bd_addr);
+        if (bta_dm_remove_sec_dev_entry(bd_addr)) {
+            return BTM_SEC_DEV_REC_REMOVED;
+        }
     }
 
     return BTM_SUCCESS;
@@ -3740,12 +3742,13 @@ static void bta_dm_delay_role_switch_cback(TIMER_LIST_ENT *p_tle)
 **                  remtoe device does not exist, else schedule for dev entry removal upon
                      ACL close
 **
-** Returns          void
+** Returns          TRUE if device entry is removed from Security device DB, FALSE otherwise
 **
 *******************************************************************************/
 #if (SMP_INCLUDED == TRUE)
-static void bta_dm_remove_sec_dev_entry(BD_ADDR remote_bd_addr)
+static BOOLEAN bta_dm_remove_sec_dev_entry(BD_ADDR remote_bd_addr)
 {
+    BOOLEAN is_device_deleted = FALSE;
     UINT16 index = 0;
     if ( BTM_IsAclConnectionUp(remote_bd_addr, BT_TRANSPORT_LE) ||
             BTM_IsAclConnectionUp(remote_bd_addr, BT_TRANSPORT_BR_EDR)) {
@@ -3763,7 +3766,7 @@ static void bta_dm_remove_sec_dev_entry(BD_ADDR remote_bd_addr)
             APPL_TRACE_ERROR(" %s Device does not exist in DB", __FUNCTION__);
         }
     } else {
-        BTM_SecDeleteDevice (remote_bd_addr, bta_dm_cb.device_list.peer_device[index].transport);
+        is_device_deleted = BTM_SecDeleteDevice (remote_bd_addr, bta_dm_cb.device_list.peer_device[index].transport);
 #if (BLE_INCLUDED == TRUE && GATTC_INCLUDED == TRUE)
         /* need to remove all pending background connection */
         BTA_GATTC_CancelOpen(0, remote_bd_addr, FALSE);
@@ -3771,6 +3774,7 @@ static void bta_dm_remove_sec_dev_entry(BD_ADDR remote_bd_addr)
         BTA_GATTC_Refresh(remote_bd_addr, false);
 #endif
     }
+    return is_device_deleted;
 }
 #endif  ///SMP_INCLUDED == TRUE
 

components/bt/host/bluedroid/btc/profile/std/a2dp/btc_a2dp_source.c

@@ -397,7 +397,7 @@ static UINT64 time_now_us(void)
 {
 #if _POSIX_TIMERS
     struct timespec ts_now;
-    clock_gettime(CLOCK_BOOTTIME, &ts_now);
+    clock_gettime(CLOCK_MONOTONIC, &ts_now);
     return ((UINT64)ts_now.tv_sec * 1000000L) + ((UINT64)ts_now.tv_nsec / 1000);
 #else
     struct timeval ts_now;

components/bt/host/bluedroid/stack/btm/btm_sec.c

@@ -2981,6 +2981,7 @@ void btm_sec_rmt_name_request_complete (UINT8 *p_bd_addr, UINT8 *p_bd_name, UINT
     int              i;
     DEV_CLASS        dev_class;
     UINT8            old_sec_state;
+    UINT8            res;
 
     BTM_TRACE_EVENT ("btm_sec_rmt_name_request_complete\n");
     if (((p_bd_addr == NULL) && !BTM_ACL_IS_CONNECTED(btm_cb.connecting_bda))
@@ -3161,9 +3162,12 @@ void btm_sec_rmt_name_request_complete (UINT8 *p_bd_addr, UINT8 *p_bd_name, UINT
         /* This is required when different entities receive link notification and auth complete */
         if (!(p_dev_rec->security_required & BTM_SEC_OUT_AUTHENTICATE)) {
             if (btm_cb.api.p_auth_complete_callback) {
-                (*btm_cb.api.p_auth_complete_callback) (p_dev_rec->bd_addr,
-                                                        p_dev_rec->dev_class,
-                                                        p_dev_rec->sec_bd_name, HCI_SUCCESS);
+                res = (*btm_cb.api.p_auth_complete_callback) (p_dev_rec->bd_addr,
+                                                              p_dev_rec->dev_class,
+                                                              p_dev_rec->sec_bd_name, HCI_SUCCESS);
+                if (res == BTM_SEC_DEV_REC_REMOVED) {
+                    p_dev_rec = NULL;
+                }
             }
 
         }
@@ -3853,6 +3857,7 @@ static void btm_sec_auth_collision (UINT16 handle)
 #if (SMP_INCLUDED == TRUE)
 void btm_sec_auth_complete (UINT16 handle, UINT8 status)
 {
+    UINT8 res;
     UINT8            old_sm4;
     tBTM_PAIRING_STATE  old_state   = btm_cb.pairing_state;
     tBTM_SEC_DEV_REC *p_dev_rec = btm_find_dev_by_handle (handle);
@@ -3942,9 +3947,12 @@ void btm_sec_auth_complete (UINT16 handle, UINT8 status)
     if (btm_cb.api.p_auth_complete_callback) {
         /* report the authentication status */
         if (old_state != BTM_PAIR_STATE_IDLE) {
-            (*btm_cb.api.p_auth_complete_callback) (p_dev_rec->bd_addr,
-                                                    p_dev_rec->dev_class,
-                                                    p_dev_rec->sec_bd_name, status);
+            res = (*btm_cb.api.p_auth_complete_callback) (p_dev_rec->bd_addr,
+                                                          p_dev_rec->dev_class,
+                                                          p_dev_rec->sec_bd_name, status);
+            if (res == BTM_SEC_DEV_REC_REMOVED) {
+                p_dev_rec = NULL;
+            }
         }
     }
 
@@ -4241,6 +4249,7 @@ void btm_sec_connected (UINT8 *bda, UINT16 handle, UINT8 status, UINT8 enc_mode)
 {
     tBTM_SEC_DEV_REC *p_dev_rec = btm_find_dev (bda);
     UINT8            res;
+    UINT8            sec_dev_rec_status;
     BOOLEAN          is_pairing_device = FALSE;
     tACL_CONN        *p_acl_cb;
     UINT8            bit_shift = 0;
@@ -4379,9 +4388,12 @@ void btm_sec_connected (UINT8 *bda, UINT16 handle, UINT8 status, UINT8 enc_mode)
 
             /* We need to notify host that the key is not known any more */
             if (btm_cb.api.p_auth_complete_callback) {
-                (*btm_cb.api.p_auth_complete_callback) (p_dev_rec->bd_addr,
-                                                        p_dev_rec->dev_class,
-                                                        p_dev_rec->sec_bd_name, status);
+                sec_dev_rec_status = (*btm_cb.api.p_auth_complete_callback) (p_dev_rec->bd_addr,
+                                                                             p_dev_rec->dev_class,
+                                                                             p_dev_rec->sec_bd_name, status);
+                if (sec_dev_rec_status == BTM_SEC_DEV_REC_REMOVED) {
+                    p_dev_rec = NULL;
+                }
             }
         }
         /*
@@ -4412,9 +4424,12 @@ void btm_sec_connected (UINT8 *bda, UINT16 handle, UINT8 status, UINT8 enc_mode)
 
             /* We need to notify host that the key is not known any more */
             if (btm_cb.api.p_auth_complete_callback) {
-                (*btm_cb.api.p_auth_complete_callback) (p_dev_rec->bd_addr,
-                                                        p_dev_rec->dev_class,
-                                                        p_dev_rec->sec_bd_name, status);
+                sec_dev_rec_status = (*btm_cb.api.p_auth_complete_callback) (p_dev_rec->bd_addr,
+                                                                             p_dev_rec->dev_class,
+                                                                             p_dev_rec->sec_bd_name, status);
+                if (sec_dev_rec_status == BTM_SEC_DEV_REC_REMOVED) {
+                    p_dev_rec = NULL;
+                }
             }
         }
 
@@ -4447,9 +4462,12 @@ void btm_sec_connected (UINT8 *bda, UINT16 handle, UINT8 status, UINT8 enc_mode)
         }
 
         if (btm_cb.api.p_auth_complete_callback) {
-            (*btm_cb.api.p_auth_complete_callback) (p_dev_rec->bd_addr,
-                                                    p_dev_rec->dev_class,
-                                                    p_dev_rec->sec_bd_name, HCI_SUCCESS);
+            sec_dev_rec_status = (*btm_cb.api.p_auth_complete_callback) (p_dev_rec->bd_addr,
+                                                                         p_dev_rec->dev_class,
+                                                                         p_dev_rec->sec_bd_name, HCI_SUCCESS);
+            if (sec_dev_rec_status == BTM_SEC_DEV_REC_REMOVED) {
+                p_dev_rec = NULL;
+            }
         }
 
         btm_sec_change_pairing_state (BTM_PAIR_STATE_IDLE);
@@ -4668,6 +4686,7 @@ void btm_sec_link_key_notification (UINT8 *p_bda, UINT8 *p_link_key, UINT8 key_t
     tBTM_SEC_DEV_REC *p_dev_rec = btm_find_or_alloc_dev (p_bda);
     BOOLEAN         we_are_bonding = FALSE;
     BOOLEAN         ltk_derived_lk  = FALSE;
+    UINT8           res;
 
     BTM_TRACE_EVENT ("btm_sec_link_key_notification()  BDA:%04x%08x, TYPE: %d\n",
                      (p_bda[0] << 8) + p_bda[1], (p_bda[2] << 24) + (p_bda[3] << 16) + (p_bda[4] << 8) + p_bda[5],
@@ -4772,8 +4791,11 @@ void btm_sec_link_key_notification (UINT8 *p_bda, UINT8 *p_link_key, UINT8 key_t
             /* for derived key, always send authentication callback for BR channel */
             || ltk_derived_lk) {
         if (btm_cb.api.p_auth_complete_callback) {
-            (*btm_cb.api.p_auth_complete_callback) (p_dev_rec->bd_addr, p_dev_rec->dev_class,
-                                                    p_dev_rec->sec_bd_name, HCI_SUCCESS);
+            res = (*btm_cb.api.p_auth_complete_callback) (p_dev_rec->bd_addr, p_dev_rec->dev_class,
+                                                          p_dev_rec->sec_bd_name, HCI_SUCCESS);
+            if (res == BTM_SEC_DEV_REC_REMOVED) {
+                p_dev_rec = NULL;
+            }
         }
     }
 
@@ -5760,9 +5782,10 @@ static char *btm_pair_state_descr (tBTM_PAIRING_STATE state)
 *******************************************************************************/
 void btm_sec_dev_rec_cback_event (tBTM_SEC_DEV_REC *p_dev_rec, UINT8 res, BOOLEAN is_le_transport)
 {
-    tBTM_SEC_CALLBACK   *p_callback = p_dev_rec->p_callback;
+    tBTM_SEC_CALLBACK   *p_callback;
 
-    if (p_dev_rec->p_callback) {
+    if (p_dev_rec && p_dev_rec->p_callback) {
+        p_callback = p_dev_rec->p_callback;
         p_dev_rec->p_callback = NULL;
 
 #if BLE_INCLUDED == TRUE

components/bt/host/bluedroid/stack/include/stack/btm_api.h

@@ -74,6 +74,7 @@ enum {
     BTM_SET_PRIVACY_FAIL,               /* 24 enable/disable local privacy failed*/
     BTM_SET_STATIC_RAND_ADDR_FAIL,      /* 25 Command failed */
     BTM_INVALID_STATIC_RAND_ADDR,       /* 26 invalid static rand addr */
+    BTM_SEC_DEV_REC_REMOVED,            /* 27 Device record relate to the bd_addr is removed */
 };
 
 typedef uint8_t tBTM_STATUS;

components/bt/host/nimble/Kconfig.in

@@ -44,8 +44,6 @@ choice BT_NIMBLE_LOG_LEVEL
 
     config BT_NIMBLE_LOG_LEVEL_NONE
         bool "No logs"
-    config BT_NIMBLE_LOG_LEVEL_CRIT
-        bool "Critical logs"
     config BT_NIMBLE_LOG_LEVEL_ERROR
         bool "Error logs"
     config BT_NIMBLE_LOG_LEVEL_WARNING
@@ -62,8 +60,7 @@ config BT_NIMBLE_LOG_LEVEL
     default 1 if BT_NIMBLE_LOG_LEVEL_INFO
     default 2 if BT_NIMBLE_LOG_LEVEL_WARNING
     default 3 if BT_NIMBLE_LOG_LEVEL_ERROR
-    default 4 if BT_NIMBLE_LOG_LEVEL_CRIT
-    default 5 if BT_NIMBLE_LOG_LEVEL_NONE
+    default 4 if BT_NIMBLE_LOG_LEVEL_NONE
 
 config BT_NIMBLE_MAX_CONNECTIONS
     int "Maximum number of concurrent connections"

components/coap/libcoap

@@ -1 +1 @@
-Subproject commit 9b6451c3654bc1f625e36c87f018c2da34bea5e6
+Subproject commit 3aa11612c143c9734d72022720f33e12506f7a2c

components/driver/CMakeLists.txt

@@ -60,7 +60,9 @@ if(${target} STREQUAL "esp32s3")
                      "mcpwm.c"
                      "usb_serial_jtag.c"
                      "spi_slave_hd.c"
-                     "touch_sensor_common.c")
+                     "touch_sensor_common.c"
+                     "esp32s3/touch_sensor.c"
+                    )
 endif()
 
 if(IDF_TARGET STREQUAL "esp32c3")

components/driver/esp32/touch_sensor.c

@@ -21,6 +21,7 @@
 #include "driver/touch_pad.h"
 #include "driver/rtc_cntl.h"
 #include "driver/gpio.h"
+#include "esp_check.h"
 
 #ifndef NDEBUG
 // Enable built-in checks in queue.h in debug builds
@@ -49,13 +50,9 @@ static SemaphoreHandle_t rtc_touch_mux = NULL;
 #define TOUCH_PAD_SHIFT_ROUND_DEFAULT     (8)   // ROUND = 2^(n-1); rounding off for fractional.
 
 static const char *TOUCH_TAG = "TOUCH_SENSOR";
-#define TOUCH_CHECK(a, str, ret_val) ({                                             \
-    if (!(a)) {                                                                     \
-        ESP_LOGE(TOUCH_TAG,"%s(%d): %s", __FUNCTION__, __LINE__, str);              \
-        return (ret_val);                                                           \
-    }                                                                               \
-})
-#define TOUCH_CHANNEL_CHECK(channel) TOUCH_CHECK(channel < SOC_TOUCH_SENSOR_NUM, "Touch channel error", ESP_ERR_INVALID_ARG)
+
+#define TOUCH_CHANNEL_CHECK(channel) ESP_RETURN_ON_FALSE(channel < SOC_TOUCH_SENSOR_NUM, ESP_ERR_INVALID_ARG, TOUCH_TAG,  "Touch channel error");
+#define TOUCH_NULL_POINTER_CHECK(p, name) ESP_RETURN_ON_FALSE((p), ESP_ERR_INVALID_ARG, TOUCH_TAG, "input param '"name"' is NULL")
 #define TOUCH_PARAM_CHECK_STR(s)     ""s" parameter error"
 
 extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate position after the rtc module is finished.
@@ -72,13 +69,13 @@ static esp_err_t _touch_pad_read(touch_pad_t touch_num, uint16_t *touch_value, t
 
 esp_err_t touch_pad_isr_handler_register(void (*fn)(void *), void *arg, int no_use, intr_handle_t *handle_no_use)
 {
-    TOUCH_CHECK(fn, "Touch_Pad ISR null", ESP_ERR_INVALID_ARG);
+    ESP_RETURN_ON_FALSE(fn, ESP_ERR_INVALID_ARG, TOUCH_TAG,  "Touch_Pad ISR null");
     return rtc_isr_register(fn, arg, RTC_CNTL_TOUCH_INT_ST_M);
 }
 
 esp_err_t touch_pad_isr_register(intr_handler_t fn, void *arg)
 {
-    TOUCH_CHECK(fn, "Touch_Pad ISR null", ESP_ERR_INVALID_ARG);
+    ESP_RETURN_ON_FALSE(fn, ESP_ERR_INVALID_ARG, TOUCH_TAG,  "Touch_Pad ISR null");
     return rtc_isr_register(fn, arg, RTC_CNTL_TOUCH_INT_ST_M);
 }
 
@@ -121,7 +118,7 @@ static void touch_pad_filter_cb(void *arg)
     }
     xTimerReset(s_touch_pad_filter->timer, portMAX_DELAY);
     xSemaphoreGive(rtc_touch_mux);
-    if (s_filter_cb != NULL) {
+    if (s_filter_cb) {
         //return the raw data and filtered data.
         s_filter_cb(s_touch_pad_filter->raw_val, s_touch_pad_filter->filtered_val);
     }
@@ -139,6 +136,8 @@ esp_err_t touch_pad_set_meas_time(uint16_t sleep_cycle, uint16_t meas_cycle)
 
 esp_err_t touch_pad_get_meas_time(uint16_t *sleep_cycle, uint16_t *meas_cycle)
 {
+    TOUCH_NULL_POINTER_CHECK(sleep_cycle, "sleep_cycle");
+    TOUCH_NULL_POINTER_CHECK(meas_cycle, "meas_cycle");
     TOUCH_ENTER_CRITICAL();
     touch_hal_get_meas_time(meas_cycle);
     touch_hal_get_sleep_time(sleep_cycle);
@@ -149,7 +148,7 @@ esp_err_t touch_pad_get_meas_time(uint16_t *sleep_cycle, uint16_t *meas_cycle)
 
 esp_err_t touch_pad_set_trigger_mode(touch_trigger_mode_t mode)
 {
-    TOUCH_CHECK((mode < TOUCH_TRIGGER_MAX), TOUCH_PARAM_CHECK_STR("mode"), ESP_ERR_INVALID_ARG);
+    ESP_RETURN_ON_FALSE((mode < TOUCH_TRIGGER_MAX), ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("mode"));
     TOUCH_ENTER_CRITICAL();
     touch_hal_set_trigger_mode(mode);
     TOUCH_EXIT_CRITICAL();
@@ -158,13 +157,14 @@ esp_err_t touch_pad_set_trigger_mode(touch_trigger_mode_t mode)
 
 esp_err_t touch_pad_get_trigger_mode(touch_trigger_mode_t *mode)
 {
+    TOUCH_NULL_POINTER_CHECK(mode, "mode");
     touch_hal_get_trigger_mode(mode);
     return ESP_OK;
 }
 
 esp_err_t touch_pad_set_trigger_source(touch_trigger_src_t src)
 {
-    TOUCH_CHECK((src < TOUCH_TRIGGER_SOURCE_MAX), TOUCH_PARAM_CHECK_STR("src"), ESP_ERR_INVALID_ARG);
+    ESP_RETURN_ON_FALSE((src < TOUCH_TRIGGER_SOURCE_MAX), ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("src"));
     TOUCH_ENTER_CRITICAL();
     touch_hal_set_trigger_source(src);
     TOUCH_EXIT_CRITICAL();
@@ -173,15 +173,16 @@ esp_err_t touch_pad_set_trigger_source(touch_trigger_src_t src)
 
 esp_err_t touch_pad_get_trigger_source(touch_trigger_src_t *src)
 {
+    TOUCH_NULL_POINTER_CHECK(src, "src");
     touch_hal_get_trigger_source(src);
     return ESP_OK;
 }
 
 esp_err_t touch_pad_set_group_mask(uint16_t set1_mask, uint16_t set2_mask, uint16_t en_mask)
 {
-    TOUCH_CHECK((set1_mask <= TOUCH_PAD_BIT_MASK_ALL), "touch set1 bitmask error", ESP_ERR_INVALID_ARG);
-    TOUCH_CHECK((set2_mask <= TOUCH_PAD_BIT_MASK_ALL), "touch set2 bitmask error", ESP_ERR_INVALID_ARG);
-    TOUCH_CHECK((en_mask <= TOUCH_PAD_BIT_MASK_ALL), "touch work_en bitmask error", ESP_ERR_INVALID_ARG);
+    ESP_RETURN_ON_FALSE((set1_mask <= TOUCH_PAD_BIT_MASK_ALL), ESP_ERR_INVALID_ARG, TOUCH_TAG,  "touch set1 bitmask error");
+    ESP_RETURN_ON_FALSE((set2_mask <= TOUCH_PAD_BIT_MASK_ALL), ESP_ERR_INVALID_ARG, TOUCH_TAG,  "touch set2 bitmask error");
+    ESP_RETURN_ON_FALSE((en_mask <= TOUCH_PAD_BIT_MASK_ALL), ESP_ERR_INVALID_ARG, TOUCH_TAG,  "touch work_en bitmask error");
 
     TOUCH_ENTER_CRITICAL();
     touch_hal_set_group_mask(set1_mask, set2_mask);
@@ -193,6 +194,9 @@ esp_err_t touch_pad_set_group_mask(uint16_t set1_mask, uint16_t set2_mask, uint1
 
 esp_err_t touch_pad_get_group_mask(uint16_t *set1_mask, uint16_t *set2_mask, uint16_t *en_mask)
 {
+    TOUCH_NULL_POINTER_CHECK(set1_mask, "set1_mask");
+    TOUCH_NULL_POINTER_CHECK(set2_mask, "set2_mask");
+    TOUCH_NULL_POINTER_CHECK(en_mask, "en_mask");
     TOUCH_ENTER_CRITICAL();
     touch_hal_get_channel_mask(en_mask);
     touch_hal_get_group_mask(set1_mask, set2_mask);
@@ -203,9 +207,9 @@ esp_err_t touch_pad_get_group_mask(uint16_t *set1_mask, uint16_t *set2_mask, uin
 
 esp_err_t touch_pad_clear_group_mask(uint16_t set1_mask, uint16_t set2_mask, uint16_t en_mask)
 {
-    TOUCH_CHECK((set1_mask <= TOUCH_PAD_BIT_MASK_ALL), "touch set1 bitmask error", ESP_ERR_INVALID_ARG);
-    TOUCH_CHECK((set2_mask <= TOUCH_PAD_BIT_MASK_ALL), "touch set2 bitmask error", ESP_ERR_INVALID_ARG);
-    TOUCH_CHECK((en_mask <= TOUCH_PAD_BIT_MASK_ALL), "touch work_en bitmask error", ESP_ERR_INVALID_ARG);
+    ESP_RETURN_ON_FALSE((set1_mask <= TOUCH_PAD_BIT_MASK_ALL), ESP_ERR_INVALID_ARG, TOUCH_TAG,  "touch set1 bitmask error");
+    ESP_RETURN_ON_FALSE((set2_mask <= TOUCH_PAD_BIT_MASK_ALL), ESP_ERR_INVALID_ARG, TOUCH_TAG,  "touch set2 bitmask error");
+    ESP_RETURN_ON_FALSE((en_mask <= TOUCH_PAD_BIT_MASK_ALL), ESP_ERR_INVALID_ARG, TOUCH_TAG,  "touch work_en bitmask error");
 
     TOUCH_ENTER_CRITICAL();
     touch_hal_clear_channel_mask(en_mask);
@@ -245,7 +249,7 @@ bool touch_pad_meas_is_done(void)
 
 esp_err_t touch_pad_config(touch_pad_t touch_num, uint16_t threshold)
 {
-    TOUCH_CHECK(rtc_touch_mux != NULL, "Touch pad not initialized", ESP_FAIL);
+    ESP_RETURN_ON_FALSE(rtc_touch_mux, ESP_FAIL, TOUCH_TAG,  "Touch pad not initialized");
     TOUCH_CHANNEL_CHECK(touch_num);
     touch_fsm_mode_t mode;
     touch_pad_io_init(touch_num);
@@ -297,8 +301,8 @@ esp_err_t touch_pad_init(void)
 
 esp_err_t touch_pad_deinit(void)
 {
-    TOUCH_CHECK(rtc_touch_mux != NULL, "Touch pad not initialized", ESP_FAIL);
-    if (s_touch_pad_filter != NULL) {
+    ESP_RETURN_ON_FALSE(rtc_touch_mux, ESP_FAIL, TOUCH_TAG,  "Touch pad not initialized");
+    if (s_touch_pad_filter) {
         touch_pad_filter_stop();
         touch_pad_filter_delete();
     }
@@ -337,8 +341,8 @@ static esp_err_t _touch_pad_read(touch_pad_t touch_num, uint16_t *touch_value, t
 esp_err_t touch_pad_read(touch_pad_t touch_num, uint16_t *touch_value)
 {
     TOUCH_CHANNEL_CHECK(touch_num);
-    TOUCH_CHECK(touch_value != NULL, "touch_value", ESP_ERR_INVALID_ARG);
-    TOUCH_CHECK(rtc_touch_mux != NULL, "Touch pad not initialized", ESP_FAIL);
+    TOUCH_NULL_POINTER_CHECK(touch_value, "touch_value");
+    ESP_RETURN_ON_FALSE(rtc_touch_mux, ESP_FAIL, TOUCH_TAG,  "Touch pad not initialized");
 
     esp_err_t res = ESP_OK;
     touch_fsm_mode_t mode;
@@ -351,10 +355,10 @@ esp_err_t touch_pad_read(touch_pad_t touch_num, uint16_t *touch_value)
 
 IRAM_ATTR esp_err_t touch_pad_read_raw_data(touch_pad_t touch_num, uint16_t *touch_value)
 {
-    TOUCH_CHECK(rtc_touch_mux != NULL, "Touch pad not initialized", ESP_FAIL);
+    ESP_RETURN_ON_FALSE(rtc_touch_mux, ESP_FAIL, TOUCH_TAG,  "Touch pad not initialized");
     TOUCH_CHANNEL_CHECK(touch_num);
-    TOUCH_CHECK(touch_value != NULL, "touch_value", ESP_ERR_INVALID_ARG);
-    TOUCH_CHECK(s_touch_pad_filter != NULL, "Touch pad filter not initialized", ESP_FAIL);
+    TOUCH_NULL_POINTER_CHECK(touch_value, "touch_value");
+    ESP_RETURN_ON_FALSE(s_touch_pad_filter, ESP_FAIL, TOUCH_TAG,  "Touch pad filter not initialized");
     *touch_value = s_touch_pad_filter->raw_val[touch_num];
     if (*touch_value == 0) {
         return ESP_ERR_INVALID_STATE;
@@ -364,10 +368,10 @@ IRAM_ATTR esp_err_t touch_pad_read_raw_data(touch_pad_t touch_num, uint16_t *tou
 
 IRAM_ATTR esp_err_t touch_pad_read_filtered(touch_pad_t touch_num, uint16_t *touch_value)
 {
-    TOUCH_CHECK(rtc_touch_mux != NULL, "Touch pad not initialized", ESP_FAIL);
+    ESP_RETURN_ON_FALSE(rtc_touch_mux, ESP_FAIL, TOUCH_TAG,  "Touch pad not initialized");
     TOUCH_CHANNEL_CHECK(touch_num);
-    TOUCH_CHECK(touch_value != NULL, "touch_value", ESP_ERR_INVALID_ARG);
-    TOUCH_CHECK(s_touch_pad_filter != NULL, "Touch pad filter not initialized", ESP_FAIL);
+    TOUCH_NULL_POINTER_CHECK(touch_value, "touch_value");
+    ESP_RETURN_ON_FALSE(s_touch_pad_filter, ESP_FAIL, TOUCH_TAG,  "Touch pad filter not initialized");
     *touch_value = (s_touch_pad_filter->filtered_val[touch_num]);
     if (*touch_value == 0) {
         return ESP_ERR_INVALID_STATE;
@@ -377,13 +381,13 @@ IRAM_ATTR esp_err_t touch_pad_read_filtered(touch_pad_t touch_num, uint16_t *tou
 
 esp_err_t touch_pad_set_filter_period(uint32_t new_period_ms)
 {
-    TOUCH_CHECK(s_touch_pad_filter != NULL, "Touch pad filter not initialized", ESP_ERR_INVALID_STATE);
-    TOUCH_CHECK(new_period_ms > 0, "Touch pad filter period error", ESP_ERR_INVALID_ARG);
-    TOUCH_CHECK(rtc_touch_mux != NULL, "Touch pad not initialized", ESP_ERR_INVALID_STATE);
+    ESP_RETURN_ON_FALSE(s_touch_pad_filter, ESP_ERR_INVALID_STATE, TOUCH_TAG,  "Touch pad filter not initialized");
+    ESP_RETURN_ON_FALSE(new_period_ms > 0, ESP_ERR_INVALID_ARG, TOUCH_TAG,  "Touch pad filter period error");
+    ESP_RETURN_ON_FALSE(rtc_touch_mux, ESP_ERR_INVALID_STATE, TOUCH_TAG,  "Touch pad not initialized");
 
     esp_err_t ret = ESP_OK;
     xSemaphoreTake(rtc_touch_mux, portMAX_DELAY);
-    if (s_touch_pad_filter != NULL) {
+    if (s_touch_pad_filter) {
         xTimerChangePeriod(s_touch_pad_filter->timer, new_period_ms / portTICK_PERIOD_MS, portMAX_DELAY);
         s_touch_pad_filter->period = new_period_ms;
     } else {
@@ -396,13 +400,13 @@ esp_err_t touch_pad_set_filter_period(uint32_t new_period_ms)
 
 esp_err_t touch_pad_get_filter_period(uint32_t *p_period_ms)
 {
-    TOUCH_CHECK(s_touch_pad_filter != NULL, "Touch pad filter not initialized", ESP_ERR_INVALID_STATE);
-    TOUCH_CHECK(p_period_ms != NULL, "Touch pad period pointer error", ESP_ERR_INVALID_ARG);
-    TOUCH_CHECK(rtc_touch_mux != NULL, "Touch pad not initialized", ESP_ERR_INVALID_STATE);
+    ESP_RETURN_ON_FALSE(s_touch_pad_filter, ESP_ERR_INVALID_STATE, TOUCH_TAG,  "Touch pad filter not initialized");
+    TOUCH_NULL_POINTER_CHECK(p_period_ms, "p_period_ms");
+    ESP_RETURN_ON_FALSE(rtc_touch_mux, ESP_ERR_INVALID_STATE, TOUCH_TAG,  "Touch pad not initialized");
 
     esp_err_t ret = ESP_OK;
     xSemaphoreTake(rtc_touch_mux, portMAX_DELAY);
-    if (s_touch_pad_filter != NULL) {
+    if (s_touch_pad_filter) {
         *p_period_ms = s_touch_pad_filter->period;
     } else {
         ESP_LOGE(TOUCH_TAG, "Touch pad filter deleted");
@@ -414,8 +418,8 @@ esp_err_t touch_pad_get_filter_period(uint32_t *p_period_ms)
 
 esp_err_t touch_pad_filter_start(uint32_t filter_period_ms)
 {
-    TOUCH_CHECK(filter_period_ms >= portTICK_PERIOD_MS, "Touch pad filter period error", ESP_ERR_INVALID_ARG);
-    TOUCH_CHECK(rtc_touch_mux != NULL, "Touch pad not initialized", ESP_ERR_INVALID_STATE);
+    ESP_RETURN_ON_FALSE(filter_period_ms >= portTICK_PERIOD_MS, ESP_ERR_INVALID_ARG, TOUCH_TAG,  "Touch pad filter period error");
+    ESP_RETURN_ON_FALSE(rtc_touch_mux, ESP_ERR_INVALID_STATE, TOUCH_TAG,  "Touch pad not initialized");
 
     xSemaphoreTake(rtc_touch_mux, portMAX_DELAY);
     if (s_touch_pad_filter == NULL) {
@@ -445,11 +449,11 @@ err_no_mem:
 
 esp_err_t touch_pad_filter_stop(void)
 {
-    TOUCH_CHECK(s_touch_pad_filter != NULL, "Touch pad filter not initialized", ESP_ERR_INVALID_STATE);
-    TOUCH_CHECK(rtc_touch_mux != NULL, "Touch pad not initialized", ESP_ERR_INVALID_STATE);
+    ESP_RETURN_ON_FALSE(s_touch_pad_filter, ESP_ERR_INVALID_STATE, TOUCH_TAG,  "Touch pad filter not initialized");
+    ESP_RETURN_ON_FALSE(rtc_touch_mux, ESP_ERR_INVALID_STATE, TOUCH_TAG,  "Touch pad not initialized");
     esp_err_t ret = ESP_OK;
     xSemaphoreTake(rtc_touch_mux, portMAX_DELAY);
-    if (s_touch_pad_filter != NULL) {
+    if (s_touch_pad_filter) {
         xTimerStop(s_touch_pad_filter->timer, portMAX_DELAY);
     } else {
         ESP_LOGE(TOUCH_TAG, "Touch pad filter deleted");
@@ -461,11 +465,11 @@ esp_err_t touch_pad_filter_stop(void)
 
 esp_err_t touch_pad_filter_delete(void)
 {
-    TOUCH_CHECK(s_touch_pad_filter != NULL, "Touch pad filter not initialized", ESP_ERR_INVALID_STATE);
-    TOUCH_CHECK(rtc_touch_mux != NULL, "Touch pad not initialized", ESP_ERR_INVALID_STATE);
+    ESP_RETURN_ON_FALSE(s_touch_pad_filter, ESP_ERR_INVALID_STATE, TOUCH_TAG,  "Touch pad filter not initialized");
+    ESP_RETURN_ON_FALSE(rtc_touch_mux, ESP_ERR_INVALID_STATE, TOUCH_TAG,  "Touch pad not initialized");
     xSemaphoreTake(rtc_touch_mux, portMAX_DELAY);
-    if (s_touch_pad_filter != NULL) {
-        if (s_touch_pad_filter->timer != NULL) {
+    if (s_touch_pad_filter) {
+        if (s_touch_pad_filter->timer) {
             xTimerStop(s_touch_pad_filter->timer, portMAX_DELAY);
             xTimerDelete(s_touch_pad_filter->timer, portMAX_DELAY);
             s_touch_pad_filter->timer = NULL;

components/driver/esp32s2/include/driver/touch_sensor.h

@@ -293,7 +293,7 @@ esp_err_t touch_pad_reset_benchmark(touch_pad_t touch_num);
  * @return
  *     - ESP_OK Success
  */
-esp_err_t touch_pad_filter_set_config(touch_filter_config_t *filter_info);
+esp_err_t touch_pad_filter_set_config(const touch_filter_config_t *filter_info);
 
 /**
  * @brief get parameter of touch sensor filter and detection algorithm.
@@ -331,7 +331,7 @@ esp_err_t touch_pad_filter_disable(void);
  * @return
  *     - ESP_OK Success
  */
-esp_err_t touch_pad_denoise_set_config(touch_pad_denoise_t *denoise);
+esp_err_t touch_pad_denoise_set_config(const touch_pad_denoise_t *denoise);
 
 /**
  * @brief get parameter of denoise pad (TOUCH_PAD_NUM0).
@@ -380,7 +380,7 @@ esp_err_t touch_pad_denoise_read_data(uint32_t *data);
  * @return
  *     - ESP_OK Success
  */
-esp_err_t touch_pad_waterproof_set_config(touch_pad_waterproof_t *waterproof);
+esp_err_t touch_pad_waterproof_set_config(const touch_pad_waterproof_t *waterproof);
 
 /**
  * @brief get parameter of waterproof function.

components/driver/esp32s2/touch_sensor.c

@@ -20,6 +20,7 @@
 #include "driver/rtc_cntl.h"
 #include "driver/gpio.h"
 #include "sdkconfig.h"
+#include "esp_check.h"
 
 #include "hal/touch_sensor_types.h"
 #include "hal/touch_sensor_hal.h"
@@ -36,18 +37,14 @@
 #define TOUCH_PAD_MEASURE_WAIT_DEFAULT  (0xFF)  // The timer frequency is 8Mhz, the max value is 0xff
 
 static const char *TOUCH_TAG = "TOUCH_SENSOR";
-#define TOUCH_CHECK(a, str, ret_val) ({                                             \
-    if (!(a)) {                                                                     \
-        ESP_LOGE(TOUCH_TAG,"%s(%d): %s", __FUNCTION__, __LINE__, str);              \
-        return (ret_val);                                                           \
-    }                                                                               \
-})
+
 #define TOUCH_CHANNEL_CHECK(channel) do { \
-        TOUCH_CHECK(channel < SOC_TOUCH_SENSOR_NUM && channel >= 0, "Touch channel error", ESP_ERR_INVALID_ARG); \
-        TOUCH_CHECK(channel != SOC_TOUCH_DENOISE_CHANNEL, "TOUCH0 is internal denoise channel", ESP_ERR_INVALID_ARG); \
+        ESP_RETURN_ON_FALSE(channel < SOC_TOUCH_SENSOR_NUM && channel >= 0, ESP_ERR_INVALID_ARG, TOUCH_TAG,  "Touch channel error"); \
+        ESP_RETURN_ON_FALSE(channel != SOC_TOUCH_DENOISE_CHANNEL, ESP_ERR_INVALID_ARG, TOUCH_TAG,  "TOUCH0 is internal denoise channel"); \
     } while (0);
-#define TOUCH_CH_MASK_CHECK(mask) TOUCH_CHECK((mask <= TOUCH_PAD_BIT_MASK_ALL), "touch channel bitmask error", ESP_ERR_INVALID_ARG)
-#define TOUCH_INTR_MASK_CHECK(mask) TOUCH_CHECK(mask & TOUCH_PAD_INTR_MASK_ALL, "intr mask error", ESP_ERR_INVALID_ARG)
+#define TOUCH_CH_MASK_CHECK(mask) ESP_RETURN_ON_FALSE((mask <= TOUCH_PAD_BIT_MASK_ALL), ESP_ERR_INVALID_ARG, TOUCH_TAG,  "touch channel bitmask error");
+#define TOUCH_INTR_MASK_CHECK(mask) ESP_RETURN_ON_FALSE(mask & TOUCH_PAD_INTR_MASK_ALL, ESP_ERR_INVALID_ARG, TOUCH_TAG,  "intr mask error");
+#define TOUCH_NULL_POINTER_CHECK(p, name) ESP_RETURN_ON_FALSE((p), ESP_ERR_INVALID_ARG, TOUCH_TAG, "input param '"name"' is NULL")
 #define TOUCH_PARAM_CHECK_STR(s)           ""s" parameter error"
 
 extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate position after the rtc module is finished.
@@ -85,7 +82,7 @@ static void touch_pad_workaround_isr_internal(void *arg)
 esp_err_t touch_pad_isr_register(intr_handler_t fn, void *arg, touch_pad_intr_mask_t intr_mask)
 {
     static bool reg_flag = false;
-    TOUCH_CHECK(fn != NULL, TOUCH_PARAM_CHECK_STR("intr_mask"), ESP_ERR_INVALID_ARG);
+    ESP_RETURN_ON_FALSE(fn, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("intr_mask"));
     TOUCH_INTR_MASK_CHECK(intr_mask);
 
     uint32_t en_msk = 0;
@@ -104,6 +101,11 @@ esp_err_t touch_pad_isr_register(intr_handler_t fn, void *arg, touch_pad_intr_ma
     if (intr_mask & TOUCH_PAD_INTR_MASK_TIMEOUT) {
         en_msk |= RTC_CNTL_TOUCH_TIMEOUT_INT_ST_M;
     }
+#if SOC_TOUCH_PROXIMITY_MEAS_DONE_SUPPORTED
+    if (intr_mask & TOUCH_PAD_INTR_MASK_PROXI_MEAS_DONE) {
+        en_msk |= RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ST_M;
+    }
+#endif
     esp_err_t ret = rtc_isr_register(fn, arg, en_msk);
     /* Must ensure: After being registered, it is executed first. */
     if ( (ret == ESP_OK) && (reg_flag == false) && (intr_mask & (TOUCH_PAD_INTR_MASK_SCAN_DONE | TOUCH_PAD_INTR_MASK_TIMEOUT)) ) {
@@ -136,7 +138,7 @@ esp_err_t touch_pad_get_meas_time(uint16_t *sleep_cycle, uint16_t *meas_times)
 
 esp_err_t touch_pad_set_idle_channel_connect(touch_pad_conn_type_t type)
 {
-    TOUCH_CHECK(type < TOUCH_PAD_CONN_MAX, TOUCH_PARAM_CHECK_STR("type"), ESP_ERR_INVALID_ARG);
+    ESP_RETURN_ON_FALSE(type < TOUCH_PAD_CONN_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("type"));
     TOUCH_ENTER_CRITICAL();
     touch_hal_set_idle_channel_connect(type);
     TOUCH_EXIT_CRITICAL();
@@ -145,6 +147,7 @@ esp_err_t touch_pad_set_idle_channel_connect(touch_pad_conn_type_t type)
 
 esp_err_t touch_pad_get_idle_channel_connect(touch_pad_conn_type_t *type)
 {
+    TOUCH_NULL_POINTER_CHECK(type, "type");
     touch_hal_get_idle_channel_connect(type);
     return ESP_OK;
 }
@@ -166,6 +169,7 @@ esp_err_t touch_pad_set_channel_mask(uint16_t enable_mask)
 
 esp_err_t touch_pad_get_channel_mask(uint16_t *enable_mask)
 {
+    TOUCH_NULL_POINTER_CHECK(enable_mask, "enable_mask");
     TOUCH_ENTER_CRITICAL();
     touch_hal_get_channel_mask(enable_mask);
     TOUCH_EXIT_CRITICAL();
@@ -238,6 +242,7 @@ esp_err_t touch_pad_timeout_set(bool enable, uint32_t threshold)
 
 esp_err_t touch_pad_timeout_get_threshold(uint32_t *threshold)
 {
+    TOUCH_NULL_POINTER_CHECK(threshold, "threshold");
     TOUCH_ENTER_CRITICAL();
     touch_hal_timeout_get_threshold(threshold);
     TOUCH_EXIT_CRITICAL();
@@ -281,7 +286,7 @@ esp_err_t touch_pad_init(void)
 
 esp_err_t touch_pad_deinit(void)
 {
-    TOUCH_CHECK(rtc_touch_mux != NULL, "Touch pad not initialized", ESP_FAIL);
+    ESP_RETURN_ON_FALSE(rtc_touch_mux, ESP_FAIL, TOUCH_TAG,  "Touch pad not initialized");
     xSemaphoreTake(rtc_touch_mux, portMAX_DELAY);
     TOUCH_ENTER_CRITICAL();
     touch_hal_deinit();
@@ -302,7 +307,8 @@ esp_err_t touch_pad_reset(void)
 
 esp_err_t IRAM_ATTR touch_pad_read_raw_data(touch_pad_t touch_num, uint32_t *raw_data)
 {
-    TOUCH_CHECK(touch_num < TOUCH_PAD_MAX && touch_num >= 0, "Touch channel error", ESP_ERR_INVALID_ARG);
+    ESP_RETURN_ON_FALSE(touch_num < TOUCH_PAD_MAX && touch_num >= 0, ESP_ERR_INVALID_ARG, TOUCH_TAG,  "Touch channel error");
+    TOUCH_NULL_POINTER_CHECK(raw_data, "raw_data");
     TOUCH_ENTER_CRITICAL_SAFE();
     *raw_data = touch_hal_read_raw_data(touch_num);
     TOUCH_EXIT_CRITICAL_SAFE();
@@ -311,6 +317,7 @@ esp_err_t IRAM_ATTR touch_pad_read_raw_data(touch_pad_t touch_num, uint32_t *raw
 
 esp_err_t IRAM_ATTR touch_pad_filter_read_smooth(touch_pad_t touch_num, uint32_t *smooth_data)
 {
+    TOUCH_NULL_POINTER_CHECK(smooth_data, "smooth_data");
     TOUCH_CHANNEL_CHECK(touch_num);
     TOUCH_ENTER_CRITICAL_SAFE();
     touch_hal_filter_read_smooth(touch_num, smooth_data);
@@ -320,6 +327,7 @@ esp_err_t IRAM_ATTR touch_pad_filter_read_smooth(touch_pad_t touch_num, uint32_t
 
 esp_err_t IRAM_ATTR touch_pad_read_benchmark(touch_pad_t touch_num, uint32_t *benchmark)
 {
+    TOUCH_NULL_POINTER_CHECK(benchmark, "benchmark");
     TOUCH_CHANNEL_CHECK(touch_num);
     TOUCH_ENTER_CRITICAL_SAFE();
     touch_hal_read_benchmark(touch_num, benchmark);
@@ -330,20 +338,21 @@ esp_err_t IRAM_ATTR touch_pad_read_benchmark(touch_pad_t touch_num, uint32_t *be
 /* Should be call after clk enable and filter enable. */
 esp_err_t touch_pad_reset_benchmark(touch_pad_t touch_num)
 {
-    TOUCH_CHECK(touch_num <= TOUCH_PAD_MAX && touch_num >= 0, "Touch channel error", ESP_ERR_INVALID_ARG);
+    ESP_RETURN_ON_FALSE(touch_num <= TOUCH_PAD_MAX && touch_num >= 0, ESP_ERR_INVALID_ARG, TOUCH_TAG,  "Touch channel error");
     TOUCH_ENTER_CRITICAL();
     touch_hal_reset_benchmark(touch_num);
     TOUCH_EXIT_CRITICAL();
     return ESP_OK;
 }
 
-esp_err_t touch_pad_filter_set_config(touch_filter_config_t *filter_info)
+esp_err_t touch_pad_filter_set_config(const touch_filter_config_t *filter_info)
 {
-    TOUCH_CHECK(filter_info->mode < TOUCH_PAD_FILTER_MAX, TOUCH_PARAM_CHECK_STR("mode"), ESP_ERR_INVALID_ARG);
-    TOUCH_CHECK(filter_info->debounce_cnt <= TOUCH_DEBOUNCE_CNT_MAX, TOUCH_PARAM_CHECK_STR("debounce"), ESP_ERR_INVALID_ARG);
-    TOUCH_CHECK(filter_info->noise_thr <= TOUCH_NOISE_THR_MAX, TOUCH_PARAM_CHECK_STR("noise"), ESP_ERR_INVALID_ARG);
-    TOUCH_CHECK(filter_info->jitter_step <= TOUCH_JITTER_STEP_MAX, TOUCH_PARAM_CHECK_STR("jitter_step"), ESP_ERR_INVALID_ARG);
-    TOUCH_CHECK(filter_info->smh_lvl < TOUCH_PAD_SMOOTH_MAX, TOUCH_PARAM_CHECK_STR("smooth level"), ESP_ERR_INVALID_ARG);
+    TOUCH_NULL_POINTER_CHECK(filter_info, "filter_info");
+    ESP_RETURN_ON_FALSE(filter_info->mode < TOUCH_PAD_FILTER_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("mode"));
+    ESP_RETURN_ON_FALSE(filter_info->debounce_cnt <= TOUCH_DEBOUNCE_CNT_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("debounce"));
+    ESP_RETURN_ON_FALSE(filter_info->noise_thr <= TOUCH_NOISE_THR_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("noise"));
+    ESP_RETURN_ON_FALSE(filter_info->jitter_step <= TOUCH_JITTER_STEP_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("jitter_step"));
+    ESP_RETURN_ON_FALSE(filter_info->smh_lvl < TOUCH_PAD_SMOOTH_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("smooth level"));
 
     TOUCH_ENTER_CRITICAL();
     touch_hal_filter_set_config(filter_info);
@@ -354,6 +363,7 @@ esp_err_t touch_pad_filter_set_config(touch_filter_config_t *filter_info)
 
 esp_err_t touch_pad_filter_get_config(touch_filter_config_t *filter_info)
 {
+    TOUCH_NULL_POINTER_CHECK(filter_info, "filter_info");
     TOUCH_ENTER_CRITICAL();
     touch_hal_filter_get_config(filter_info);
     TOUCH_EXIT_CRITICAL();
@@ -393,10 +403,11 @@ esp_err_t touch_pad_denoise_disable(void)
     return ESP_OK;
 }
 
-esp_err_t touch_pad_denoise_set_config(touch_pad_denoise_t *denoise)
+esp_err_t touch_pad_denoise_set_config(const touch_pad_denoise_t *denoise)
 {
-    TOUCH_CHECK(denoise->grade < TOUCH_PAD_DENOISE_MAX, TOUCH_PARAM_CHECK_STR("grade"), ESP_ERR_INVALID_ARG);
-    TOUCH_CHECK(denoise->cap_level < TOUCH_PAD_DENOISE_CAP_MAX, TOUCH_PARAM_CHECK_STR("cap_level"), ESP_ERR_INVALID_ARG);
+    TOUCH_NULL_POINTER_CHECK(denoise, "denoise");
+    ESP_RETURN_ON_FALSE(denoise->grade < TOUCH_PAD_DENOISE_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("grade"));
+    ESP_RETURN_ON_FALSE(denoise->cap_level < TOUCH_PAD_DENOISE_CAP_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("cap_level"));
 
     const touch_hal_meas_mode_t meas = {
         .slope = TOUCH_PAD_SLOPE_DEFAULT,
@@ -412,6 +423,7 @@ esp_err_t touch_pad_denoise_set_config(touch_pad_denoise_t *denoise)
 
 esp_err_t touch_pad_denoise_get_config(touch_pad_denoise_t *denoise)
 {
+    TOUCH_NULL_POINTER_CHECK(denoise, "denoise");
     TOUCH_ENTER_CRITICAL();
     touch_hal_denoise_get_config(denoise);
     TOUCH_EXIT_CRITICAL();
@@ -420,14 +432,16 @@ esp_err_t touch_pad_denoise_get_config(touch_pad_denoise_t *denoise)
 
 esp_err_t touch_pad_denoise_read_data(uint32_t *data)
 {
+    TOUCH_NULL_POINTER_CHECK(data, "data");
     touch_hal_denoise_read_data(data);
     return ESP_OK;
 }
 
-esp_err_t touch_pad_waterproof_set_config(touch_pad_waterproof_t *waterproof)
+esp_err_t touch_pad_waterproof_set_config(const touch_pad_waterproof_t *waterproof)
 {
-    TOUCH_CHECK(waterproof->guard_ring_pad < SOC_TOUCH_SENSOR_NUM, TOUCH_PARAM_CHECK_STR("pad"), ESP_ERR_INVALID_ARG);
-    TOUCH_CHECK(waterproof->shield_driver < TOUCH_PAD_SHIELD_DRV_MAX, TOUCH_PARAM_CHECK_STR("shield_driver"), ESP_ERR_INVALID_ARG);
+    TOUCH_NULL_POINTER_CHECK(waterproof, "waterproof");
+    ESP_RETURN_ON_FALSE(waterproof->guard_ring_pad < SOC_TOUCH_SENSOR_NUM, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("pad"));
+    ESP_RETURN_ON_FALSE(waterproof->shield_driver < TOUCH_PAD_SHIELD_DRV_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("shield_driver"));
 
     TOUCH_ENTER_CRITICAL();
     touch_hal_waterproof_set_config(waterproof);
@@ -437,6 +451,7 @@ esp_err_t touch_pad_waterproof_set_config(touch_pad_waterproof_t *waterproof)
 
 esp_err_t touch_pad_waterproof_get_config(touch_pad_waterproof_t *waterproof)
 {
+    TOUCH_NULL_POINTER_CHECK(waterproof, "waterproof");
     TOUCH_ENTER_CRITICAL();
     touch_hal_waterproof_get_config(waterproof);
     TOUCH_EXIT_CRITICAL();
@@ -463,7 +478,7 @@ esp_err_t touch_pad_waterproof_disable(void)
 esp_err_t touch_pad_proximity_enable(touch_pad_t touch_num, bool enabled)
 {
     esp_err_t ret = ESP_OK;
-    TOUCH_CHECK(touch_num < TOUCH_PAD_MAX, "Touch channel error", ESP_ERR_INVALID_ARG);
+    ESP_RETURN_ON_FALSE(touch_num < TOUCH_PAD_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  "Touch channel error");
 
     TOUCH_ENTER_CRITICAL();
     if (!touch_hal_enable_proximity(touch_num, enabled)) {
@@ -475,7 +490,7 @@ esp_err_t touch_pad_proximity_enable(touch_pad_t touch_num, bool enabled)
 
 esp_err_t touch_pad_proximity_set_count(touch_pad_t touch_num, uint32_t count)
 {
-    TOUCH_CHECK(count <= TOUCH_PROXIMITY_MEAS_NUM_MAX, TOUCH_PARAM_CHECK_STR("measure count"), ESP_ERR_INVALID_ARG);
+    ESP_RETURN_ON_FALSE(count <= TOUCH_PROXIMITY_MEAS_NUM_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("measure count"));
 
     TOUCH_ENTER_CRITICAL();
     touch_hal_proximity_set_meas_times(count);
@@ -485,7 +500,7 @@ esp_err_t touch_pad_proximity_set_count(touch_pad_t touch_num, uint32_t count)
 
 esp_err_t touch_pad_proximity_get_count(touch_pad_t touch_num, uint32_t *count)
 {
-    TOUCH_CHECK(count != NULL, TOUCH_PARAM_CHECK_STR("measure count"), ESP_ERR_INVALID_ARG);
+    ESP_RETURN_ON_FALSE(count, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("measure count"));
 
     TOUCH_ENTER_CRITICAL_SAFE();
     touch_hal_proximity_get_meas_times(count);
@@ -504,7 +519,8 @@ esp_err_t touch_pad_proximity_get_count(touch_pad_t touch_num, uint32_t *count)
  */
 esp_err_t touch_pad_proximity_read_meas_cnt(touch_pad_t touch_num, uint32_t *cnt)
 {
-    TOUCH_CHECK(touch_hal_proximity_pad_check(touch_num), "touch num is not proximity", ESP_ERR_INVALID_ARG);
+    TOUCH_NULL_POINTER_CHECK(cnt, "cnt");
+    ESP_RETURN_ON_FALSE(touch_hal_proximity_pad_check(touch_num), ESP_ERR_INVALID_ARG, TOUCH_TAG,  "touch num is not proximity");
     TOUCH_ENTER_CRITICAL_SAFE();
     touch_hal_proximity_read_meas_cnt(touch_num, cnt);
     TOUCH_EXIT_CRITICAL_SAFE();
@@ -513,7 +529,8 @@ esp_err_t touch_pad_proximity_read_meas_cnt(touch_pad_t touch_num, uint32_t *cnt
 
 esp_err_t touch_pad_proximity_get_data(touch_pad_t touch_num, uint32_t *measure_out)
 {
-    TOUCH_CHECK(touch_hal_proximity_pad_check(touch_num), "touch num is not proximity", ESP_ERR_INVALID_ARG);
+    ESP_RETURN_ON_FALSE(touch_hal_proximity_pad_check(touch_num), ESP_ERR_INVALID_ARG, TOUCH_TAG,  "touch num is not proximity");
+    TOUCH_NULL_POINTER_CHECK(measure_out, "measure_out");
     TOUCH_ENTER_CRITICAL_SAFE();
     touch_hal_read_benchmark(touch_num, measure_out);
     TOUCH_EXIT_CRITICAL_SAFE();
@@ -524,6 +541,7 @@ esp_err_t touch_pad_proximity_get_data(touch_pad_t touch_num, uint32_t *measure_
 
 esp_err_t touch_pad_sleep_channel_get_info(touch_pad_sleep_channel_t *slp_config)
 {
+    TOUCH_NULL_POINTER_CHECK(slp_config, "slp_config");
     TOUCH_ENTER_CRITICAL_SAFE();
     touch_hal_sleep_channel_get_config(slp_config);
     TOUCH_EXIT_CRITICAL_SAFE();
@@ -556,6 +574,7 @@ esp_err_t touch_pad_sleep_channel_enable_proximity(touch_pad_t pad_num, bool ena
 
 esp_err_t touch_pad_sleep_get_channel_num(touch_pad_t *pad_num)
 {
+    TOUCH_NULL_POINTER_CHECK(pad_num, "pad_num");
     TOUCH_ENTER_CRITICAL();
     touch_hal_sleep_get_channel_num(pad_num);
     TOUCH_EXIT_CRITICAL();
@@ -572,6 +591,7 @@ esp_err_t touch_pad_sleep_set_threshold(touch_pad_t pad_num, uint32_t touch_thre
 
 esp_err_t touch_pad_sleep_get_threshold(touch_pad_t pad_num, uint32_t *touch_thres)
 {
+    TOUCH_NULL_POINTER_CHECK(touch_thres, "touch_thres");
     TOUCH_ENTER_CRITICAL();
     touch_hal_sleep_get_threshold(touch_thres);
     TOUCH_EXIT_CRITICAL();
@@ -580,6 +600,7 @@ esp_err_t touch_pad_sleep_get_threshold(touch_pad_t pad_num, uint32_t *touch_thr
 
 esp_err_t touch_pad_sleep_channel_read_benchmark(touch_pad_t pad_num, uint32_t *benchmark)
 {
+    TOUCH_NULL_POINTER_CHECK(benchmark, "benchmark");
     TOUCH_ENTER_CRITICAL_SAFE();
     touch_hal_sleep_read_benchmark(benchmark);
     TOUCH_EXIT_CRITICAL_SAFE();
@@ -588,6 +609,7 @@ esp_err_t touch_pad_sleep_channel_read_benchmark(touch_pad_t pad_num, uint32_t *
 
 esp_err_t touch_pad_sleep_channel_read_smooth(touch_pad_t pad_num, uint32_t *smooth_data)
 {
+    TOUCH_NULL_POINTER_CHECK(smooth_data, "smooth_data");
     TOUCH_ENTER_CRITICAL_SAFE();
     touch_hal_sleep_read_smooth(smooth_data);
     TOUCH_EXIT_CRITICAL_SAFE();
@@ -596,6 +618,7 @@ esp_err_t touch_pad_sleep_channel_read_smooth(touch_pad_t pad_num, uint32_t *smo
 
 esp_err_t touch_pad_sleep_channel_read_data(touch_pad_t pad_num, uint32_t *raw_data)
 {
+    TOUCH_NULL_POINTER_CHECK(raw_data, "raw_data");
     TOUCH_ENTER_CRITICAL_SAFE();
     touch_hal_sleep_read_data(raw_data);
     TOUCH_EXIT_CRITICAL_SAFE();
@@ -612,12 +635,14 @@ esp_err_t touch_pad_sleep_channel_reset_benchmark(void)
 
 esp_err_t touch_pad_sleep_channel_read_debounce(touch_pad_t pad_num, uint32_t *debounce)
 {
+    TOUCH_NULL_POINTER_CHECK(debounce, "debounce");
     touch_hal_sleep_read_debounce(debounce);
     return ESP_OK;
 }
 
 esp_err_t touch_pad_sleep_channel_read_proximity_cnt(touch_pad_t pad_num, uint32_t *approach_cnt)
 {
+    TOUCH_NULL_POINTER_CHECK(approach_cnt, "approach_cnt");
     touch_hal_sleep_read_proximity_cnt(approach_cnt);
     return ESP_OK;
 }

components/driver/esp32s3/include/driver/touch_sensor.h

@@ -6,12 +6,12 @@
 
 #pragma once
 
+#include "driver/touch_sensor_common.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#include "driver/touch_sensor_common.h"
-
 /**
  * @brief Set touch sensor FSM start
  * @note  Start FSM after the touch sensor FSM mode is set.
@@ -180,6 +180,7 @@ uint32_t touch_pad_read_intr_status_mask(void);
 
 /**
  * @brief Enable touch sensor interrupt by bitmask.
+ * @note  This API can be called in ISR handler.
  * @param int_mask Pad mask to enable interrupts
  * @return
  *      - ESP_OK on success
@@ -188,6 +189,7 @@ esp_err_t touch_pad_intr_enable(touch_pad_intr_mask_t int_mask);
 
 /**
  * @brief Disable touch sensor interrupt by bitmask.
+ * @note  This API can be called in ISR handler.
  * @param int_mask Pad mask to disable interrupts
  * @return
  *      - ESP_OK on success
@@ -291,7 +293,7 @@ esp_err_t touch_pad_reset_benchmark(touch_pad_t touch_num);
  * @return
  *     - ESP_OK Success
  */
-esp_err_t touch_pad_filter_set_config(touch_filter_config_t *filter_info);
+esp_err_t touch_pad_filter_set_config(const touch_filter_config_t *filter_info);
 
 /**
  * @brief get parameter of touch sensor filter and detection algorithm.
@@ -329,7 +331,7 @@ esp_err_t touch_pad_filter_disable(void);
  * @return
  *     - ESP_OK Success
  */
-esp_err_t touch_pad_denoise_set_config(touch_pad_denoise_t *denoise);
+esp_err_t touch_pad_denoise_set_config(const touch_pad_denoise_t *denoise);
 
 /**
  * @brief get parameter of denoise pad (TOUCH_PAD_NUM0).
@@ -378,7 +380,7 @@ esp_err_t touch_pad_denoise_read_data(uint32_t *data);
  * @return
  *     - ESP_OK Success
  */
-esp_err_t touch_pad_waterproof_set_config(touch_pad_waterproof_t *waterproof);
+esp_err_t touch_pad_waterproof_set_config(const touch_pad_waterproof_t *waterproof);
 
 /**
  * @brief get parameter of waterproof function.

components/driver/esp32s3/touch_sensor.c

@@ -0,0 +1,628 @@
+/*
+ * SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <esp_types.h>
+#include <stdlib.h>
+#include <ctype.h>
+#include "esp_log.h"
+#include "sys/lock.h"
+#include "soc/soc_pins.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/xtensa_api.h"
+#include "freertos/semphr.h"
+#include "freertos/timers.h"
+#include "esp_intr_alloc.h"
+#include "driver/rtc_io.h"
+#include "driver/touch_pad.h"
+#include "driver/rtc_cntl.h"
+#include "driver/gpio.h"
+#include "sdkconfig.h"
+#include "esp_check.h"
+
+#include "hal/touch_sensor_types.h"
+#include "hal/touch_sensor_hal.h"
+
+#ifndef NDEBUG
+// Enable built-in checks in queue.h in debug builds
+#define INVARIANTS
+#endif
+#include "sys/queue.h"
+
+#define TOUCH_PAD_FILTER_FACTOR_DEFAULT   (4)   // IIR filter coefficient.
+#define TOUCH_PAD_SHIFT_DEFAULT           (4)   // Increase computing accuracy.
+#define TOUCH_PAD_SHIFT_ROUND_DEFAULT     (8)   // ROUND = 2^(n-1); rounding off for fractional.
+#define TOUCH_PAD_MEASURE_WAIT_DEFAULT  (0xFF)  // The timer frequency is 8Mhz, the max value is 0xff
+
+static const char *TOUCH_TAG = "TOUCH_SENSOR";
+
+#define TOUCH_CHANNEL_CHECK(channel) do { \
+        ESP_RETURN_ON_FALSE(channel < SOC_TOUCH_SENSOR_NUM && channel >= 0, ESP_ERR_INVALID_ARG, TOUCH_TAG,  "Touch channel error"); \
+        ESP_RETURN_ON_FALSE(channel != SOC_TOUCH_DENOISE_CHANNEL, ESP_ERR_INVALID_ARG, TOUCH_TAG,  "TOUCH0 is internal denoise channel"); \
+    } while (0);
+#define TOUCH_CH_MASK_CHECK(mask) ESP_RETURN_ON_FALSE((mask <= TOUCH_PAD_BIT_MASK_ALL), ESP_ERR_INVALID_ARG, TOUCH_TAG,  "touch channel bitmask error");
+#define TOUCH_INTR_MASK_CHECK(mask) ESP_RETURN_ON_FALSE(mask & TOUCH_PAD_INTR_MASK_ALL, ESP_ERR_INVALID_ARG, TOUCH_TAG,  "intr mask error");
+#define TOUCH_NULL_POINTER_CHECK(p, name) ESP_RETURN_ON_FALSE((p), ESP_ERR_INVALID_ARG, TOUCH_TAG, "input param '"name"' is NULL")
+#define TOUCH_PARAM_CHECK_STR(s)           ""s" parameter error"
+
+extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate position after the rtc module is finished.
+#define TOUCH_ENTER_CRITICAL_SAFE()  portENTER_CRITICAL_SAFE(&rtc_spinlock) // Can be called in isr and task.
+#define TOUCH_EXIT_CRITICAL_SAFE()  portEXIT_CRITICAL_SAFE(&rtc_spinlock)
+#define TOUCH_ENTER_CRITICAL()  portENTER_CRITICAL(&rtc_spinlock)
+#define TOUCH_EXIT_CRITICAL()  portEXIT_CRITICAL(&rtc_spinlock)
+
+static SemaphoreHandle_t rtc_touch_mux = NULL;
+
+/*---------------------------------------------------------------
+                    Touch Pad
+---------------------------------------------------------------*/
+
+esp_err_t touch_pad_isr_register(intr_handler_t fn, void *arg, touch_pad_intr_mask_t intr_mask)
+{
+    ESP_RETURN_ON_FALSE(fn, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("intr_mask"));
+    TOUCH_INTR_MASK_CHECK(intr_mask);
+
+    uint32_t en_msk = 0;
+    if (intr_mask & TOUCH_PAD_INTR_MASK_DONE) {
+        en_msk |= RTC_CNTL_TOUCH_DONE_INT_ST_M;
+    }
+    if (intr_mask & TOUCH_PAD_INTR_MASK_ACTIVE) {
+        en_msk |= RTC_CNTL_TOUCH_ACTIVE_INT_ST_M;
+    }
+    if (intr_mask & TOUCH_PAD_INTR_MASK_INACTIVE) {
+        en_msk |= RTC_CNTL_TOUCH_INACTIVE_INT_ST_M;
+    }
+    if (intr_mask & TOUCH_PAD_INTR_MASK_SCAN_DONE) {
+        en_msk |= RTC_CNTL_TOUCH_SCAN_DONE_INT_ST_M;
+    }
+    if (intr_mask & TOUCH_PAD_INTR_MASK_TIMEOUT) {
+        en_msk |= RTC_CNTL_TOUCH_TIMEOUT_INT_ST_M;
+    }
+#if SOC_TOUCH_PROXIMITY_MEAS_DONE_SUPPORTED
+    if (intr_mask & TOUCH_PAD_INTR_MASK_PROXI_MEAS_DONE) {
+        en_msk |= RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ST_M;
+    }
+#endif
+    esp_err_t ret = rtc_isr_register(fn, arg, en_msk);
+
+    return ret;
+}
+
+esp_err_t touch_pad_set_meas_time(uint16_t sleep_cycle, uint16_t meas_times)
+{
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_set_meas_times(meas_times);
+    touch_hal_set_sleep_time(sleep_cycle);
+    TOUCH_EXIT_CRITICAL();
+
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_get_meas_time(uint16_t *sleep_cycle, uint16_t *meas_times)
+{
+    TOUCH_NULL_POINTER_CHECK(sleep_cycle, "sleep_cycle");
+    TOUCH_NULL_POINTER_CHECK(meas_times, "meas_times");
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_get_measure_times(meas_times);
+    touch_hal_get_sleep_time(sleep_cycle);
+    TOUCH_EXIT_CRITICAL();
+
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_set_idle_channel_connect(touch_pad_conn_type_t type)
+{
+    ESP_RETURN_ON_FALSE(type < TOUCH_PAD_CONN_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("type"));
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_set_idle_channel_connect(type);
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_get_idle_channel_connect(touch_pad_conn_type_t *type)
+{
+    TOUCH_NULL_POINTER_CHECK(type, "type");
+    touch_hal_get_idle_channel_connect(type);
+    return ESP_OK;
+}
+
+bool touch_pad_meas_is_done(void)
+{
+    return touch_hal_meas_is_done();
+}
+
+esp_err_t touch_pad_set_channel_mask(uint16_t enable_mask)
+{
+    TOUCH_CH_MASK_CHECK(enable_mask);
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_set_channel_mask(enable_mask);
+    TOUCH_EXIT_CRITICAL();
+
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_get_channel_mask(uint16_t *enable_mask)
+{
+    TOUCH_NULL_POINTER_CHECK(enable_mask, "enable_mask");
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_get_channel_mask(enable_mask);
+    TOUCH_EXIT_CRITICAL();
+
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_clear_channel_mask(uint16_t enable_mask)
+{
+    TOUCH_CH_MASK_CHECK(enable_mask);
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_clear_channel_mask(enable_mask);
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+touch_pad_t IRAM_ATTR touch_pad_get_current_meas_channel(void)
+{
+    return (touch_pad_t)touch_hal_get_current_meas_channel();
+}
+
+esp_err_t touch_pad_intr_enable(touch_pad_intr_mask_t int_mask)
+{
+    if (!(int_mask & TOUCH_PAD_INTR_MASK_ALL)) {
+        return ESP_ERR_INVALID_ARG;
+    }
+    TOUCH_ENTER_CRITICAL_SAFE();
+    touch_hal_intr_enable(int_mask);
+    TOUCH_EXIT_CRITICAL_SAFE();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_intr_disable(touch_pad_intr_mask_t int_mask)
+{
+    if (!(int_mask & TOUCH_PAD_INTR_MASK_ALL)) {
+        return ESP_ERR_INVALID_ARG;
+    }
+    TOUCH_ENTER_CRITICAL_SAFE();
+    touch_hal_intr_disable(int_mask);
+    TOUCH_EXIT_CRITICAL_SAFE();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_intr_clear(touch_pad_intr_mask_t int_mask)
+{
+    TOUCH_INTR_MASK_CHECK(int_mask);
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_intr_clear(int_mask);
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+uint32_t touch_pad_read_intr_status_mask(void)
+{
+    return touch_hal_read_intr_status_mask();
+}
+
+esp_err_t touch_pad_timeout_set(bool enable, uint32_t threshold)
+{
+    TOUCH_ENTER_CRITICAL();
+    if (enable) {
+        touch_hal_timeout_enable();
+    } else {
+        touch_hal_timeout_disable();
+    }
+    touch_hal_timeout_set_threshold(threshold);
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_timeout_get_threshold(uint32_t *threshold)
+{
+    TOUCH_NULL_POINTER_CHECK(threshold, "threshold");
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_timeout_get_threshold(threshold);
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_timeout_resume(void)
+{
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_timer_force_done();
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_config(touch_pad_t touch_num)
+{
+    TOUCH_CHANNEL_CHECK(touch_num);
+
+    touch_pad_io_init(touch_num);
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_config(touch_num);
+    touch_hal_set_channel_mask(BIT(touch_num));
+    TOUCH_EXIT_CRITICAL();
+
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_init(void)
+{
+    if (rtc_touch_mux == NULL) {
+        rtc_touch_mux = xSemaphoreCreateMutex();
+    }
+    if (rtc_touch_mux == NULL) {
+        return ESP_ERR_NO_MEM;
+    }
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_init();
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_deinit(void)
+{
+    ESP_RETURN_ON_FALSE(rtc_touch_mux, ESP_FAIL, TOUCH_TAG,  "Touch pad not initialized");
+    xSemaphoreTake(rtc_touch_mux, portMAX_DELAY);
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_deinit();
+    TOUCH_EXIT_CRITICAL();
+    xSemaphoreGive(rtc_touch_mux);
+    vSemaphoreDelete(rtc_touch_mux);
+    rtc_touch_mux = NULL;
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_reset(void)
+{
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_reset();
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t IRAM_ATTR touch_pad_read_raw_data(touch_pad_t touch_num, uint32_t *raw_data)
+{
+    TOUCH_CHANNEL_CHECK(touch_num);
+    TOUCH_NULL_POINTER_CHECK(raw_data, "raw_data");
+    TOUCH_ENTER_CRITICAL_SAFE();
+    *raw_data = touch_hal_read_raw_data(touch_num);
+    TOUCH_EXIT_CRITICAL_SAFE();
+    return ESP_OK;
+}
+
+esp_err_t IRAM_ATTR touch_pad_filter_read_smooth(touch_pad_t touch_num, uint32_t *smooth_data)
+{
+    TOUCH_CHANNEL_CHECK(touch_num);
+    TOUCH_NULL_POINTER_CHECK(smooth_data, "smooth_data");
+    TOUCH_ENTER_CRITICAL_SAFE();
+    touch_hal_filter_read_smooth(touch_num, smooth_data);
+    TOUCH_EXIT_CRITICAL_SAFE();
+    return ESP_OK;
+}
+
+esp_err_t IRAM_ATTR touch_pad_read_benchmark(touch_pad_t touch_num, uint32_t *benchmark)
+{
+    TOUCH_CHANNEL_CHECK(touch_num);
+    TOUCH_NULL_POINTER_CHECK(benchmark, "benchmark");
+    TOUCH_ENTER_CRITICAL_SAFE();
+    touch_hal_read_benchmark(touch_num, benchmark);
+    TOUCH_EXIT_CRITICAL_SAFE();
+    return ESP_OK;
+}
+
+/* Should be call after clk enable and filter enable. */
+esp_err_t touch_pad_reset_benchmark(touch_pad_t touch_num)
+{
+    ESP_RETURN_ON_FALSE(touch_num <= TOUCH_PAD_MAX && touch_num >= 0, ESP_ERR_INVALID_ARG, TOUCH_TAG,  "Touch channel error");
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_reset_benchmark(touch_num);
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_filter_set_config(const touch_filter_config_t *filter_info)
+{
+    TOUCH_NULL_POINTER_CHECK(filter_info, "filter_info");
+    ESP_RETURN_ON_FALSE(filter_info->mode < TOUCH_PAD_FILTER_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("mode"));
+    ESP_RETURN_ON_FALSE(filter_info->debounce_cnt <= TOUCH_DEBOUNCE_CNT_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("debounce"));
+    ESP_RETURN_ON_FALSE(filter_info->noise_thr <= TOUCH_NOISE_THR_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("noise"));
+    ESP_RETURN_ON_FALSE(filter_info->jitter_step <= TOUCH_JITTER_STEP_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("jitter_step"));
+    ESP_RETURN_ON_FALSE(filter_info->smh_lvl < TOUCH_PAD_SMOOTH_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("smooth level"));
+
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_filter_set_config(filter_info);
+    TOUCH_EXIT_CRITICAL();
+
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_filter_get_config(touch_filter_config_t *filter_info)
+{
+    TOUCH_NULL_POINTER_CHECK(filter_info, "filter_info");
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_filter_get_config(filter_info);
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_filter_enable(void)
+{
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_filter_enable();
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_filter_disable(void)
+{
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_filter_disable();
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_denoise_enable(void)
+{
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_clear_channel_mask(BIT(SOC_TOUCH_DENOISE_CHANNEL));
+    touch_hal_denoise_enable();
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_denoise_disable(void)
+{
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_denoise_disable();
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_denoise_set_config(const touch_pad_denoise_t *denoise)
+{
+    TOUCH_NULL_POINTER_CHECK(denoise, "denoise");
+    ESP_RETURN_ON_FALSE(denoise->grade < TOUCH_PAD_DENOISE_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("grade"));
+    ESP_RETURN_ON_FALSE(denoise->cap_level < TOUCH_PAD_DENOISE_CAP_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("cap_level"));
+
+    const touch_hal_meas_mode_t meas = {
+        .slope = TOUCH_PAD_SLOPE_DEFAULT,
+        .tie_opt = TOUCH_PAD_TIE_OPT_DEFAULT,
+    };
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_set_meas_mode(SOC_TOUCH_DENOISE_CHANNEL, &meas);
+    touch_hal_denoise_set_config(denoise);
+    TOUCH_EXIT_CRITICAL();
+
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_denoise_get_config(touch_pad_denoise_t *denoise)
+{
+    TOUCH_NULL_POINTER_CHECK(denoise, "denoise");
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_denoise_get_config(denoise);
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_denoise_read_data(uint32_t *data)
+{
+    touch_hal_denoise_read_data(data);
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_waterproof_set_config(const touch_pad_waterproof_t *waterproof)
+{
+    TOUCH_NULL_POINTER_CHECK(waterproof, "waterproof");
+    ESP_RETURN_ON_FALSE(waterproof->guard_ring_pad < SOC_TOUCH_SENSOR_NUM, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("pad"));
+    ESP_RETURN_ON_FALSE(waterproof->shield_driver < TOUCH_PAD_SHIELD_DRV_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("shield_driver"));
+
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_waterproof_set_config(waterproof);
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_waterproof_get_config(touch_pad_waterproof_t *waterproof)
+{
+    TOUCH_NULL_POINTER_CHECK(waterproof, "waterproof");
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_waterproof_get_config(waterproof);
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_waterproof_enable(void)
+{
+    touch_pad_io_init(SOC_TOUCH_SHIELD_CHANNEL);
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_waterproof_enable();
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_waterproof_disable(void)
+{
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_waterproof_disable();
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_proximity_enable(touch_pad_t touch_num, bool enabled)
+{
+    esp_err_t ret = ESP_OK;
+    ESP_RETURN_ON_FALSE(touch_num < TOUCH_PAD_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  "Touch channel error");
+
+    TOUCH_ENTER_CRITICAL();
+    if (!touch_hal_enable_proximity(touch_num, enabled)) {
+        ret = ESP_ERR_NOT_SUPPORTED;
+    }
+    TOUCH_EXIT_CRITICAL();
+    return ret;
+}
+
+esp_err_t touch_pad_proximity_set_count(touch_pad_t touch_num, uint32_t count)
+{
+    ESP_RETURN_ON_FALSE(count <= TOUCH_PROXIMITY_MEAS_NUM_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("measure count"));
+
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_proximity_set_meas_times(count);
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_proximity_get_count(touch_pad_t touch_num, uint32_t *count)
+{
+    ESP_RETURN_ON_FALSE(count, ESP_ERR_INVALID_ARG, TOUCH_TAG,  TOUCH_PARAM_CHECK_STR("measure count"));
+
+    TOUCH_ENTER_CRITICAL_SAFE();
+    touch_hal_proximity_get_meas_times(count);
+    TOUCH_EXIT_CRITICAL_SAFE();
+    return ESP_OK;
+}
+
+/**
+ * @brief Get measure count of proximity channel.
+ *        The proximity sensor measurement is the accumulation of touch channel measurements.
+ * @param touch_num touch pad index
+ * @param cnt Pointer to receive proximity channel measurement count
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_ERR_INVALID_ARG parameter is NULL
+ */
+esp_err_t touch_pad_proximity_read_meas_cnt(touch_pad_t touch_num, uint32_t *cnt)
+{
+    TOUCH_NULL_POINTER_CHECK(cnt, "cnt");
+    ESP_RETURN_ON_FALSE(touch_hal_proximity_pad_check(touch_num), ESP_ERR_INVALID_ARG, TOUCH_TAG,  "touch num is not proximity");
+    TOUCH_ENTER_CRITICAL_SAFE();
+    touch_hal_proximity_read_meas_cnt(touch_num, cnt);
+    TOUCH_EXIT_CRITICAL_SAFE();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_proximity_get_data(touch_pad_t touch_num, uint32_t *measure_out)
+{
+    TOUCH_NULL_POINTER_CHECK(measure_out, "measure_out");
+    ESP_RETURN_ON_FALSE(touch_hal_proximity_pad_check(touch_num), ESP_ERR_INVALID_ARG, TOUCH_TAG,  "touch num is not proximity");
+    TOUCH_ENTER_CRITICAL_SAFE();
+    touch_hal_read_benchmark(touch_num, measure_out);
+    TOUCH_EXIT_CRITICAL_SAFE();
+    return ESP_OK;
+}
+
+/************** sleep pad setting ***********************/
+
+esp_err_t touch_pad_sleep_channel_get_info(touch_pad_sleep_channel_t *slp_config)
+{
+    TOUCH_NULL_POINTER_CHECK(slp_config, "slp_config");
+    TOUCH_ENTER_CRITICAL_SAFE();
+    touch_hal_sleep_channel_get_config(slp_config);
+    TOUCH_EXIT_CRITICAL_SAFE();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_sleep_channel_enable(touch_pad_t pad_num, bool enable)
+{
+    TOUCH_CHANNEL_CHECK(pad_num);
+
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_sleep_channel_enable(pad_num, enable);
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_sleep_channel_enable_proximity(touch_pad_t pad_num, bool enable)
+{
+    TOUCH_CHANNEL_CHECK(pad_num);
+
+    TOUCH_ENTER_CRITICAL();
+    if (enable) {
+        touch_hal_sleep_enable_approach();
+    } else {
+        touch_hal_sleep_disable_approach();
+    }
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_sleep_get_channel_num(touch_pad_t *pad_num)
+{
+    TOUCH_NULL_POINTER_CHECK(pad_num, "pad_num");
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_sleep_get_channel_num(pad_num);
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_sleep_set_threshold(touch_pad_t pad_num, uint32_t touch_thres)
+{
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_sleep_set_threshold(touch_thres);
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_sleep_get_threshold(touch_pad_t pad_num, uint32_t *touch_thres)
+{
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_sleep_get_threshold(touch_thres);
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_sleep_channel_read_benchmark(touch_pad_t pad_num, uint32_t *benchmark)
+{
+    TOUCH_NULL_POINTER_CHECK(benchmark, "benchmark");
+    TOUCH_ENTER_CRITICAL_SAFE();
+    touch_hal_sleep_read_benchmark(benchmark);
+    TOUCH_EXIT_CRITICAL_SAFE();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_sleep_channel_read_smooth(touch_pad_t pad_num, uint32_t *smooth_data)
+{
+    TOUCH_NULL_POINTER_CHECK(smooth_data, "smooth_data");
+    TOUCH_ENTER_CRITICAL_SAFE();
+    touch_hal_sleep_read_smooth(smooth_data);
+    TOUCH_EXIT_CRITICAL_SAFE();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_sleep_channel_read_data(touch_pad_t pad_num, uint32_t *raw_data)
+{
+    TOUCH_NULL_POINTER_CHECK(raw_data, "raw_data");
+    TOUCH_ENTER_CRITICAL_SAFE();
+    touch_hal_sleep_read_data(raw_data);
+    TOUCH_EXIT_CRITICAL_SAFE();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_sleep_channel_reset_benchmark(void)
+{
+    TOUCH_ENTER_CRITICAL();
+    touch_hal_sleep_reset_benchmark();
+    TOUCH_EXIT_CRITICAL();
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_sleep_channel_read_debounce(touch_pad_t pad_num, uint32_t *debounce)
+{
+    TOUCH_NULL_POINTER_CHECK(debounce, "debounce");
+    touch_hal_sleep_read_debounce(debounce);
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_sleep_channel_read_proximity_cnt(touch_pad_t pad_num, uint32_t *approach_cnt)
+{
+    TOUCH_NULL_POINTER_CHECK(approach_cnt, "approach_cnt");
+    touch_hal_sleep_read_proximity_cnt(approach_cnt);
+    return ESP_OK;
+}
+
+esp_err_t touch_pad_sleep_channel_set_work_time(uint16_t sleep_cycle, uint16_t meas_times)
+{
+    touch_hal_sleep_channel_set_work_time(sleep_cycle, meas_times);
+    return ESP_OK;
+}

components/driver/i2s.c

@@ -1550,10 +1550,10 @@ static esp_err_t i2s_check_cfg_validity(i2s_port_t i2s_num, i2s_hal_config_t *cf
     if (cfg->mode & I2S_MODE_PDM) {
         ESP_RETURN_ON_FALSE(i2s_num == I2S_NUM_0, ESP_ERR_INVALID_ARG, TAG, "I2S PDM mode only support on I2S0");
 #if !SOC_I2S_SUPPORTS_PDM_TX
-        ESP_RETURN_ON_FALSE(cfg->mode & I2S_MODE_TX, ESP_ERR_INVALID_ARG, TAG, "PDM does not support TX on this chip");
+        ESP_RETURN_ON_FALSE(!(cfg->mode & I2S_MODE_TX), ESP_ERR_INVALID_ARG, TAG, "PDM does not support TX on this chip");
 #endif // SOC_I2S_SUPPORTS_PDM_TX
 #if !SOC_I2S_SUPPORTS_PDM_RX
-        ESP_RETURN_ON_FALSE(cfg->mode & I2S_MODE_RX, ESP_ERR_INVALID_ARG, TAG, "PDM does not support RX on this chip");
+        ESP_RETURN_ON_FALSE(!(cfg->mode & I2S_MODE_RX), ESP_ERR_INVALID_ARG, TAG, "PDM does not support RX on this chip");
 #endif // SOC_I2S_SUPPORTS_PDM_RX
     }
 #else

components/driver/include/driver/rmt.h

@@ -856,16 +856,35 @@ esp_err_t rmt_remove_channel_from_group(rmt_channel_t channel);
 
 #if SOC_RMT_SUPPORT_TX_LOOP_COUNT
 /**
- * @brief Set loop count for RMT TX channel
+ * @brief Set loop count threshold value for RMT TX channel
+ *
+ * When tx loop count reaches this value, an ISR callback will notify user
  *
  * @param channel RMT channel
- * @param count loop count
+ * @param count loop count, 1 ~ 1023
  * @return
  *      - ESP_ERR_INVALID_ARG Parameter error
  *      - ESP_OK Success
  */
 esp_err_t rmt_set_tx_loop_count(rmt_channel_t channel, uint32_t count);
-#endif
+
+/**
+ * @brief Enable or disable the feature that when loop count reaches the threshold, RMT will stop transmitting.
+ *
+ * - When the loop auto-stop feature is enabled will halt RMT transmission after the loop count reaches a certain threshold
+ * - When disabled, the RMT transmission continue indefinitely until halted by the users
+ *
+ * @note The auto-stop feature is implemented in hardware on particular targets (i.e. those with SOC_RMT_SUPPORT_TX_LOOP_AUTOSTOP defined).
+ *       Otherwise, the auto-stop feature is implemented in software via the interrupt.
+ *
+ * @param channel RMT channel
+ * @param en enable bit
+ * @return
+ *      - ESP_ERR_INVALID_ARG Parameter error
+ *      - ESP_OK Success
+ */
+esp_err_t rmt_enable_tx_loop_autostop(rmt_channel_t channel, bool en);
+#endif // SOC_RMT_SUPPORT_TX_LOOP_COUNT
 
 /**
 * @brief Reset RMT TX/RX memory index.

components/driver/rmt.c

@@ -74,6 +74,7 @@ typedef struct {
     size_t tx_sub_len;
     bool translator;
     bool wait_done; //Mark whether wait tx done.
+    bool loop_autostop; // mark whether loop auto-stop is enabled
     rmt_channel_t channel;
     const rmt_item32_t *tx_data;
     xSemaphoreHandle tx_sem;
@@ -892,6 +893,13 @@ static void IRAM_ATTR rmt_driver_isr_default(void *arg)
         status &= ~(1 << channel);
         rmt_obj_t *p_rmt = p_rmt_obj[channel];
         if (p_rmt) {
+            if (p_rmt->loop_autostop) {
+#ifndef SOC_RMT_SUPPORT_TX_LOOP_AUTOSTOP
+                // hardware doesn't support automatically stop output so driver should stop output here (possibility already overshotted several us)
+                rmt_ll_tx_stop(rmt_contex.hal.regs, channel);
+                rmt_ll_tx_reset_pointer(rmt_contex.hal.regs, channel);
+#endif
+            }
             xSemaphoreGiveFromISR(p_rmt->tx_sem, &HPTaskAwoken);
             if (rmt_contex.rmt_tx_end_callback.function) {
                 rmt_contex.rmt_tx_end_callback.function(channel,  rmt_contex.rmt_tx_end_callback.arg);
@@ -1039,6 +1047,7 @@ esp_err_t rmt_driver_install(rmt_channel_t channel, size_t rx_buf_size, int intr
     p_rmt_obj[channel]->tx_offset = 0;
     p_rmt_obj[channel]->tx_sub_len = 0;
     p_rmt_obj[channel]->wait_done = false;
+    p_rmt_obj[channel]->loop_autostop = false;
     p_rmt_obj[channel]->translator = false;
     p_rmt_obj[channel]->sample_to_rmt = NULL;
     if (p_rmt_obj[channel]->tx_sem == NULL) {
@@ -1365,9 +1374,22 @@ esp_err_t rmt_memory_rw_rst(rmt_channel_t channel)
 esp_err_t rmt_set_tx_loop_count(rmt_channel_t channel, uint32_t count)
 {
     ESP_RETURN_ON_FALSE(RMT_IS_TX_CHANNEL(channel), ESP_ERR_INVALID_ARG, TAG, RMT_CHANNEL_ERROR_STR);
+    ESP_RETURN_ON_FALSE(count <= RMT_LL_MAX_LOOP_COUNT, ESP_ERR_INVALID_ARG, TAG, "Invalid count value");
     RMT_ENTER_CRITICAL();
     rmt_ll_tx_set_loop_count(rmt_contex.hal.regs, channel, count);
     RMT_EXIT_CRITICAL();
     return ESP_OK;
 }
+
+esp_err_t rmt_enable_tx_loop_autostop(rmt_channel_t channel, bool en)
+{
+    ESP_RETURN_ON_FALSE(RMT_IS_TX_CHANNEL(channel), ESP_ERR_INVALID_ARG, TAG, RMT_CHANNEL_ERROR_STR);
+    p_rmt_obj[channel]->loop_autostop = en;
+#if SOC_RMT_SUPPORT_TX_LOOP_AUTOSTOP
+    RMT_ENTER_CRITICAL();
+    rmt_ll_tx_enable_loop_autostop(rmt_contex.hal.regs, channel, en);
+    RMT_EXIT_CRITICAL();
+#endif
+    return ESP_OK;
+}
 #endif

components/driver/test/touch_sensor_test/test_touch_v2.c

@@ -5,10 +5,10 @@
  */
 
 /*
- Tests for the touch sensor device driver for ESP32-S2 only
+ Tests for the touch sensor device driver for ESP32-S2 & ESP32-S3
 */
 #include "sdkconfig.h"
-#if CONFIG_IDF_TARGET_ESP32S2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
 
 #include <string.h>
 #include "esp_system.h"
@@ -64,9 +64,9 @@ void test_pxp_deinit_io(void)
 #define TOUCH_EXCEED_TIME_MS            (1000)
 
 #define TOUCH_REG_BASE_TEST() ({    \
-   TEST_ASSERT_EQUAL_UINT32(REG_GET_FIELD(RTC_CNTL_DATE_REG, RTC_CNTL_CNTL_DATE), RTCCNTL.date.date);   \
-   TEST_ASSERT_EQUAL_UINT32(REG_GET_FIELD(SENS_SARDATE_REG, SENS_SAR_DATE), SENS.sardate.sar_date);     \
-   TEST_ASSERT_EQUAL_UINT32(REG_GET_FIELD(RTC_IO_DATE_REG, RTC_IO_IO_DATE), RTCIO.date.date);           \
+   TEST_ASSERT_EQUAL_UINT32(REG_READ(RTC_CNTL_DATE_REG), RTCCNTL.date.date);   \
+   TEST_ASSERT_EQUAL_UINT32(REG_READ(SENS_SARDATE_REG), SENS.sardate.sar_date);     \
+   TEST_ASSERT_EQUAL_UINT32(REG_READ(RTC_IO_DATE_REG), RTCIO.date.date);           \
 })
 
 #define TEST_TOUCH_COUNT_NUM    (5)
@@ -1158,15 +1158,34 @@ esp_err_t test_touch_filter_parameter_reset(int reset_cnt)
     printf_touch_hw_read("[raw ] cnt:");
     printf_touch_benchmark_read("[base] cnt:");
 
-    test_touch_measure_step(1);
-    /* ESP32S2 reset benchmark to raw data */
+    /*The benchmark on S2 will track the raw data in real time while the channel is not active.
+      But on S3, it track the smooth data. And due to the latency of the smooth data,
+      the benchmark will be updated to the last smooth data. Thus we have to read smooth data here
+      but read benchmark after one measurement step. */
+#if CONFIG_IDF_TARGET_ESP32S3
+    uint32_t smooth_data[TEST_TOUCH_CHANNEL] = {0};
     for (int i = 0; i < TEST_TOUCH_CHANNEL; i++) {
-        TEST_ESP_OK( touch_pad_read_raw_data(touch_list[i], &touch_value) );
-        TEST_ESP_OK( touch_pad_read_benchmark(touch_list[i], &base_value) );
-        TEST_ASSERT_EQUAL_UINT32(base_value, touch_value);
+        TEST_ESP_OK( touch_pad_filter_read_smooth(touch_list[i], &(smooth_data[i])) );
     }
+#endif
+    /* Run 1 time measurement, the benchmark will update after finishing the channel scan*/
+    test_touch_measure_step(1);
     printf_touch_hw_read("[raw ] cnt+1:");
+    printf_touch_smooth_read("[smooth]cnt+1:");
     printf_touch_benchmark_read("[base] cnt+1:");
+    for (int i = 0; i < TEST_TOUCH_CHANNEL; i++) {
+        TEST_ESP_OK( touch_pad_read_benchmark(touch_list[i], &base_value) );
+#if CONFIG_IDF_TARGET_ESP32S2
+        /* In ESP32S3, benchmark will update to the raw data. */
+        TEST_ESP_OK( touch_pad_read_raw_data(touch_list[i], &touch_value) );
+        /* Here we compare the benchmark with raw data directly */
+        TEST_ASSERT_EQUAL_UINT32(base_value, touch_value);
+#elif CONFIG_IDF_TARGET_ESP32S3
+        /* In ESP32S3, benchmark will update to the smooth data. Smooth data is filtered from raw data by IIR.
+           Here we compare the benchmark with the previous smooth data*/
+        TEST_ASSERT_EQUAL_UINT32(base_value, smooth_data[i]);
+#endif
+    }
 
     int test_cnt = 2;
     while (test_cnt--) {
@@ -2115,4 +2134,4 @@ void test_touch_slope_debug(int pad_num)
     TEST_ESP_OK( touch_pad_deinit() );
 }
 
-#endif // CONFIG_IDF_TARGET_ESP32S2
+#endif // CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3

components/esp-tls/esp_tls_mbedtls.c

@@ -500,7 +500,7 @@ esp_err_t set_server_config(esp_tls_cfg_server_t *cfg, esp_tls_t *tls)
             return esp_ret;
         }
     } else {
-        mbedtls_ssl_conf_authmode(&tls->conf, MBEDTLS_SSL_VERIFY_NONE);
+        mbedtls_ssl_conf_authmode(&tls->conf, MBEDTLS_SSL_VERIFY_OPTIONAL);
     }
 
     if (cfg->servercert_buf != NULL && cfg->serverkey_buf != NULL) {

components/esp_eth/test/test_emac.c

@@ -9,10 +9,6 @@
 #include "esp_eth.h"
 #include "esp_log.h"
 #include "esp_http_client.h"
-#include "lwip/inet.h"
-#include "lwip/netdb.h"
-#include "lwip/sockets.h"
-#include "ping/ping_sock.h"
 #include "esp_rom_md5.h"
 #include "soc/soc_caps.h"
 
@@ -24,18 +20,13 @@ static const char *TAG = "esp32_eth_test";
 #define ETH_STOP_BIT BIT(1)
 #define ETH_CONNECT_BIT BIT(2)
 #define ETH_GOT_IP_BIT BIT(3)
-#define ETH_PING_END_BIT BIT(4)
-#define ETH_DOWNLOAD_END_BIT BIT(5)
+#define ETH_DOWNLOAD_END_BIT BIT(4)
 
 #define ETH_START_TIMEOUT_MS (10000)
 #define ETH_CONNECT_TIMEOUT_MS (40000)
 #define ETH_STOP_TIMEOUT_MS (10000)
 #define ETH_GET_IP_TIMEOUT_MS (60000)
 #define ETH_DOWNLOAD_END_TIMEOUT_MS (240000)
-#define ETH_PING_DURATION_MS (5000)
-#define ETH_PING_END_TIMEOUT_MS (ETH_PING_DURATION_MS * 2)
-
-#define TEST_ICMP_DESTINATION_DOMAIN_NAME "127.0.0.1"
 
 extern const char dl_espressif_com_root_cert_pem_start[] asm("_binary_dl_espressif_com_root_cert_pem_start");
 extern const char dl_espressif_com_root_cert_pem_end[]   asm("_binary_dl_espressif_com_root_cert_pem_end");
@@ -86,46 +77,6 @@ static void got_ip_event_handler(void *arg, esp_event_base_t event_base,
     xEventGroupSetBits(eth_event_group, ETH_GOT_IP_BIT);
 }
 
-static void test_on_ping_success(esp_ping_handle_t hdl, void *args)
-{
-    uint8_t ttl;
-    uint16_t seqno;
-    uint32_t elapsed_time, recv_len;
-    ip_addr_t target_addr;
-    esp_ping_get_profile(hdl, ESP_PING_PROF_SEQNO, &seqno, sizeof(seqno));
-    esp_ping_get_profile(hdl, ESP_PING_PROF_TTL, &ttl, sizeof(ttl));
-    esp_ping_get_profile(hdl, ESP_PING_PROF_IPADDR, &target_addr, sizeof(target_addr));
-    esp_ping_get_profile(hdl, ESP_PING_PROF_SIZE, &recv_len, sizeof(recv_len));
-    esp_ping_get_profile(hdl, ESP_PING_PROF_TIMEGAP, &elapsed_time, sizeof(elapsed_time));
-    printf("%d bytes from %s icmp_seq=%d ttl=%d time=%d ms\n",
-           recv_len, inet_ntoa(target_addr.u_addr.ip4), seqno, ttl, elapsed_time);
-}
-
-static void test_on_ping_timeout(esp_ping_handle_t hdl, void *args)
-{
-    uint16_t seqno;
-    ip_addr_t target_addr;
-    esp_ping_get_profile(hdl, ESP_PING_PROF_SEQNO, &seqno, sizeof(seqno));
-    esp_ping_get_profile(hdl, ESP_PING_PROF_IPADDR, &target_addr, sizeof(target_addr));
-    printf("From %s icmp_seq=%d timeout\n", inet_ntoa(target_addr.u_addr.ip4), seqno);
-}
-
-static void test_on_ping_end(esp_ping_handle_t hdl, void *args)
-{
-    EventGroupHandle_t eth_event_group = (EventGroupHandle_t)args;
-    uint32_t transmitted;
-    uint32_t received;
-    uint32_t total_time_ms;
-
-    esp_ping_get_profile(hdl, ESP_PING_PROF_REQUEST, &transmitted, sizeof(transmitted));
-    esp_ping_get_profile(hdl, ESP_PING_PROF_REPLY, &received, sizeof(received));
-    esp_ping_get_profile(hdl, ESP_PING_PROF_DURATION, &total_time_ms, sizeof(total_time_ms));
-    printf("%d packets transmitted, %d received, time %dms\n", transmitted, received, total_time_ms);
-    if (transmitted == received) {
-        xEventGroupSetBits(eth_event_group, ETH_PING_END_BIT);
-    }
-}
-
 static esp_err_t test_uninstall_driver(esp_eth_handle_t eth_hdl, uint32_t ms_to_wait)
 {
     int i = 0;
@@ -306,95 +257,6 @@ TEST_CASE("esp32 ethernet start/stop stress test", "[ethernet][test_env=UT_T2_Et
     vEventGroupDelete(eth_event_group);
 }
 
-TEST_CASE("esp32 ethernet icmp test", "[ethernet][test_env=UT_T2_Ethernet]")
-{
-    EventBits_t bits = 0;
-    EventGroupHandle_t eth_event_group = xEventGroupCreate();
-    TEST_ASSERT(eth_event_group != NULL);
-    test_case_uses_tcpip();
-    TEST_ESP_OK(esp_event_loop_create_default());
-    // create TCP/IP netif
-    esp_netif_config_t netif_cfg = ESP_NETIF_DEFAULT_ETH();
-    esp_netif_t *eth_netif = esp_netif_new(&netif_cfg);
-
-    eth_mac_config_t mac_config = ETH_MAC_DEFAULT_CONFIG();
-    esp_eth_mac_t *mac = esp_eth_mac_new_esp32(&mac_config);
-    eth_phy_config_t phy_config = ETH_PHY_DEFAULT_CONFIG();
-    esp_eth_phy_t *phy = esp_eth_phy_new_ip101(&phy_config);
-    esp_eth_config_t eth_config = ETH_DEFAULT_CONFIG(mac, phy);
-    esp_eth_handle_t eth_handle = NULL;
-    TEST_ESP_OK(esp_eth_driver_install(&eth_config, &eth_handle));
-    // combine driver with netif
-    esp_eth_netif_glue_handle_t glue = esp_eth_new_netif_glue(eth_handle);
-    TEST_ESP_OK(esp_netif_attach(eth_netif, glue));
-    // register user defined event handers
-    TEST_ESP_OK(esp_event_handler_register(ETH_EVENT, ESP_EVENT_ANY_ID, &eth_event_handler, eth_event_group));
-    TEST_ESP_OK(esp_event_handler_register(IP_EVENT, IP_EVENT_ETH_GOT_IP, &got_ip_event_handler, eth_event_group));
-    // start Ethernet driver
-    TEST_ESP_OK(esp_eth_start(eth_handle));
-    /* wait for IP lease */
-    bits = xEventGroupWaitBits(eth_event_group, ETH_GOT_IP_BIT, true, true, pdMS_TO_TICKS(ETH_GET_IP_TIMEOUT_MS));
-    TEST_ASSERT((bits & ETH_GOT_IP_BIT) == ETH_GOT_IP_BIT);
-
-    // Parse IP address
-    ip_addr_t target_addr;
-    struct addrinfo hint;
-    struct addrinfo *res = NULL;
-    memset(&hint, 0, sizeof(hint));
-    memset(&target_addr, 0, sizeof(target_addr));
-    /* convert URL to IP */
-    TEST_ASSERT(getaddrinfo(TEST_ICMP_DESTINATION_DOMAIN_NAME, NULL, &hint, &res) == 0);
-    struct in_addr addr4 = ((struct sockaddr_in *)(res->ai_addr))->sin_addr;
-    inet_addr_to_ip4addr(ip_2_ip4(&target_addr), &addr4);
-    freeaddrinfo(res);
-
-    esp_ping_config_t ping_config = ESP_PING_DEFAULT_CONFIG();
-    ping_config.timeout_ms = 2000;
-    ping_config.target_addr = target_addr;
-    ping_config.count = 0; // ping in infinite mode
-    /* set callback functions */
-    esp_ping_callbacks_t cbs;
-    cbs.on_ping_success = test_on_ping_success;
-    cbs.on_ping_timeout = test_on_ping_timeout;
-    cbs.on_ping_end = test_on_ping_end;
-    cbs.cb_args = eth_event_group;
-
-    esp_ping_handle_t ping;
-    TEST_ESP_OK(esp_ping_new_session(&ping_config, &cbs, &ping));
-    /* start ping */
-    TEST_ESP_OK(esp_ping_start(ping));
-    /* ping for a while */
-    vTaskDelay(pdMS_TO_TICKS(ETH_PING_DURATION_MS));
-    /* stop ping */
-    TEST_ESP_OK(esp_ping_stop(ping));
-    /* wait for end of ping */
-    bits = xEventGroupWaitBits(eth_event_group, ETH_PING_END_BIT, true, true, pdMS_TO_TICKS(ETH_PING_END_TIMEOUT_MS));
-    TEST_ASSERT((bits & ETH_PING_END_BIT) == ETH_PING_END_BIT);
-    /* restart ping */
-    TEST_ESP_OK(esp_ping_start(ping));
-    vTaskDelay(pdMS_TO_TICKS(ETH_PING_DURATION_MS));
-    TEST_ESP_OK(esp_ping_stop(ping));
-    bits = xEventGroupWaitBits(eth_event_group, ETH_PING_END_BIT, true, true, pdMS_TO_TICKS(ETH_PING_END_TIMEOUT_MS));
-    TEST_ASSERT((bits & ETH_PING_END_BIT) == ETH_PING_END_BIT);
-    /* de-initialize ping process */
-    TEST_ESP_OK(esp_ping_delete_session(ping));
-
-    // stop Ethernet driver
-    TEST_ESP_OK(esp_eth_stop(eth_handle));
-    /* wait for connection stop */
-    bits = xEventGroupWaitBits(eth_event_group, ETH_STOP_BIT, true, true, pdMS_TO_TICKS(ETH_STOP_TIMEOUT_MS));
-    TEST_ASSERT((bits & ETH_STOP_BIT) == ETH_STOP_BIT);
-    TEST_ESP_OK(esp_eth_del_netif_glue(glue));
-    /* driver should be uninstalled within 2 seconds */
-    TEST_ESP_OK(test_uninstall_driver(eth_handle, 2000));
-    TEST_ESP_OK(phy->del(phy));
-    TEST_ESP_OK(mac->del(mac));
-    TEST_ESP_OK(esp_event_handler_unregister(IP_EVENT, IP_EVENT_ETH_GOT_IP, got_ip_event_handler));
-    esp_netif_destroy(eth_netif);
-    TEST_ESP_OK(esp_event_loop_delete_default());
-    vEventGroupDelete(eth_event_group);
-}
-
 esp_err_t http_event_handle(esp_http_client_event_t *evt)
 {
     switch (evt->event_id) {

components/esp_https_server/include/esp_https_server.h

@@ -10,6 +10,7 @@
 #include <stdbool.h>
 #include "esp_err.h"
 #include "esp_http_server.h"
+#include "esp_tls.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -20,6 +21,22 @@ typedef enum {
     HTTPD_SSL_TRANSPORT_INSECURE     // SSL disabled
 } httpd_ssl_transport_mode_t;
 
+/**
+ * @brief Callback data struct, contains the ESP-TLS connection handle
+ */
+typedef struct esp_https_server_user_cb_arg {
+    const esp_tls_t *tls;
+} esp_https_server_user_cb_arg_t;
+
+/**
+ * @brief Callback function prototype
+ * Can be used to get connection or client information (SSL context)
+ * E.g. Client certificate, Socket FD, Connection state, etc.
+ *
+ * @param user_cb Callback data struct
+ */
+typedef void esp_https_server_user_cb(esp_https_server_user_cb_arg_t *user_cb);
+
 /**
  * HTTPS server config struct
  *
@@ -66,6 +83,9 @@ struct httpd_ssl_config {
 
     /** Enable tls session tickets */
     bool session_tickets;
+
+    /** User callback for esp_https_server */
+    esp_https_server_user_cb *user_cb;
 };
 
 typedef struct httpd_ssl_config httpd_ssl_config_t;
@@ -113,6 +133,7 @@ typedef struct httpd_ssl_config httpd_ssl_config_t;
     .port_secure = 443,                           \
     .port_insecure = 80,                          \
     .session_tickets = false,                     \
+    .user_cb = NULL,                              \
 }
 
 /**

components/esp_https_server/src/https_server.c

@@ -15,6 +15,7 @@ const static char *TAG = "esp_https_server";
 typedef struct httpd_ssl_ctx {
     esp_tls_cfg_server_t *tls_cfg;
     httpd_open_func_t open_fn;
+    esp_https_server_user_cb *user_cb;
 } httpd_ssl_ctx_t;
 
 /**
@@ -119,6 +120,13 @@ static esp_err_t httpd_ssl_open(httpd_handle_t server, int sockfd)
     if (global_ctx->open_fn) {
         (global_ctx->open_fn)(server, sockfd);
     }
+
+    if (global_ctx->user_cb) {
+        esp_https_server_user_cb_arg_t user_cb_data = {0};
+        user_cb_data.tls = tls;
+        (global_ctx->user_cb)((void *)&user_cb_data);
+    }
+
     return ESP_OK;
 fail:
     esp_tls_server_session_delete(tls);
@@ -172,6 +180,7 @@ static httpd_ssl_ctx_t *create_secure_context(const struct httpd_ssl_config *con
     }
 
     ssl_ctx->tls_cfg = cfg;
+    ssl_ctx->user_cb = config->user_cb;
 /* cacert = CA which signs client cert, or client cert itself , which is mapped to client_verify_cert_pem */
     if(config->client_verify_cert_pem != NULL) {
         cfg->cacert_buf = (unsigned char *)malloc(config->client_verify_cert_len);

components/esp_hw_support/include/esp_sleep.h

@@ -44,6 +44,7 @@ typedef enum {
 #if SOC_PM_SUPPORT_CPU_PD
     ESP_PD_DOMAIN_CPU,             //!< CPU core
 #endif
+    ESP_PD_DOMAIN_RTC8M,           //!< Internal 8M oscillator
     ESP_PD_DOMAIN_VDDSDIO,         //!< VDD_SDIO
     ESP_PD_DOMAIN_MAX              //!< Number of domains
 } esp_sleep_pd_domain_t;

components/esp_hw_support/linker.lf

@@ -11,3 +11,8 @@ entries:
     rtc_time (noflash_text)
     if IDF_TARGET_ESP32C3 = n && IDF_TARGET_ESP32H2 = n:
         rtc_wdt (noflash_text)
+    if IDF_TARGET_ESP32S3 = y:
+        if SPIRAM_MODE_QUAD = y:
+            spiram_psram (noflash)
+        if SPIRAM_MODE_OCT = y:
+            opiram_psram (noflash)

components/esp_hw_support/port/esp32/rtc_sleep.c

@@ -186,9 +186,11 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
         REG_CLR_BIT(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PU);
     }
     //Keep the RTC8M_CLK on in light_sleep mode if the ledc low-speed channel is clocked by RTC8M_CLK.
-    if (!cfg.deep_slp && GET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_DIG_CLK8M_EN_M)) {
+    if (!cfg.int_8m_pd_en && GET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_DIG_CLK8M_EN_M)) {
         REG_CLR_BIT(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PD);
         REG_SET_BIT(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PU);
+    } else {
+        REG_CLR_BIT(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PU);
     }
 
     /* enable VDDSDIO control by state machine */

components/esp_hw_support/port/esp32c3/memprot.c

@@ -19,7 +19,7 @@
 #include "riscv/interrupt.h"
 #include "esp32c3/rom/ets_sys.h"
 #include "esp_log.h"
-
+#include "esp_fault.h"
 #include "soc/cpu.h"
 
 extern int _iram_text_end;
@@ -94,18 +94,18 @@ void *esp_memprot_get_default_main_split_addr()
 uint32_t *esp_memprot_get_split_addr(split_line_t line_type)
 {
     switch ( line_type ) {
-        case MEMPROT_IRAM0_DRAM0_SPLITLINE:
-            return memprot_ll_get_iram0_split_line_main_I_D();
-        case MEMPROT_IRAM0_LINE_0_SPLITLINE:
-            return memprot_ll_get_iram0_split_line_I_0();
-        case MEMPROT_IRAM0_LINE_1_SPLITLINE:
-            return memprot_ll_get_iram0_split_line_I_1();
-        case MEMPROT_DRAM0_DMA_LINE_0_SPLITLINE:
-            return memprot_ll_get_dram0_split_line_D_0();
-        case MEMPROT_DRAM0_DMA_LINE_1_SPLITLINE:
-            return memprot_ll_get_dram0_split_line_D_1();
-        default:
-            abort();
+    case MEMPROT_IRAM0_DRAM0_SPLITLINE:
+        return memprot_ll_get_iram0_split_line_main_I_D();
+    case MEMPROT_IRAM0_LINE_0_SPLITLINE:
+        return memprot_ll_get_iram0_split_line_I_0();
+    case MEMPROT_IRAM0_LINE_1_SPLITLINE:
+        return memprot_ll_get_iram0_split_line_I_1();
+    case MEMPROT_DRAM0_DMA_LINE_0_SPLITLINE:
+        return memprot_ll_get_dram0_split_line_D_0();
+    case MEMPROT_DRAM0_DMA_LINE_1_SPLITLINE:
+        return memprot_ll_get_dram0_split_line_D_1();
+    default:
+        abort();
     }
 }
 
@@ -430,9 +430,9 @@ pms_world_t esp_memprot_get_violate_world(mem_type_prot_t mem_type)
     }
 
     switch ( world ) {
-        case 0x01: return MEMPROT_PMS_WORLD_0;
-        case 0x10: return MEMPROT_PMS_WORLD_1;
-        default: return MEMPROT_PMS_WORLD_INVALID;
+    case 0x01: return MEMPROT_PMS_WORLD_0;
+    case 0x10: return MEMPROT_PMS_WORLD_1;
+    default: return MEMPROT_PMS_WORLD_INVALID;
     }
 }
 
@@ -526,63 +526,65 @@ void esp_memprot_set_prot_int(bool invoke_panic_handler, bool lock_feature, void
         esp_memprot_set_monitor_en(MEMPROT_DRAM0_SRAM, false);
     }
 
-    // do not enable if being debugged
+    //if being debugged check we are not glitched and dont enable Memprot
     if (esp_cpu_in_ocd_debug_mode()) {
-        return;
-    }
+        ESP_FAULT_ASSERT(esp_cpu_in_ocd_debug_mode());
+    } else {
 
-    //panic handling
-    if (invoke_panic_handler) {
+        if (invoke_panic_handler) {
+            if (use_iram0) {
+                esp_memprot_set_intr_matrix(MEMPROT_IRAM0_SRAM);
+            }
+            if (use_dram0) {
+                esp_memprot_set_intr_matrix(MEMPROT_DRAM0_SRAM);
+            }
+        }
+
+        //set split lines (must-have for all mem_types)
+        const void *line_addr = split_addr == NULL ? esp_memprot_get_default_main_split_addr() : split_addr;
+        esp_memprot_set_split_line(MEMPROT_IRAM0_LINE_1_SPLITLINE, line_addr);
+        esp_memprot_set_split_line(MEMPROT_IRAM0_LINE_0_SPLITLINE, line_addr);
+        esp_memprot_set_split_line(MEMPROT_IRAM0_DRAM0_SPLITLINE, line_addr);
+        esp_memprot_set_split_line(MEMPROT_DRAM0_DMA_LINE_0_SPLITLINE,
+                                   (void *) (MAP_IRAM_TO_DRAM((uint32_t) line_addr)));
+        esp_memprot_set_split_line(MEMPROT_DRAM0_DMA_LINE_1_SPLITLINE,
+                                   (void *) (MAP_IRAM_TO_DRAM((uint32_t) line_addr)));
+
+        //set permissions
+        if (required_mem_prot & MEMPROT_IRAM0_SRAM) {
+            esp_memprot_iram_set_pms_area(MEMPROT_IRAM0_PMS_AREA_0, true, false, true);
+            esp_memprot_iram_set_pms_area(MEMPROT_IRAM0_PMS_AREA_1, true, false, true);
+            esp_memprot_iram_set_pms_area(MEMPROT_IRAM0_PMS_AREA_2, true, false, true);
+            esp_memprot_iram_set_pms_area(MEMPROT_IRAM0_PMS_AREA_3, true, true, false);
+        }
+        if (required_mem_prot & MEMPROT_DRAM0_SRAM) {
+            esp_memprot_dram_set_pms_area(MEMPROT_DRAM0_PMS_AREA_0, true, false);
+            esp_memprot_dram_set_pms_area(MEMPROT_DRAM0_PMS_AREA_1, true, true);
+            esp_memprot_dram_set_pms_area(MEMPROT_DRAM0_PMS_AREA_2, true, true);
+            esp_memprot_dram_set_pms_area(MEMPROT_DRAM0_PMS_AREA_3, true, true);
+        }
+
+        //reenable the protection
         if (use_iram0) {
-            esp_memprot_set_intr_matrix(MEMPROT_IRAM0_SRAM);
+            esp_memprot_monitor_clear_intr(MEMPROT_IRAM0_SRAM);
+            esp_memprot_set_monitor_en(MEMPROT_IRAM0_SRAM, true);
         }
         if (use_dram0) {
-            esp_memprot_set_intr_matrix(MEMPROT_DRAM0_SRAM);
+            esp_memprot_monitor_clear_intr(MEMPROT_DRAM0_SRAM);
+            esp_memprot_set_monitor_en(MEMPROT_DRAM0_SRAM, true);
         }
-    }
 
-    //set split lines (must-have for all mem_types)
-    const void *line_addr = split_addr == NULL ? esp_memprot_get_default_main_split_addr() : split_addr;
-    esp_memprot_set_split_line(MEMPROT_IRAM0_LINE_1_SPLITLINE, line_addr);
-    esp_memprot_set_split_line(MEMPROT_IRAM0_LINE_0_SPLITLINE, line_addr);
-    esp_memprot_set_split_line(MEMPROT_IRAM0_DRAM0_SPLITLINE, line_addr);
-    esp_memprot_set_split_line(MEMPROT_DRAM0_DMA_LINE_0_SPLITLINE, (void *)(MAP_IRAM_TO_DRAM((uint32_t)line_addr)));
-    esp_memprot_set_split_line(MEMPROT_DRAM0_DMA_LINE_1_SPLITLINE, (void *)(MAP_IRAM_TO_DRAM((uint32_t)line_addr)));
-
-    //set permissions
-    if (required_mem_prot & MEMPROT_IRAM0_SRAM) {
-        esp_memprot_iram_set_pms_area(MEMPROT_IRAM0_PMS_AREA_0, true, false, true);
-        esp_memprot_iram_set_pms_area(MEMPROT_IRAM0_PMS_AREA_1, true, false, true);
-        esp_memprot_iram_set_pms_area(MEMPROT_IRAM0_PMS_AREA_2, true, false, true);
-        esp_memprot_iram_set_pms_area(MEMPROT_IRAM0_PMS_AREA_3, true, true, false);
-    }
-    if (required_mem_prot & MEMPROT_DRAM0_SRAM) {
-        esp_memprot_dram_set_pms_area( MEMPROT_DRAM0_PMS_AREA_0, true, false );
-        esp_memprot_dram_set_pms_area(MEMPROT_DRAM0_PMS_AREA_1, true, true);
-        esp_memprot_dram_set_pms_area(MEMPROT_DRAM0_PMS_AREA_2, true, true);
-        esp_memprot_dram_set_pms_area(MEMPROT_DRAM0_PMS_AREA_3, true, true);
-    }
-
-    //reenable protection
-    if (use_iram0) {
-        esp_memprot_monitor_clear_intr(MEMPROT_IRAM0_SRAM);
-        esp_memprot_set_monitor_en(MEMPROT_IRAM0_SRAM, true);
-    }
-    if (use_dram0) {
-        esp_memprot_monitor_clear_intr(MEMPROT_DRAM0_SRAM);
-        esp_memprot_set_monitor_en(MEMPROT_DRAM0_SRAM, true);
-    }
-
-    //lock if required
-    if (lock_feature) {
-        esp_memprot_set_split_line_lock();
-        if (use_iram0) {
-            esp_memprot_set_pms_lock(MEMPROT_IRAM0_SRAM);
-            esp_memprot_set_monitor_lock(MEMPROT_IRAM0_SRAM);
-        }
-        if (use_dram0) {
-            esp_memprot_set_pms_lock(MEMPROT_DRAM0_SRAM);
-            esp_memprot_set_monitor_lock(MEMPROT_DRAM0_SRAM);
+        //lock if required
+        if (lock_feature) {
+            esp_memprot_set_split_line_lock();
+            if (use_iram0) {
+                esp_memprot_set_pms_lock(MEMPROT_IRAM0_SRAM);
+                esp_memprot_set_monitor_lock(MEMPROT_IRAM0_SRAM);
+            }
+            if (use_dram0) {
+                esp_memprot_set_pms_lock(MEMPROT_DRAM0_SRAM);
+                esp_memprot_set_monitor_lock(MEMPROT_DRAM0_SRAM);
+            }
         }
     }
 }

components/esp_hw_support/port/esp32c3/rtc_sleep.c

@@ -82,9 +82,11 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
 
     REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DBG_ATTEN_MONITOR, RTC_CNTL_DBG_ATTEN_MONITOR_DEFAULT);
     REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_BIAS_SLEEP_MONITOR, RTC_CNTL_BIASSLP_MONITOR_DEFAULT);
-    REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_BIAS_SLEEP_DEEP_SLP, RTC_CNTL_BIASSLP_SLEEP_DEFAULT);
+    REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_BIAS_SLEEP_DEEP_SLP,
+            (!cfg.deep_slp && cfg.xtal_fpu) ? RTC_CNTL_BIASSLP_SLEEP_ON : RTC_CNTL_BIASSLP_SLEEP_DEFAULT);
     REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_PD_CUR_MONITOR, RTC_CNTL_PD_CUR_MONITOR_DEFAULT);
-    REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_PD_CUR_DEEP_SLP, RTC_CNTL_PD_CUR_SLEEP_DEFAULT);
+    REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_PD_CUR_DEEP_SLP,
+            (!cfg.deep_slp && cfg.xtal_fpu) ? RTC_CNTL_PD_CUR_SLEEP_ON : RTC_CNTL_PD_CUR_SLEEP_DEFAULT);
     if (cfg.deep_slp) {
         REGI2C_WRITE_MASK(I2C_ULP, I2C_ULP_IR_FORCE_XPD_CK, 0);
         CLEAR_PERI_REG_MASK(RTC_CNTL_REG, RTC_CNTL_REGULATOR_FORCE_PU);
@@ -105,7 +107,18 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
         REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DG_VDD_DRV_B_SLP, RTC_CNTL_DG_VDD_DRV_B_SLP_DEFAULT);
         SET_PERI_REG_MASK(RTC_CNTL_REG, RTC_CNTL_REGULATOR_FORCE_PU);
         CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_DG_WRAP_PD_EN);
-        REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DBG_ATTEN_DEEP_SLP, RTC_CNTL_DBG_ATTEN_LIGHTSLEEP_DEFAULT);
+        REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DBG_ATTEN_DEEP_SLP,
+                cfg.int_8m_pd_en ? RTC_CNTL_DBG_ATTEN_LIGHTSLEEP_DEFAULT : RTC_CNTL_DBG_ATTEN_LIGHTSLEEP_NODROP);
+    }
+
+    //Keep the RTC8M_CLK on in light_sleep mode if the ledc low-speed channel is clocked by RTC8M_CLK.
+    if (!cfg.int_8m_pd_en && GET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_DIG_CLK8M_EN_M)) {
+        CLEAR_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PD);
+        SET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PU);
+        SET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_NOGATING);
+    } else {
+        CLEAR_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PU);
+        CLEAR_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_NOGATING);
     }
 
     /* enable VDDSDIO control by state machine */
@@ -118,8 +131,8 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
     REG_SET_FIELD(RTC_CNTL_SLP_REJECT_CONF_REG, RTC_CNTL_DEEP_SLP_REJECT_EN, cfg.deep_slp_reject);
     REG_SET_FIELD(RTC_CNTL_SLP_REJECT_CONF_REG, RTC_CNTL_LIGHT_SLP_REJECT_EN, cfg.light_slp_reject);
 
-    /* gating XTAL clock */
-    REG_CLR_BIT(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_XTAL_GLOBAL_FORCE_NOGATING);
+    REG_SET_FIELD(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_XTL_FORCE_PU, cfg.xtal_fpu);
+    REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_XTAL_GLOBAL_FORCE_NOGATING, cfg.xtal_fpu);
 }
 
 void rtc_sleep_low_init(uint32_t slowclk_period)

components/esp_hw_support/port/esp32s2/memprot.c

@@ -802,11 +802,10 @@ esp_err_t esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uin
         return ret;
     }
 
-    //connect to intr. matrix if not being debugged
-    if (!esp_cpu_in_ocd_debug_mode()) {
-
-        ESP_FAULT_ASSERT(!esp_cpu_in_ocd_debug_mode());
-
+    //if being debugged check we are not glitched and dont enable Memprot
+    if (esp_cpu_in_ocd_debug_mode()) {
+        ESP_FAULT_ASSERT(esp_cpu_in_ocd_debug_mode());
+    } else {
         //initialize for specific buses (any memory type does the job)
         if (invoke_panic_handler) {
             if (use_iram0 && (ret = esp_memprot_intr_init(MEMPROT_IRAM0_SRAM)) != ESP_OK) {

components/esp_hw_support/port/esp32s2/rtc_sleep.c

@@ -91,9 +91,11 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
 
     REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DBG_ATTEN_MONITOR, RTC_CNTL_DBG_ATTEN_MONITOR_DEFAULT);
     REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_BIAS_SLEEP_MONITOR, RTC_CNTL_BIASSLP_MONITOR_DEFAULT);
-    REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_BIAS_SLEEP_DEEP_SLP, RTC_CNTL_BIASSLP_SLEEP_DEFAULT);
+    REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_BIAS_SLEEP_DEEP_SLP,
+            (!cfg.deep_slp && cfg.xtal_fpu) ? RTC_CNTL_BIASSLP_SLEEP_ON : RTC_CNTL_BIASSLP_SLEEP_DEFAULT);
     REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_PD_CUR_MONITOR, RTC_CNTL_PD_CUR_MONITOR_DEFAULT);
-    REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_PD_CUR_DEEP_SLP, RTC_CNTL_PD_CUR_SLEEP_DEFAULT);
+    REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_PD_CUR_DEEP_SLP,
+            (!cfg.deep_slp && cfg.xtal_fpu) ? RTC_CNTL_PD_CUR_SLEEP_ON : RTC_CNTL_PD_CUR_SLEEP_DEFAULT);
     if (cfg.deep_slp) {
         CLEAR_PERI_REG_MASK(RTC_CNTL_REG, RTC_CNTL_REGULATOR_FORCE_PU);
         REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DBG_ATTEN_DEEP_SLP, RTC_CNTL_DBG_ATTEN_DEEPSLEEP_DEFAULT);
@@ -103,9 +105,18 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
                             RTC_CNTL_RFRX_PBUS_PU | RTC_CNTL_TXRF_I2C_PU);
         CLEAR_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_BB_I2C_FORCE_PU);
     } else {
-	SET_PERI_REG_MASK(RTC_CNTL_REG, RTC_CNTL_REGULATOR_FORCE_PU);
+        SET_PERI_REG_MASK(RTC_CNTL_REG, RTC_CNTL_REGULATOR_FORCE_PU);
         CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_DG_WRAP_PD_EN);
-        REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DBG_ATTEN_DEEP_SLP, RTC_CNTL_DBG_ATTEN_LIGHTSLEEP_DEFAULT);
+        REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DBG_ATTEN_DEEP_SLP,
+                cfg.int_8m_pd_en ? RTC_CNTL_DBG_ATTEN_LIGHTSLEEP_DEFAULT : RTC_CNTL_DBG_ATTEN_LIGHTSLEEP_NODROP);
+    }
+
+    //Keep the RTC8M_CLK on in light_sleep mode if the ledc low-speed channel is clocked by RTC8M_CLK.
+    if (!cfg.int_8m_pd_en && GET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_DIG_CLK8M_EN_M)) {
+        REG_CLR_BIT(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PD);
+        REG_SET_BIT(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PU);
+    } else {
+        REG_CLR_BIT(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PU);
     }
 
     /* enable VDDSDIO control by state machine */
@@ -121,6 +132,8 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
     REG_SET_FIELD(RTC_CNTL_SLP_REJECT_CONF_REG, RTC_CNTL_LIGHT_SLP_REJECT_EN, cfg.light_slp_reject);
     /* Set wait cycle for touch or COCPU after deep sleep and light sleep. */
     REG_SET_FIELD(RTC_CNTL_TIMER2_REG, RTC_CNTL_ULPCP_TOUCH_START_WAIT, RTC_CNTL_ULPCP_TOUCH_START_WAIT_IN_SLEEP);
+
+    REG_SET_FIELD(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_XTL_FORCE_PU, cfg.xtal_fpu);
 }
 
 void rtc_sleep_low_init(uint32_t slowclk_period)

components/esp_hw_support/port/esp32s3/opiram_psram.c

@@ -27,7 +27,7 @@
 
 #if CONFIG_SPIRAM_MODE_OCT
 #include "soc/rtc.h"
-#include "spi_flash_private.h"
+#include "esp_private/spi_flash_os.h"
 
 #define OPI_PSRAM_SYNC_READ             0x0000
 #define OPI_PSRAM_SYNC_WRITE            0x8080
@@ -99,10 +99,10 @@ typedef struct {
 } opi_psram_mode_reg_t;
 
 static const char* TAG = "opi psram";
-static DRAM_ATTR psram_size_t s_psram_size;
-static void IRAM_ATTR s_config_psram_spi_phases(void);
+static psram_size_t s_psram_size;
+static void s_config_psram_spi_phases(void);
 
-uint8_t IRAM_ATTR psram_get_cs_io(void)
+uint8_t psram_get_cs_io(void)
 {
     return OCT_PSRAM_CS1_IO;
 }
@@ -110,7 +110,7 @@ uint8_t IRAM_ATTR psram_get_cs_io(void)
 /**
  * Initialise mode registers of the PSRAM
  */
-static void IRAM_ATTR s_init_psram_mode_reg(int spi_num, opi_psram_mode_reg_t *mode_reg_config)
+static void s_init_psram_mode_reg(int spi_num, opi_psram_mode_reg_t *mode_reg_config)
 {
     esp_rom_spiflash_read_mode_t mode = ESP_ROM_SPIFLASH_OPI_DTR_MODE;
     int cmd_len = 16;
@@ -145,7 +145,7 @@ static void IRAM_ATTR s_init_psram_mode_reg(int spi_num, opi_psram_mode_reg_t *m
                              false);
 }
 
-static void IRAM_ATTR s_get_psram_mode_reg(int spi_num, opi_psram_mode_reg_t *out_reg)
+static void s_get_psram_mode_reg(int spi_num, opi_psram_mode_reg_t *out_reg)
 {
     esp_rom_spiflash_read_mode_t mode = ESP_ROM_SPIFLASH_OPI_DTR_MODE;
     int cmd_len = 16;
@@ -153,7 +153,7 @@ static void IRAM_ATTR s_get_psram_mode_reg(int spi_num, opi_psram_mode_reg_t *ou
     int dummy = OCT_PSRAM_RD_DUMMY_BITLEN;
     int data_bit_len = 16;
 
-    //Read MR0 register
+    //Read MR0~1 register
     esp_rom_opiflash_exec_cmd(spi_num, mode,
                              OPI_PSRAM_REG_READ, cmd_len,
                              0x0, addr_bit_len,
@@ -162,7 +162,7 @@ static void IRAM_ATTR s_get_psram_mode_reg(int spi_num, opi_psram_mode_reg_t *ou
                              &out_reg->mr0.val, data_bit_len,
                              BIT(1),
                              false);
-    //Read MR2 register
+    //Read MR2~3 register
     esp_rom_opiflash_exec_cmd(spi_num, mode,
                             OPI_PSRAM_REG_READ, cmd_len,
                             0x2, addr_bit_len,
@@ -171,6 +171,7 @@ static void IRAM_ATTR s_get_psram_mode_reg(int spi_num, opi_psram_mode_reg_t *ou
                             &out_reg->mr2.val, data_bit_len,
                             BIT(1),
                             false);
+    data_bit_len = 8;
     //Read MR4 register
     esp_rom_opiflash_exec_cmd(spi_num, mode,
                             OPI_PSRAM_REG_READ, cmd_len,
@@ -191,7 +192,7 @@ static void IRAM_ATTR s_get_psram_mode_reg(int spi_num, opi_psram_mode_reg_t *ou
                             false);
 }
 
-static void IRAM_ATTR s_print_psram_info(opi_psram_mode_reg_t *reg_val)
+static void s_print_psram_info(opi_psram_mode_reg_t *reg_val)
 {
     ESP_EARLY_LOGI(TAG, "vendor id : 0x%02x (%s)", reg_val->mr1.vendor_id, reg_val->mr1.vendor_id == 0x0d ? "AP" : "UNKNOWN");
     ESP_EARLY_LOGI(TAG, "dev id    : 0x%02x (generation %d)", reg_val->mr2.dev_id, reg_val->mr2.dev_id + 1);
@@ -224,7 +225,7 @@ static void psram_set_cs_timing(void)
     SET_PERI_REG_BITS(SPI_MEM_SPI_SMEM_AC_REG(0), SPI_MEM_SPI_SMEM_CS_HOLD_DELAY_V, OCT_PSRAM_CS_HOLD_DELAY, SPI_MEM_SPI_SMEM_CS_HOLD_DELAY_S);
 }
 
-static void IRAM_ATTR s_init_psram_pins(void)
+static void s_init_psram_pins(void)
 {
     //Set cs1 pin function
     PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[OCT_PSRAM_CS1_IO],  FUNC_SPICS1_SPICS1);
@@ -234,7 +235,7 @@ static void IRAM_ATTR s_init_psram_pins(void)
     REG_SET_FIELD(SPI_MEM_DATE_REG(0), SPI_MEM_SPI_SMEM_SPICLK_FUN_DRV, 3);
 }
 
-esp_err_t IRAM_ATTR psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vaddrmode)
+esp_err_t psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vaddrmode)
 {
     s_init_psram_pins();
     psram_set_cs_timing();
@@ -244,12 +245,10 @@ esp_err_t IRAM_ATTR psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vad
 
     //set to variable dummy mode
     SET_PERI_REG_MASK(SPI_MEM_DDR_REG(1), SPI_MEM_SPI_FMEM_VAR_DUMMY);
-#if CONFIG_ESPTOOLPY_FLASH_VENDOR_MXIC && CONFIG_ESPTOOLPY_FLASHMODE_OPI_DTR
     esp_rom_spi_set_dtr_swap_mode(1, false, false);
-#endif
 
     //Set PSRAM read latency and drive strength
-    static DRAM_ATTR opi_psram_mode_reg_t mode_reg = {0};
+    static opi_psram_mode_reg_t mode_reg = {0};
     mode_reg.mr0.lt = 1;
     mode_reg.mr0.read_latency = 2;
     mode_reg.mr0.drive_str = 0;
@@ -262,12 +261,9 @@ esp_err_t IRAM_ATTR psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vad
                    mode_reg.mr2.density == 0x5 ? PSRAM_SIZE_128MBITS :
                    mode_reg.mr2.density == 0x7 ? PSRAM_SIZE_256MBITS : 0;
 
-#if CONFIG_ESPTOOLPY_FLASH_VENDOR_MXIC && CONFIG_ESPTOOLPY_FLASHMODE_OPI_DTR
-    esp_rom_spi_set_dtr_swap_mode(1, true, true);
-#endif
     //Do PSRAM timing tuning, we use SPI1 to do the tuning, and set the SPI0 PSRAM timing related registers accordingly
     spi_timing_psram_tuning();
-    ////Back to the high speed mode. Flash/PSRAM clocks are set to the clock that user selected. SPI0/1 registers are all set correctly
+    //Back to the high speed mode. Flash/PSRAM clocks are set to the clock that user selected. SPI0/1 registers are all set correctly
     spi_timing_enter_mspi_high_speed_mode(true);
 
     /**
@@ -275,13 +271,15 @@ esp_err_t IRAM_ATTR psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vad
      * This function is to restore SPI1 init state.
      */
     spi_flash_set_rom_required_regs();
+    //Flash chip requires MSPI specifically, call this function to set them
+    spi_flash_set_vendor_required_regs();
 
     s_config_psram_spi_phases();
     return ESP_OK;
 }
 
 //Configure PSRAM SPI0 phase related registers here according to the PSRAM chip requirement
-static void IRAM_ATTR s_config_psram_spi_phases(void)
+static void s_config_psram_spi_phases(void)
 {
     //Config Write CMD phase for SPI0 to access PSRAM
     SET_PERI_REG_MASK(SPI_MEM_CACHE_SCTRL_REG(0), SPI_MEM_CACHE_SRAM_USR_WCMD_M);

components/esp_hw_support/port/esp32s3/rtc_init.c

@@ -18,9 +18,23 @@
 #include "regi2c_ulp.h"
 #include "soc_log.h"
 #include "esp_err.h"
+#include "esp_attr.h"
 #include "esp_efuse.h"
 #include "esp_efuse_table.h"
 
+#ifndef BOOTLOADER_BUILD
+/**
+ * TODO: IDF-3204
+ * Temporarily solution. Depends on MSPI
+ * Final solution: the rtc should not depend on MSPI. We should do rtc related before Flash init
+ */
+#include "esp_private/spi_flash_os.h"
+#include "esp32s3/rom/cache.h"
+#include "freertos/portmacro.h"
+portMUX_TYPE rtc_init_spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
+#endif
+
+
 #define RTC_CNTL_MEM_FORCE_NOISO (RTC_CNTL_SLOWMEM_FORCE_NOISO | RTC_CNTL_FASTMEM_FORCE_NOISO)
 
 static const char *TAG = "rtcinit";
@@ -231,8 +245,40 @@ static void set_ocode_by_efuse(int calib_version)
     REGI2C_WRITE_MASK(I2C_ULP, I2C_ULP_IR_FORCE_CODE, 1);
 }
 
-static void calibrate_ocode(void)
+#ifndef BOOTLOADER_BUILD
+//TODO: IDF-3204
+//Temporary solution, these 2 functions should be defined elsewhere, because similar operations are also needed elsewhere
+//Final solution: the rtc should not depend on MSPI. We should do rtc related before Flash init
+static void IRAM_ATTR enter_mspi_low_speed_mode_safe(void)
 {
+    portENTER_CRITICAL(&rtc_init_spinlock);
+    Cache_Freeze_ICache_Enable(1);
+    Cache_Freeze_DCache_Enable(1);
+    spi_timing_enter_mspi_low_speed_mode(false);
+    Cache_Freeze_DCache_Disable();
+    Cache_Freeze_ICache_Disable();
+    portEXIT_CRITICAL(&rtc_init_spinlock);
+}
+
+static void IRAM_ATTR enter_mspi_high_speed_mode_safe(void)
+{
+    portENTER_CRITICAL(&rtc_init_spinlock);
+    Cache_Freeze_ICache_Enable(1);
+    Cache_Freeze_DCache_Enable(1);
+    spi_timing_enter_mspi_high_speed_mode(false);
+    Cache_Freeze_DCache_Disable();
+    Cache_Freeze_ICache_Disable();
+    portEXIT_CRITICAL(&rtc_init_spinlock);
+}
+#endif
+
+//TODO: IDF-3204
+//This function will change the system clock source to XTAL. Under lower frequency (e.g. XTAL), MSPI timing tuning configures should be modified accordingly.
+static void IRAM_ATTR calibrate_ocode(void)
+{
+#ifndef BOOTLOADER_BUILD
+    enter_mspi_low_speed_mode_safe();
+#endif
     /*
     Bandgap output voltage is not precise when calibrate o-code by hardware sometimes, so need software o-code calibration (must turn off PLL).
     Method:
@@ -280,4 +326,7 @@ static void calibrate_ocode(void)
         }
     }
     rtc_clk_cpu_freq_set_config(&old_config);
+#ifndef BOOTLOADER_BUILD
+    enter_mspi_high_speed_mode_safe();
+#endif
 }

components/esp_hw_support/port/esp32s3/rtc_sleep.c

@@ -98,9 +98,11 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
     }
     REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DBG_ATTEN_MONITOR, RTC_CNTL_DBG_ATTEN_MONITOR_DEFAULT);
     REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_BIAS_SLEEP_MONITOR, RTC_CNTL_BIASSLP_MONITOR_DEFAULT);
-    REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_BIAS_SLEEP_DEEP_SLP, RTC_CNTL_BIASSLP_SLEEP_DEFAULT);
+    REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_BIAS_SLEEP_DEEP_SLP,
+            (!cfg.deep_slp && cfg.xtal_fpu) ? RTC_CNTL_BIASSLP_SLEEP_ON : RTC_CNTL_BIASSLP_SLEEP_DEFAULT);
     REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_PD_CUR_MONITOR, RTC_CNTL_PD_CUR_MONITOR_DEFAULT);
-    REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_PD_CUR_DEEP_SLP, RTC_CNTL_PD_CUR_SLEEP_DEFAULT);
+    REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_PD_CUR_DEEP_SLP,
+            (!cfg.deep_slp && cfg.xtal_fpu) ? RTC_CNTL_PD_CUR_SLEEP_ON : RTC_CNTL_PD_CUR_SLEEP_DEFAULT);
     if (cfg.deep_slp) {
         CLEAR_PERI_REG_MASK(RTC_CNTL_REG, RTC_CNTL_REGULATOR_FORCE_PU);
         REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DBG_ATTEN_DEEP_SLP, RTC_CNTL_DBG_ATTEN_DEEPSLEEP_DEFAULT);
@@ -113,11 +115,20 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
         REG_SET_FIELD(RTC_CNTL_REGULATOR_DRV_CTRL_REG, RTC_CNTL_DG_VDD_DRV_B_SLP, RTC_CNTL_DG_VDD_DRV_B_SLP_DEFAULT);
         SET_PERI_REG_MASK(RTC_CNTL_REG, RTC_CNTL_REGULATOR_FORCE_PU);
         CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_DG_WRAP_PD_EN);
-        REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DBG_ATTEN_DEEP_SLP, RTC_CNTL_DBG_ATTEN_LIGHTSLEEP_DEFAULT);
+        REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_DBG_ATTEN_DEEP_SLP,
+                cfg.int_8m_pd_en ? RTC_CNTL_DBG_ATTEN_LIGHTSLEEP_DEFAULT : RTC_CNTL_DBG_ATTEN_LIGHTSLEEP_NODROP);
     }
     /* mem pd */
     CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_LSLP_MEM_FORCE_PU);
 
+    //Keep the RTC8M_CLK on in light_sleep mode if the ledc low-speed channel is clocked by RTC8M_CLK.
+    if (!cfg.int_8m_pd_en && GET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_DIG_CLK8M_EN_M)) {
+        REG_CLR_BIT(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PD);
+        REG_SET_BIT(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PU);
+    } else {
+        REG_CLR_BIT(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PU);
+    }
+
     /* enable VDDSDIO control by state machine */
     REG_CLR_BIT(RTC_CNTL_SDIO_CONF_REG, RTC_CNTL_SDIO_FORCE);
     REG_SET_FIELD(RTC_CNTL_SDIO_CONF_REG, RTC_CNTL_SDIO_PD_EN, cfg.vddsdio_pd_en);
@@ -130,8 +141,8 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
     REG_SET_FIELD(RTC_CNTL_SLP_REJECT_CONF_REG, RTC_CNTL_DEEP_SLP_REJECT_EN, cfg.deep_slp_reject);
     REG_SET_FIELD(RTC_CNTL_SLP_REJECT_CONF_REG, RTC_CNTL_LIGHT_SLP_REJECT_EN, cfg.light_slp_reject);
 
-    /* gating XTAL clock */
-    REG_CLR_BIT(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_XTAL_GLOBAL_FORCE_NOGATING);
+    REG_SET_FIELD(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_XTL_FORCE_PU, cfg.xtal_fpu);
+    REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_XTAL_GLOBAL_FORCE_NOGATING, cfg.xtal_fpu);
 }
 
 void rtc_sleep_low_init(uint32_t slowclk_period)

components/esp_hw_support/port/esp32s3/spiram_psram.c

@@ -39,7 +39,7 @@
 
 #if CONFIG_SPIRAM_MODE_QUAD
 #include "soc/rtc.h"
-#include "spi_flash_private.h"
+#include "esp_private/spi_flash_os.h"
 
 static const char* TAG = "psram";
 
@@ -118,7 +118,7 @@ typedef enum {
 typedef esp_rom_spi_cmd_t psram_cmd_t;
 
 static uint32_t s_psram_id = 0;
-static void IRAM_ATTR config_psram_spi_phases(void);
+static void config_psram_spi_phases(void);
 extern void esp_rom_spi_set_op_mode(int spi_num, esp_rom_spiflash_read_mode_t mode);
 
 static uint8_t s_psram_cs_io = (uint8_t)-1;
@@ -278,7 +278,7 @@ static void psram_read_id(int spi_num, uint32_t* dev_id)
 }
 
 //enter QPI mode
-static void IRAM_ATTR psram_enable_qio_mode(int spi_num)
+static void psram_enable_qio_mode(int spi_num)
 {
     psram_exec_cmd(spi_num, PSRAM_CMD_SPI,
     PSRAM_ENTER_QMODE, 8,             /* command and command bit len*/
@@ -298,7 +298,7 @@ static void psram_set_cs_timing(void)
     SET_PERI_REG_MASK(SPI_MEM_SPI_SMEM_AC_REG(0), SPI_MEM_SPI_SMEM_CS_HOLD_M | SPI_MEM_SPI_SMEM_CS_SETUP_M);
 }
 
-static void IRAM_ATTR psram_gpio_config(void)
+static void psram_gpio_config(void)
 {
     //CS1
     uint8_t cs1_io = PSRAM_CS_IO;
@@ -341,7 +341,7 @@ psram_size_t psram_get_size(void)
  * Psram mode init will overwrite original flash speed mode, so that it is possible to change psram and flash speed after OTA.
  * Flash read mode(QIO/QOUT/DIO/DOUT) will not be changed in app bin. It is decided by bootloader, OTA can not change this mode.
  */
-esp_err_t IRAM_ATTR psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vaddrmode)   //psram init
+esp_err_t psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vaddrmode)   //psram init
 {
     assert(mode < PSRAM_CACHE_MAX && "we don't support any other mode for now.");
 
@@ -383,7 +383,7 @@ esp_err_t IRAM_ATTR psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vad
 }
 
 //Configure PSRAM SPI0 phase related registers here according to the PSRAM chip requirement
-static void IRAM_ATTR config_psram_spi_phases(void)
+static void config_psram_spi_phases(void)
 {
     //Config CMD phase
     CLEAR_PERI_REG_MASK(SPI_MEM_CACHE_SCTRL_REG(0), SPI_MEM_USR_SRAM_DIO_M);       //disable dio mode for cache command

components/esp_hw_support/sleep_modes.c

@@ -158,7 +158,7 @@ static sleep_config_t s_config = {
 #if SOC_PM_SUPPORT_CPU_PD
         ESP_PD_OPTION_AUTO,
 #endif
-        ESP_PD_OPTION_AUTO
+        ESP_PD_OPTION_AUTO, ESP_PD_OPTION_AUTO
     },
     .ccount_ticks_record = 0,
     .sleep_time_overhead_out = DEFAULT_SLEEP_OUT_OVERHEAD_US,
@@ -364,10 +364,12 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags)
     if (deep_sleep) {
         if (s_config.wakeup_triggers & RTC_TOUCH_TRIG_EN) {
             touch_wakeup_prepare();
+#if CONFIG_IDF_TARGET_ESP32S2
             /* Workaround: In deep sleep, for ESP32S2, Power down the RTC_PERIPH will change the slope configuration of Touch sensor sleep pad.
              * The configuration change will change the reading of the sleep pad, which will cause the touch wake-up sensor to trigger falsely.
              */
             pd_flags &= ~RTC_SLEEP_PD_RTC_PERIPH;
+#endif
         }
     } else {
         /* In light sleep, the RTC_PERIPH power domain should be in the power-on state (Power on the touch circuit in light sleep),
@@ -702,7 +704,7 @@ esp_err_t esp_sleep_disable_wakeup_source(esp_sleep_source_t source)
         s_config.ext1_trigger_mode = 0;
         s_config.wakeup_triggers &= ~RTC_EXT1_TRIG_EN;
 #endif
-#if SOC_TOUCH_PAD_WAKE_SUPPORTED
+#if SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP
     } else if (CHECK_SOURCE(source, ESP_SLEEP_WAKEUP_TOUCHPAD, RTC_TOUCH_TRIG_EN)) {
         s_config.wakeup_triggers &= ~RTC_TOUCH_TRIG_EN;
 #endif
@@ -1065,7 +1067,7 @@ esp_sleep_wakeup_cause_t esp_sleep_get_wakeup_cause(void)
     } else if (wakeup_cause & RTC_EXT1_TRIG_EN) {
         return ESP_SLEEP_WAKEUP_EXT1;
 #endif
-#if SOC_TOUCH_PAD_WAKE_SUPPORTED
+#if SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP
     } else if (wakeup_cause & RTC_TOUCH_TRIG_EN) {
         return ESP_SLEEP_WAKEUP_TOUCHPAD;
 #endif
@@ -1137,7 +1139,7 @@ static uint32_t get_power_down_flags(void)
     // RTC_PERIPH is needed for EXT0 wakeup and GPIO wakeup.
     // If RTC_PERIPH is auto, and EXT0/GPIO aren't enabled, power down RTC_PERIPH.
     if (s_config.pd_options[ESP_PD_DOMAIN_RTC_PERIPH] == ESP_PD_OPTION_AUTO) {
-#if SOC_TOUCH_PAD_WAKE_SUPPORTED
+#if SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP
         uint32_t wakeup_source = RTC_TOUCH_TRIG_EN;
 #if SOC_ULP_SUPPORTED
         wakeup_source |= RTC_ULP_TRIG_EN;
@@ -1155,7 +1157,7 @@ static uint32_t get_power_down_flags(void)
         } else {
             s_config.pd_options[ESP_PD_DOMAIN_RTC_PERIPH] = ESP_PD_OPTION_OFF;
         }
-#endif // SOC_TOUCH_PAD_WAKE_SUPPORTED
+#endif // SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP
     }
 
 #if SOC_PM_SUPPORT_CPU_PD
@@ -1164,9 +1166,9 @@ static uint32_t get_power_down_flags(void)
     }
 #endif
 
-    if (s_config.pd_options[ESP_PD_DOMAIN_XTAL] == ESP_PD_OPTION_AUTO) {
-        s_config.pd_options[ESP_PD_DOMAIN_XTAL] = ESP_PD_OPTION_OFF;
-    }
+#ifdef CONFIG_IDF_TARGET_ESP32
+    s_config.pd_options[ESP_PD_DOMAIN_XTAL] = ESP_PD_OPTION_OFF;
+#endif
 
     const char *option_str[] = {"OFF", "ON", "AUTO(OFF)" /* Auto works as OFF */};
     ESP_LOGD(TAG, "RTC_PERIPH: %s", option_str[s_config.pd_options[ESP_PD_DOMAIN_RTC_PERIPH]]);
@@ -1194,10 +1196,12 @@ static uint32_t get_power_down_flags(void)
         pd_flags |= RTC_SLEEP_PD_CPU;
     }
 #endif
-
-#ifdef CONFIG_IDF_TARGET_ESP32
-    pd_flags |= RTC_SLEEP_PD_XTAL;
-#endif
+    if (s_config.pd_options[ESP_PD_DOMAIN_RTC8M] != ESP_PD_OPTION_ON) {
+        pd_flags |= RTC_SLEEP_PD_INT_8M;
+    }
+    if (s_config.pd_options[ESP_PD_DOMAIN_XTAL] != ESP_PD_OPTION_ON) {
+        pd_flags |= RTC_SLEEP_PD_XTAL;
+    }
 
     /**
      * VDD_SDIO power domain shall be kept on during the light sleep

components/esp_lcd/include/esp_lcd_panel_io.h

@@ -65,6 +65,22 @@ esp_err_t esp_lcd_panel_io_tx_color(esp_lcd_panel_io_handle_t io, int lcd_cmd, c
  */
 esp_err_t esp_lcd_panel_io_del(esp_lcd_panel_io_handle_t io);
 
+/**
+ * @brief Type of LCD panel IO event data
+ */
+typedef struct {
+} esp_lcd_panel_io_event_data_t;
+
+/**
+ * @brief Declare the prototype of the function that will be invoked when panel IO finishes transferring color data
+ *
+ * @param[in] panel_io LCD panel IO handle, which is created by factory API like `esp_lcd_new_panel_io_spi()`
+ * @param[in] edata Panel IO event data, fed by driver
+ * @param[in] user_ctx User data, passed from `esp_lcd_panel_io_xxx_config_t`
+ * @return Whether a high priority task has been waken up by this function
+ */
+typedef bool (*esp_lcd_panel_io_color_trans_done_cb_t)(esp_lcd_panel_io_handle_t panel_io, esp_lcd_panel_io_event_data_t *edata, void *user_ctx);
+
 /**
  * @brief Panel IO configuration structure, for SPI interface
  */
@@ -74,8 +90,8 @@ typedef struct {
     int spi_mode;    /*!< Traditional SPI mode (0~3) */
     unsigned int pclk_hz;    /*!< Frequency of pixel clock */
     size_t trans_queue_depth; /*!< Size of internal transaction queue */
-    bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); /*!< Callback, invoked when color data transfer has finished */
-    void *user_data;    /*!< User private data, passed directly to on_trans_frame_done's user_data */
+    esp_lcd_panel_io_color_trans_done_cb_t on_color_trans_done; /*!< Callback invoked when color data transfer has finished */
+    void *user_ctx;    /*!< User private data, passed directly to on_color_trans_done's user_ctx */
     int lcd_cmd_bits;   /*!< Bit-width of LCD command */
     int lcd_param_bits; /*!< Bit-width of LCD parameter */
     struct {
@@ -100,8 +116,8 @@ esp_err_t esp_lcd_new_panel_io_spi(esp_lcd_spi_bus_handle_t bus, const esp_lcd_p
 
 typedef struct {
     uint32_t dev_addr; /*!< I2C device address */
-    bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); /*!< Callback, invoked when color data transfer has finished */
-    void *user_data; /*!< User private data, passed directly to on_trans_frame_done's user_data */
+    esp_lcd_panel_io_color_trans_done_cb_t on_color_trans_done; /*!< Callback invoked when color data transfer has finished */
+    void *user_ctx; /*!< User private data, passed directly to on_color_trans_done's user_ctx */
     size_t control_phase_bytes; /*!< I2C LCD panel will encode control information (e.g. D/C seclection) into control phase, in several bytes */
     unsigned int dc_bit_offset; /*!< Offset of the D/C selection bit in control phase */
     int lcd_cmd_bits;           /*!< Bit-width of LCD command */
@@ -168,8 +184,8 @@ typedef struct {
     int cs_gpio_num;         /*!< GPIO used for CS line, set to -1 will declaim exclusively use of I80 bus */
     unsigned int pclk_hz;    /*!< Frequency of pixel clock */
     size_t trans_queue_depth; /*!< Transaction queue size, larger queue, higher throughput */
-    bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); /*!< Callback, invoked when color data was tranferred done */
-    void *user_data;    /*!< User private data, passed directly to on_trans_done's user_data */
+    esp_lcd_panel_io_color_trans_done_cb_t on_color_trans_done; /*!< Callback invoked when color data was tranferred done */
+    void *user_ctx;    /*!< User private data, passed directly to on_color_trans_done's user_ctx */
     int lcd_cmd_bits;   /*!< Bit-width of LCD command */
     int lcd_param_bits; /*!< Bit-width of LCD parameter */
     struct {

components/esp_lcd/include/esp_lcd_panel_rgb.h

@@ -18,6 +18,37 @@ extern "C" {
 #if SOC_LCD_RGB_SUPPORTED
 /**
  * @brief LCD RGB timing structure
+ *
+ *                                                 Total Width
+ *                             <--------------------------------------------------->
+ *                       Hsync width HBP             Active Width                HFP
+ *                             <---><--><--------------------------------------><--->
+ *                         ____    ____|_______________________________________|____|
+ *                             |___|   |                                       |    |
+ *                                     |                                       |    |
+ *                         __|         |                                       |    |
+ *            /|\    /|\  |            |                                       |    |
+ *             | VSYNC|   |            |                                       |    |
+ *             |Width\|/  |__          |                                       |    |
+ *             |     /|\     |         |                                       |    |
+ *             |  VBP |      |         |                                       |    |
+ *             |     \|/_____|_________|_______________________________________|    |
+ *             |     /|\     |         | / / / / / / / / / / / / / / / / / / / |    |
+ *             |      |      |         |/ / / / / / / / / / / / / / / / / / / /|    |
+ *    Total    |      |      |         |/ / / / / / / / / / / / / / / / / / / /|    |
+ *    Heigh    |      |      |         |/ / / / / / / / / / / / / / / / / / / /|    |
+ *             |Active|      |         |/ / / / / / / / / / / / / / / / / / / /|    |
+ *             |Heigh |      |         |/ / / / / / Active Display Area / / / /|    |
+ *             |      |      |         |/ / / / / / / / / / / / / / / / / / / /|    |
+ *             |      |      |         |/ / / / / / / / / / / / / / / / / / / /|    |
+ *             |      |      |         |/ / / / / / / / / / / / / / / / / / / /|    |
+ *             |      |      |         |/ / / / / / / / / / / / / / / / / / / /|    |
+ *             |      |      |         |/ / / / / / / / / / / / / / / / / / / /|    |
+ *             |     \|/_____|_________|_______________________________________|    |
+ *             |     /|\     |                                                      |
+ *             |  VFP |      |                                                      |
+ *            \|/    \|/_____|______________________________________________________|
+ *
  */
 typedef struct {
     unsigned int pclk_hz;           /*!< Frequency of pixel clock */
@@ -38,6 +69,22 @@ typedef struct {
     } flags;
 } esp_lcd_rgb_timing_t;
 
+/**
+ * @brief Type of RGB LCD panel event data
+ */
+typedef struct {
+} esp_lcd_rgb_panel_event_data_t;
+
+/**
+ * @brief Declare the prototype of the function that will be invoked when panel IO finishes transferring color data
+ *
+ * @param[in] panel LCD panel handle, returned from `esp_lcd_new_rgb_panel`
+ * @param[in] edata Panel event data, fed by driver
+ * @param[in] user_ctx User data, passed from `esp_lcd_rgb_panel_config_t`
+ * @return Whether a high priority task has been waken up by this function
+ */
+typedef bool (*esp_lcd_rgb_panel_frame_trans_done_cb_t)(esp_lcd_panel_handle_t panel, esp_lcd_rgb_panel_event_data_t *edata, void *user_ctx);
+
 /**
  * @brief LCD RGB panel configuration structure
  */
@@ -51,8 +98,8 @@ typedef struct {
     int pclk_gpio_num;            /*!< GPIO used for PCLK signal */
     int data_gpio_nums[SOC_LCD_RGB_DATA_WIDTH]; /*!< GPIOs used for data lines */
     int disp_gpio_num; /*!< GPIO used for display control signal, set to -1 if it's not used */
-    bool (*on_frame_trans_done)(esp_lcd_panel_handle_t panel, void *user_data); /*!< Callback, invoked when one frame buffer has transferred done */
-    void *user_data; /*!< User data which would be passed to on_frame_trans_done's user_data */
+    esp_lcd_rgb_panel_frame_trans_done_cb_t on_frame_trans_done; /*!< Callback invoked when one frame buffer has transferred done */
+    void *user_ctx; /*!< User data which would be passed to on_frame_trans_done's user_ctx */
     struct {
         unsigned int disp_active_low: 1; /*!< If this flag is enabled, a low level of display control signal can turn the screen on; vice versa */
         unsigned int relax_on_idle: 1;   /*!< If this flag is enabled, the host won't refresh the LCD if nothing changed in host's frame buffer (this is usefull for LCD with built-in GRAM) */

components/esp_lcd/src/esp_lcd_panel_io_i2c.c

@@ -33,9 +33,9 @@ typedef struct {
     int lcd_param_bits;      // Bit width of LCD parameter
     uint32_t control_phase_cmd;  // control byte when transferring command
     uint32_t control_phase_data; // control byte when transferring data
-    bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); // User register's callback, invoked when color data trans done
-    void *user_data;             // User's private data, passed directly to callback on_color_trans_done()
-    uint8_t cmdlink_buffer[];     // pre-alloc I2C command link buffer, to be reused in all transactions
+    esp_lcd_panel_io_color_trans_done_cb_t on_color_trans_done; // User register's callback, invoked when color data trans done
+    void *user_ctx;             // User's private data, passed directly to callback on_color_trans_done()
+    uint8_t cmdlink_buffer[];   // pre-alloc I2C command link buffer, to be reused in all transactions
 } lcd_panel_io_i2c_t;
 
 esp_err_t esp_lcd_new_panel_io_i2c(esp_lcd_i2c_bus_handle_t bus, const esp_lcd_panel_io_i2c_config_t *io_config, esp_lcd_panel_io_handle_t *ret_io)
@@ -51,9 +51,9 @@ esp_err_t esp_lcd_new_panel_io_i2c(esp_lcd_i2c_bus_handle_t bus, const esp_lcd_p
     i2c_panel_io->lcd_cmd_bits = io_config->lcd_cmd_bits;
     i2c_panel_io->lcd_param_bits = io_config->lcd_param_bits;
     i2c_panel_io->on_color_trans_done = io_config->on_color_trans_done;
+    i2c_panel_io->user_ctx = io_config->user_ctx;
     i2c_panel_io->control_phase_data = (!io_config->flags.dc_low_on_data) << (io_config->dc_bit_offset);
     i2c_panel_io->control_phase_cmd = (io_config->flags.dc_low_on_data) << (io_config->dc_bit_offset);
-    i2c_panel_io->user_data = io_config->user_data;
     i2c_panel_io->dev_addr = io_config->dev_addr;
     i2c_panel_io->base.del = panel_io_i2c_del;
     i2c_panel_io->base.tx_param = panel_io_i2c_tx_param;
@@ -104,7 +104,7 @@ static esp_err_t panel_io_i2c_tx_buffer(esp_lcd_panel_io_t *io, int lcd_cmd, con
     if (!is_param) {
         // trans done callback
         if (i2c_panel_io->on_color_trans_done) {
-            i2c_panel_io->on_color_trans_done(&(i2c_panel_io->base), i2c_panel_io->user_data, NULL);
+            i2c_panel_io->on_color_trans_done(&(i2c_panel_io->base), NULL, i2c_panel_io->user_ctx);
         }
     }
 

components/esp_lcd/src/esp_lcd_panel_io_i2s.c

@@ -81,8 +81,8 @@ struct lcd_i80_trans_descriptor_t {
     lcd_panel_io_i80_t *i80_device; // i80 device issuing this transaction
     const void *data;     // Data buffer
     uint32_t data_length; // Data buffer size
-    void *cb_user_data;   // private data used by trans_done_cb
-    bool (*trans_done_cb)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); // transaction done callback
+    esp_lcd_panel_io_color_trans_done_cb_t trans_done_cb; // transaction done callback
+    void *user_ctx;   // private data used by trans_done_cb
     struct {
         unsigned int dc_level: 1; // Level of DC line for this transaction
     } flags;
@@ -97,11 +97,11 @@ struct lcd_panel_io_i80_t {
     QueueHandle_t trans_queue; // Transaction queue, transactions in this queue are pending for scheduler to dispatch
     QueueHandle_t done_queue;  // Transaction done queue, transactions in this queue are finished but not recycled by the caller
     size_t queue_size;         // Size of transaction queue
-    size_t num_trans_inflight;  // Number of transactions that are undergoing (the descriptor not recycled yet)
+    size_t num_trans_inflight; // Number of transactions that are undergoing (the descriptor not recycled yet)
     int lcd_cmd_bits;          // Bit width of LCD command
     int lcd_param_bits;        // Bit width of LCD parameter
-    void *cb_user_data;        // private data used when transfer color data
-    bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); // color data trans done callback
+    void *user_ctx;            // private data used when transfer color data
+    esp_lcd_panel_io_color_trans_done_cb_t on_color_trans_done; // color data trans done callback
     LIST_ENTRY(lcd_panel_io_i80_t) device_list_entry; // Entry of i80 device list
     struct {
         unsigned int dc_cmd_level: 1;  // Level of DC line in CMD phase
@@ -274,7 +274,7 @@ esp_err_t esp_lcd_new_panel_io_i80(esp_lcd_i80_bus_handle_t bus, const esp_lcd_p
     i80_device->dc_levels.dc_data_level = io_config->dc_levels.dc_data_level;
     i80_device->cs_gpio_num = io_config->cs_gpio_num;
     i80_device->on_color_trans_done = io_config->on_color_trans_done;
-    i80_device->cb_user_data = io_config->user_data;
+    i80_device->user_ctx = io_config->user_ctx;
     i80_device->flags.cs_active_high = io_config->flags.cs_active_high;
     i80_device->flags.swap_color_bytes = io_config->flags.swap_color_bytes;
     i80_device->flags.pclk_idle_low = io_config->flags.pclk_idle_low;
@@ -557,7 +557,7 @@ static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, cons
 
     // sending LCD color data to queue
     trans_desc->trans_done_cb = next_device->on_color_trans_done;
-    trans_desc->cb_user_data = next_device->cb_user_data;
+    trans_desc->user_ctx = next_device->user_ctx;
     trans_desc->flags.dc_level = next_device->dc_levels.dc_data_level; // DC level for data transaction
     i2s_lcd_prepare_color_buffer(trans_desc, color, color_size);
     // send transaction to trans_queue
@@ -697,7 +697,7 @@ static IRAM_ATTR void lcd_default_isr_handler(void *args)
             }
             // device callback
             if (trans_desc->trans_done_cb) {
-                if (trans_desc->trans_done_cb(&cur_device->base, trans_desc->cb_user_data, NULL)) {
+                if (trans_desc->trans_done_cb(&cur_device->base, NULL, trans_desc->user_ctx)) {
                     need_yield = true;
                 }
             }

components/esp_lcd/src/esp_lcd_panel_io_i80.c

@@ -77,8 +77,8 @@ struct lcd_i80_trans_descriptor_t {
     uint32_t cmd_cycles;  // Command cycles
     const void *data;     // Data buffer
     uint32_t data_length; // Data buffer size
-    void *cb_user_data;   // private data used by trans_done_cb
-    bool (*trans_done_cb)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); // transaction done callback
+    void *user_ctx;   // private data used by trans_done_cb
+    esp_lcd_panel_io_color_trans_done_cb_t trans_done_cb; // transaction done callback
 };
 
 struct lcd_panel_io_i80_t {
@@ -90,11 +90,11 @@ struct lcd_panel_io_i80_t {
     QueueHandle_t trans_queue; // Transaction queue, transactions in this queue are pending for scheduler to dispatch
     QueueHandle_t done_queue;  // Transaction done queue, transactions in this queue are finished but not recycled by the caller
     size_t queue_size;         // Size of transaction queue
-    size_t num_trans_inflight;  // Number of transactions that are undergoing (the descriptor not recycled yet)
+    size_t num_trans_inflight; // Number of transactions that are undergoing (the descriptor not recycled yet)
     int lcd_cmd_bits;          // Bit width of LCD command
     int lcd_param_bits;        // Bit width of LCD parameter
-    void *cb_user_data;        // private data used when transfer color data
-    bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); // color data trans done callback
+    void *user_ctx;            // private data used when transfer color data
+    esp_lcd_panel_io_color_trans_done_cb_t on_color_trans_done; // color data trans done callback
     LIST_ENTRY(lcd_panel_io_i80_t) device_list_entry; // Entry of i80 device list
     struct {
         unsigned int dc_idle_level: 1;  // Level of DC line in IDLE phase
@@ -267,7 +267,7 @@ esp_err_t esp_lcd_new_panel_io_i80(esp_lcd_i80_bus_handle_t bus, const esp_lcd_p
     i80_device->flags.pclk_idle_low = io_config->flags.pclk_idle_low;
     i80_device->flags.pclk_active_neg = io_config->flags.pclk_active_neg;
     i80_device->on_color_trans_done = io_config->on_color_trans_done;
-    i80_device->cb_user_data = io_config->user_data;
+    i80_device->user_ctx = io_config->user_ctx;
     // fill panel io function table
     i80_device->base.del = panel_io_i80_del;
     i80_device->base.tx_param = panel_io_i80_tx_param;
@@ -434,7 +434,7 @@ static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, cons
     trans_desc->data = color;
     trans_desc->data_length = color_size;
     trans_desc->trans_done_cb = i80_device->on_color_trans_done;
-    trans_desc->cb_user_data = i80_device->cb_user_data;
+    trans_desc->user_ctx = i80_device->user_ctx;
     // send transaction to trans_queue
     xQueueSend(i80_device->trans_queue, &trans_desc, portMAX_DELAY);
     i80_device->num_trans_inflight++;
@@ -591,7 +591,7 @@ IRAM_ATTR static void lcd_default_isr_handler(void *args)
             }
             // device callback
             if (trans_desc->trans_done_cb) {
-                if (trans_desc->trans_done_cb(&cur_device->base, trans_desc->cb_user_data, NULL)) {
+                if (trans_desc->trans_done_cb(&cur_device->base, NULL, trans_desc->user_ctx)) {
                     need_yield = true;
                 }
             }

components/esp_lcd/src/esp_lcd_panel_io_spi.c

@@ -37,8 +37,8 @@ typedef struct {
     esp_lcd_panel_io_t base;     // Base class of generic lcd panel io
     spi_device_handle_t spi_dev; // SPI device handle
     int dc_gpio_num;             // D/C line GPIO number
-    bool (*on_color_trans_done)(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data); // User register's callback, invoked when color data trans done
-    void *user_data;           // User's private data, passed directly to callback on_color_trans_done
+    esp_lcd_panel_io_color_trans_done_cb_t on_color_trans_done; // User register's callback, invoked when color data trans done
+    void *user_ctx;           // User's private data, passed directly to callback on_color_trans_done
     size_t queue_size;         // Size of transaction queue
     size_t num_trans_inflight;  // Number of transactions that are undergoing (the descriptor not recycled yet)
     int lcd_cmd_bits;          // Bit width of LCD command
@@ -62,7 +62,7 @@ esp_err_t esp_lcd_new_panel_io_spi(esp_lcd_spi_bus_handle_t bus, const esp_lcd_p
     ESP_GOTO_ON_FALSE(spi_panel_io, ESP_ERR_NO_MEM, err, TAG, "no mem for spi panel io");
 
     spi_device_interface_config_t devcfg = {
-        .flags = SPI_DEVICE_HALFDUPLEX,
+        .flags = SPI_DEVICE_HALFDUPLEX, // only use TX path, so half duplex is enough
         .clock_speed_hz = io_config->pclk_hz,
         .mode = io_config->spi_mode,
         .spics_io_num = io_config->cs_gpio_num,
@@ -87,9 +87,9 @@ esp_err_t esp_lcd_new_panel_io_spi(esp_lcd_spi_bus_handle_t bus, const esp_lcd_p
     spi_panel_io->flags.dc_data_level = !io_config->flags.dc_low_on_data;
     spi_panel_io->flags.octal_mode = io_config->flags.octal_mode;
     spi_panel_io->on_color_trans_done = io_config->on_color_trans_done;
+    spi_panel_io->user_ctx = io_config->user_ctx;
     spi_panel_io->lcd_cmd_bits = io_config->lcd_cmd_bits;
     spi_panel_io->lcd_param_bits = io_config->lcd_param_bits;
-    spi_panel_io->user_data = io_config->user_data;
     spi_panel_io->dc_gpio_num = io_config->dc_gpio_num;
     spi_panel_io->queue_size = io_config->trans_queue_depth;
     spi_panel_io->base.tx_param = panel_io_spi_tx_param;
@@ -271,7 +271,7 @@ static void lcd_spi_post_trans_color_cb(spi_transaction_t *trans)
     lcd_spi_trans_descriptor_t *lcd_trans = __containerof(trans, lcd_spi_trans_descriptor_t, base);
     if (lcd_trans->flags.trans_is_color) {
         if (spi_panel_io->on_color_trans_done) {
-            spi_panel_io->on_color_trans_done(&spi_panel_io->base, spi_panel_io->user_data, NULL);
+            spi_panel_io->on_color_trans_done(&spi_panel_io->base, NULL, spi_panel_io->user_ctx);
         }
     }
 }

components/esp_lcd/src/esp_lcd_rgb_panel.c

@@ -78,8 +78,8 @@ struct esp_rgb_panel_t {
     int new_frame_id;               // ID for new frame, we use ID to identify whether the frame content has been updated
     int cur_frame_id;               // ID for current transferring frame
     SemaphoreHandle_t done_sem;     // Binary semaphore, indicating if the new frame has been flushed to LCD
-    bool (*on_frame_trans_done)(esp_lcd_panel_t *panel, void *user_data); // Callback, invoked after frame trans done
-    void *user_data;                // Reserved user's data of callback functions
+    esp_lcd_rgb_panel_frame_trans_done_cb_t on_frame_trans_done; // Callback, invoked after frame trans done
+    void *user_ctx;                // Reserved user's data of callback functions
     int x_gap;                      // Extra gap in x coordinate, it's used when calculate the flush window
     int y_gap;                      // Extra gap in y coordinate, it's used when calculate the flush window
     struct {
@@ -164,7 +164,7 @@ esp_err_t esp_lcd_new_rgb_panel(const esp_lcd_rgb_panel_config_t *rgb_panel_conf
     rgb_panel->disp_gpio_num = rgb_panel_config->disp_gpio_num;
     rgb_panel->flags.disp_en_level = !rgb_panel_config->flags.disp_active_low;
     rgb_panel->on_frame_trans_done = rgb_panel_config->on_frame_trans_done;
-    rgb_panel->user_data = rgb_panel_config->user_data;
+    rgb_panel->user_ctx = rgb_panel_config->user_ctx;
     // fill function table
     rgb_panel->base.del = rgb_panel_del;
     rgb_panel->base.reset = rgb_panel_reset;
@@ -493,7 +493,7 @@ IRAM_ATTR static void lcd_default_isr_handler(void *args)
     if (intr_status & LCD_LL_EVENT_VSYNC_END) {
         if (panel->flags.new_frame) { // the finished one is a new frame
             if (panel->on_frame_trans_done) {
-                if (panel->on_frame_trans_done(&panel->base, panel->user_data)) {
+                if (panel->on_frame_trans_done(&panel->base, NULL, panel->user_ctx)) {
                     need_yield = true;
                 }
             }

components/esp_lcd/test/test_i2c_lcd_panel.c

@@ -77,9 +77,9 @@ TEST_CASE("lcd panel with i2c interface (ssd1306)", "[lcd]")
 #if CONFIG_LV_USE_USER_DATA
 #include "test_lvgl_port.h"
 #if CONFIG_LV_COLOR_DEPTH_1
-static bool notify_lvgl_ready_to_flush(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data)
+static bool notify_lvgl_ready_to_flush(esp_lcd_panel_io_handle_t panel_io, esp_lcd_panel_io_event_data_t *edata, void *user_ctx)
 {
-    lv_disp_t *disp = *(lv_disp_t **)user_data;
+    lv_disp_t *disp = *(lv_disp_t **)user_ctx;
     lv_disp_flush_ready(&disp->driver);
     return false;
 }
@@ -109,7 +109,7 @@ TEST_CASE("lvgl gui with i2c interface (ssd1306)", "[lcd][lvgl][ignore]")
         .lcd_cmd_bits = 8,        // According to SSD1306 datasheet
         .lcd_param_bits = 8,      // According to SSD1306 datasheet
         .on_color_trans_done = notify_lvgl_ready_to_flush,
-        .user_data = &disp,
+        .user_ctx = &disp,
     };
     TEST_ESP_OK(esp_lcd_new_panel_io_i2c((esp_lcd_i2c_bus_handle_t)TEST_I2C_HOST_ID, &io_config, &io_handle));
 

components/esp_lcd/test/test_i80_lcd_panel.c

@@ -413,9 +413,9 @@ TEST_CASE("lcd panel with i80 interface (st7789, 8bits)", "[lcd]")
 #if CONFIG_LV_USE_USER_DATA
 #include "test_lvgl_port.h"
 
-static bool notify_lvgl_ready_to_flush(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data)
+static bool notify_lvgl_ready_to_flush(esp_lcd_panel_io_handle_t panel_io, esp_lcd_panel_io_event_data_t *edata, void *user_ctx)
 {
-    lv_disp_t *disp = *(lv_disp_t **)user_data;
+    lv_disp_t *disp = *(lv_disp_t **)user_ctx;
     lv_disp_flush_ready(&disp->driver);
     return false;
 }
@@ -465,7 +465,7 @@ TEST_CASE("lvgl gui with i80 interface (st7789, 8bits)", "[lcd][lvgl][ignore]")
             .swap_color_bytes = 1,
         },
         .on_color_trans_done = notify_lvgl_ready_to_flush,
-        .user_data = &disp,
+        .user_ctx = &disp,
         .lcd_cmd_bits = 8,
         .lcd_param_bits = 8,
     };
@@ -537,7 +537,7 @@ TEST_CASE("lvgl gui with i80 interface (nt35510, 8/16bits)", "[lcd][lvgl][ignore
             .dc_data_level = 1,
         },
         .on_color_trans_done = notify_lvgl_ready_to_flush,
-        .user_data = &disp,
+        .user_ctx = &disp,
         .lcd_cmd_bits = 16,
         .lcd_param_bits = 16,
     };

components/esp_lcd/test/test_rgb_panel.c

@@ -105,9 +105,9 @@ TEST_CASE("lcd rgb lcd panel", "[lcd]")
 #if CONFIG_LV_USE_USER_DATA
 #include "test_lvgl_port.h"
 
-static bool notify_lvgl_ready_to_flush(esp_lcd_panel_handle_t panel, void *user_data)
+static bool notify_lvgl_ready_to_flush(esp_lcd_panel_handle_t panel, esp_lcd_rgb_panel_event_data_t *edata, void *user_ctx)
 {
-    lv_disp_t *disp = *(lv_disp_t **)user_data;
+    lv_disp_t *disp = *(lv_disp_t **)user_ctx;
     lv_disp_flush_ready(&disp->driver);
     return false;
 }
@@ -157,7 +157,7 @@ TEST_CASE("lvgl gui with rgb interface", "[lcd][lvgl][ignore]")
         },
         .flags.fb_in_psram = 1,
         .on_frame_trans_done = notify_lvgl_ready_to_flush,
-        .user_data = &disp,
+        .user_ctx = &disp,
     };
     TEST_ESP_OK(esp_lcd_new_rgb_panel(&panel_config, &panel_handle));
     TEST_ESP_OK(esp_lcd_panel_reset(panel_handle));

components/esp_lcd/test/test_spi_lcd_panel.c

@@ -15,9 +15,7 @@
 #define TEST_SPI_HOST_ID        (1)
 #define TEST_LCD_PIXEL_CLOCK_HZ (20 * 1000 * 1000) // 20MHz
 
-typedef bool (*trans_done_callback_t)(esp_lcd_panel_io_handle_t, void *, void *);
-
-static void lcd_initialize_spi(esp_lcd_panel_io_handle_t *io_handle, trans_done_callback_t on_color_trans_done, void *user_data, int cmd_bits, int param_bits, bool oct_mode)
+static void lcd_initialize_spi(esp_lcd_panel_io_handle_t *io_handle, esp_lcd_panel_io_color_trans_done_cb_t on_color_trans_done, void *user_ctx, int cmd_bits, int param_bits, bool oct_mode)
 {
     gpio_config_t bk_gpio_config = {
         .mode = GPIO_MODE_OUTPUT,
@@ -54,7 +52,7 @@ static void lcd_initialize_spi(esp_lcd_panel_io_handle_t *io_handle, trans_done_
         .lcd_cmd_bits = cmd_bits,
         .lcd_param_bits = param_bits,
         .on_color_trans_done = on_color_trans_done,
-        .user_data = user_data
+        .user_ctx = user_ctx
     };
     if (oct_mode) {
         io_config.flags.octal_mode = 1;
@@ -187,9 +185,9 @@ TEST_CASE("lcd panel with 1-line spi interface (st7789)", "[lcd]")
 #if CONFIG_LV_USE_USER_DATA
 #include "test_lvgl_port.h"
 
-static bool notify_lvgl_ready_to_flush(esp_lcd_panel_io_handle_t panel_io, void *user_data, void *event_data)
+static bool notify_lvgl_ready_to_flush(esp_lcd_panel_io_handle_t panel_io, esp_lcd_panel_io_event_data_t *edata, void *user_ctx)
 {
-    lv_disp_t *disp = *(lv_disp_t **)user_data;
+    lv_disp_t *disp = *(lv_disp_t **)user_ctx;
     lv_disp_flush_ready(&disp->driver);
     return false;
 }

components/esp_phy/CMakeLists.txt

@@ -22,7 +22,7 @@ idf_component_register(SRCS "${srcs}"
 idf_build_get_property(build_dir BUILD_DIR)
 
 set(target_name "${idf_target}")
-target_link_libraries(${COMPONENT_LIB} PUBLIC "-L ${CMAKE_CURRENT_SOURCE_DIR}/lib/${target_name}")
+target_link_libraries(${COMPONENT_LIB} PUBLIC "-L \"${CMAKE_CURRENT_SOURCE_DIR}/lib/${target_name}\"")
 
 if(link_binary_libs)
     target_link_libraries(${COMPONENT_LIB} PUBLIC phy)

components/esp_phy/lib

@@ -1 +1 @@
-Subproject commit 0ae4bb88c00faa641be5d2a613184735f484edb8
+Subproject commit 74658eb4fe30e42599a459ef89294010e26d57b6

components/esp_system/port/arch/riscv/panic_arch.c

@@ -1,17 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
 #include <stdio.h>
 
 #include "esp_spi_flash.h"

components/esp_system/port/arch/xtensa/panic_arch.c

@@ -1,16 +1,9 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
 #include "freertos/xtensa_context.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
@@ -44,6 +37,7 @@ void panic_print_registers(const void *f, int core)
 {
     XtExcFrame *frame = (XtExcFrame *) f;
     int *regs = (int *)frame;
+    (void)regs;
 
     const char *sdesc[] = {
         "PC      ", "PS      ", "A0      ", "A1      ", "A2      ", "A3      ", "A4      ", "A5      ",
@@ -115,6 +109,7 @@ static void print_illegal_instruction_details(const void *f)
         return;
     }
     volatile uint32_t *pepc = (uint32_t *)epc;
+    (void)pepc;
 
     panic_print_str("Memory dump at 0x");
     panic_print_hex(epc);

components/esp_system/port/cpu_start.c

@@ -1,16 +1,8 @@
-// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #include <stdint.h>
 #include <string.h>
@@ -64,7 +56,7 @@
 #include "esp32h2/memprot.h"
 #endif
 
-#include "spi_flash_private.h"
+#include "esp_private/spi_flash_os.h"
 #include "bootloader_flash_config.h"
 #include "bootloader_flash.h"
 #include "esp_private/crosscore_int.h"
@@ -371,18 +363,25 @@ void IRAM_ATTR call_start_cpu0(void)
     Cache_Set_IDROM_MMU_Size(cache_mmu_irom_size, CACHE_DROM_MMU_MAX_END - cache_mmu_irom_size);
 #endif // CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
 
-    esp_mspi_pin_init();
-    // For Octal flash, it's hard to implement a read_id function in OPI mode for all vendors.
-    // So we have to read it here in SPI mode, before entering the OPI mode.
-    bootloader_flash_update_id();
 #if CONFIG_ESPTOOLPY_OCT_FLASH
     bool efuse_opflash_en = REG_GET_FIELD(EFUSE_RD_REPEAT_DATA3_REG, EFUSE_FLASH_TYPE);
     if (!efuse_opflash_en) {
         ESP_EARLY_LOGE(TAG, "Octal Flash option selected, but EFUSE not configured!");
         abort();
     }
-    esp_opiflash_init();
 #endif
+    esp_mspi_pin_init();
+    // For Octal flash, it's hard to implement a read_id function in OPI mode for all vendors.
+    // So we have to read it here in SPI mode, before entering the OPI mode.
+    bootloader_flash_update_id();
+    /**
+     * This function initialise the Flash chip to the user-defined settings.
+     *
+     * In bootloader, we only init Flash (and MSPI) to a preliminary state, for being flexible to
+     * different chips.
+     * In this stage, we re-configure the Flash (and MSPI) to required configuration
+     */
+    spi_flash_init_chip_state();
 #if CONFIG_IDF_TARGET_ESP32S3
     //On other chips, this feature is not provided by HW, or hasn't been tested yet.
     spi_timing_flash_tuning();

components/esp_system/startup.c

@@ -1,16 +1,8 @@
-// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #include <stdint.h>
 #include <string.h>
@@ -474,7 +466,7 @@ IRAM_ATTR ESP_SYSTEM_INIT_FN(init_components0, BIT(0))
     esp_apb_backup_dma_lock_init();
 #endif
 
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     esp_coex_adapter_register(&g_coex_adapter_funcs);
     coex_pre_init();
 #endif

components/esp_wifi/CMakeLists.txt

@@ -39,7 +39,7 @@ if(CONFIG_ESP32_WIFI_ENABLED)
     idf_build_get_property(build_dir BUILD_DIR)
 
     set(target_name "${idf_target}")
-    target_link_libraries(${COMPONENT_LIB} PUBLIC "-L ${CMAKE_CURRENT_SOURCE_DIR}/lib/${target_name}")
+    target_link_libraries(${COMPONENT_LIB} PUBLIC "-L \"${CMAKE_CURRENT_SOURCE_DIR}/lib/${target_name}\"")
 
     if(link_binary_libs)
         set(blobs coexist core espnow mesh net80211 pp smartconfig wapi)

components/esp_wifi/Kconfig

@@ -300,4 +300,16 @@ menu "Wi-Fi"
             Select this option to enable power_management for station when disconnected.
             Chip will do modem-sleep when rf module is not in use any more.
 
+    config ESP_WIFI_EXTERNAL_COEXIST_ENABLE
+        bool "WiFi External Coexistence"
+        default n
+        depends on (!BT_ENABLED && (IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3))
+        help
+            If enabled, HW External coexistence arbitration is managed by GPIO pins.
+            It can support three types of wired combinations so far which are 1-wired/2-wired/3-wired.
+            User can select GPIO pins in application code with configure interfaces.
+
+            This function depends on BT-off
+            because currently we don't support external coex and internal coex simultaneously.
+
 endmenu  # Wi-Fi

components/esp_wifi/esp32c3/esp_adapter.c

@@ -1,16 +1,8 @@
-// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #include <stddef.h>
 #include <stdlib.h>
@@ -489,7 +481,7 @@ static esp_err_t esp_read_mac_wrapper(uint8_t* mac, uint32_t type)
 
 static int coex_init_wrapper(void)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     return coex_init();
 #else
     return 0;
@@ -498,14 +490,14 @@ static int coex_init_wrapper(void)
 
 static void coex_deinit_wrapper(void)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     coex_deinit();
 #endif
 }
 
 static int coex_enable_wrapper(void)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     return coex_enable();
 #else
     return 0;
@@ -514,14 +506,14 @@ static int coex_enable_wrapper(void)
 
 static void coex_disable_wrapper(void)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     coex_disable();
 #endif
 }
 
 static IRAM_ATTR uint32_t coex_status_get_wrapper(void)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     return coex_status_get();
 #else
     return 0;
@@ -530,14 +522,14 @@ static IRAM_ATTR uint32_t coex_status_get_wrapper(void)
 
 static void coex_condition_set_wrapper(uint32_t type, bool dissatisfy)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     coex_condition_set(type, dissatisfy);
 #endif
 }
 
 static int coex_wifi_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     return coex_wifi_request(event, latency, duration);
 #else
     return 0;
@@ -546,7 +538,7 @@ static int coex_wifi_request_wrapper(uint32_t event, uint32_t latency, uint32_t
 
 static IRAM_ATTR int coex_wifi_release_wrapper(uint32_t event)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     return coex_wifi_release(event);
 #else
     return 0;
@@ -555,7 +547,7 @@ static IRAM_ATTR int coex_wifi_release_wrapper(uint32_t event)
 
 static int coex_wifi_channel_set_wrapper(uint8_t primary, uint8_t secondary)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     return coex_wifi_channel_set(primary, secondary);
 #else
     return 0;
@@ -564,7 +556,7 @@ static int coex_wifi_channel_set_wrapper(uint8_t primary, uint8_t secondary)
 
 static IRAM_ATTR int coex_event_duration_get_wrapper(uint32_t event, uint32_t *duration)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     return coex_event_duration_get(event, duration);
 #else
     return 0;
@@ -573,7 +565,7 @@ static IRAM_ATTR int coex_event_duration_get_wrapper(uint32_t event, uint32_t *d
 
 static int coex_pti_get_wrapper(uint32_t event, uint8_t *pti)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     return coex_pti_get(event, pti);
 #else
     return 0;
@@ -582,21 +574,21 @@ static int coex_pti_get_wrapper(uint32_t event, uint8_t *pti)
 
 static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     coex_schm_status_bit_clear(type, status);
 #endif
 }
 
 static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     coex_schm_status_bit_set(type, status);
 #endif
 }
 
 static IRAM_ATTR int coex_schm_interval_set_wrapper(uint32_t interval)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     return coex_schm_interval_set(interval);
 #else
     return 0;
@@ -605,7 +597,7 @@ static IRAM_ATTR int coex_schm_interval_set_wrapper(uint32_t interval)
 
 static uint32_t coex_schm_interval_get_wrapper(void)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     return coex_schm_interval_get();
 #else
     return 0;
@@ -614,7 +606,7 @@ static uint32_t coex_schm_interval_get_wrapper(void)
 
 static uint8_t coex_schm_curr_period_get_wrapper(void)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     return coex_schm_curr_period_get();
 #else
     return 0;
@@ -623,7 +615,7 @@ static uint8_t coex_schm_curr_period_get_wrapper(void)
 
 static void * coex_schm_curr_phase_get_wrapper(void)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     return coex_schm_curr_phase_get();
 #else
     return NULL;
@@ -632,7 +624,7 @@ static void * coex_schm_curr_phase_get_wrapper(void)
 
 static int coex_schm_curr_phase_idx_set_wrapper(int idx)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     return coex_schm_curr_phase_idx_set(idx);
 #else
     return 0;
@@ -641,7 +633,7 @@ static int coex_schm_curr_phase_idx_set_wrapper(int idx)
 
 static int coex_schm_curr_phase_idx_get_wrapper(void)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     return coex_schm_curr_phase_idx_get();
 #else
     return 0;

components/esp_wifi/esp32s2/esp_adapter.c

@@ -1,16 +1,8 @@
-// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #include <stddef.h>
 #include <stdlib.h>
@@ -48,6 +40,8 @@
 #include "nvs.h"
 #include "os.h"
 #include "esp_smartconfig.h"
+#include "esp_coexist_internal.h"
+#include "esp_coexist_adapter.h"
 
 #define TAG "esp_adapter"
 
@@ -277,6 +271,16 @@ static void * wifi_thread_semphr_get_wrapper(void)
     return (void*)sem;
 }
 
+static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
+{
+    return (int32_t)xSemaphoreTakeFromISR(semphr, hptw);
+}
+
+static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
+{
+    return (int32_t)xSemaphoreGiveFromISR(semphr, hptw);
+}
+
 static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_tick)
 {
     if (block_time_tick == OSI_FUNCS_TIME_BLOCKING) {
@@ -483,7 +487,7 @@ static void * IRAM_ATTR zalloc_internal_wrapper(size_t size)
 
 static int coex_init_wrapper(void)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_EXTERNAL_COEX_ENABLE
     return coex_init();
 #else
     return 0;
@@ -492,14 +496,14 @@ static int coex_init_wrapper(void)
 
 static void coex_deinit_wrapper(void)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_EXTERNAL_COEX_ENABLE
     coex_deinit();
 #endif
 }
 
 static int coex_enable_wrapper(void)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_EXTERNAL_COEX_ENABLE
     return coex_enable();
 #else
     return 0;
@@ -508,14 +512,14 @@ static int coex_enable_wrapper(void)
 
 static void coex_disable_wrapper(void)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_EXTERNAL_COEX_ENABLE
     coex_disable();
 #endif
 }
 
 static IRAM_ATTR uint32_t coex_status_get_wrapper(void)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_EXTERNAL_COEX_ENABLE
     return coex_status_get();
 #else
     return 0;
@@ -524,14 +528,14 @@ static IRAM_ATTR uint32_t coex_status_get_wrapper(void)
 
 static void coex_condition_set_wrapper(uint32_t type, bool dissatisfy)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_EXTERNAL_COEX_ENABLE
     coex_condition_set(type, dissatisfy);
 #endif
 }
 
 static int coex_wifi_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_EXTERNAL_COEX_ENABLE
     return coex_wifi_request(event, latency, duration);
 #else
     return 0;
@@ -540,7 +544,7 @@ static int coex_wifi_request_wrapper(uint32_t event, uint32_t latency, uint32_t
 
 static IRAM_ATTR int coex_wifi_release_wrapper(uint32_t event)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_EXTERNAL_COEX_ENABLE
     return coex_wifi_release(event);
 #else
     return 0;
@@ -549,7 +553,7 @@ static IRAM_ATTR int coex_wifi_release_wrapper(uint32_t event)
 
 static int coex_wifi_channel_set_wrapper(uint8_t primary, uint8_t secondary)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_EXTERNAL_COEX_ENABLE
     return coex_wifi_channel_set(primary, secondary);
 #else
     return 0;
@@ -558,7 +562,7 @@ static int coex_wifi_channel_set_wrapper(uint8_t primary, uint8_t secondary)
 
 static IRAM_ATTR int coex_event_duration_get_wrapper(uint32_t event, uint32_t *duration)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_EXTERNAL_COEX_ENABLE
     return coex_event_duration_get(event, duration);
 #else
     return 0;
@@ -567,26 +571,30 @@ static IRAM_ATTR int coex_event_duration_get_wrapper(uint32_t event, uint32_t *d
 
 static int coex_pti_get_wrapper(uint32_t event, uint8_t *pti)
 {
+#if CONFIG_EXTERNAL_COEX_ENABLE
+    return coex_pti_get(event, pti);
+#else
     return 0;
+#endif
 }
 
 static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_EXTERNAL_COEX_ENABLE
     coex_schm_status_bit_clear(type, status);
 #endif
 }
 
 static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_EXTERNAL_COEX_ENABLE
     coex_schm_status_bit_set(type, status);
 #endif
 }
 
 static IRAM_ATTR int coex_schm_interval_set_wrapper(uint32_t interval)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_EXTERNAL_COEX_ENABLE
     return coex_schm_interval_set(interval);
 #else
     return 0;
@@ -595,7 +603,7 @@ static IRAM_ATTR int coex_schm_interval_set_wrapper(uint32_t interval)
 
 static uint32_t coex_schm_interval_get_wrapper(void)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_EXTERNAL_COEX_ENABLE
     return coex_schm_interval_get();
 #else
     return 0;
@@ -604,7 +612,7 @@ static uint32_t coex_schm_interval_get_wrapper(void)
 
 static uint8_t coex_schm_curr_period_get_wrapper(void)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_EXTERNAL_COEX_ENABLE
     return coex_schm_curr_period_get();
 #else
     return 0;
@@ -613,7 +621,7 @@ static uint8_t coex_schm_curr_period_get_wrapper(void)
 
 static void * coex_schm_curr_phase_get_wrapper(void)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_EXTERNAL_COEX_ENABLE
     return coex_schm_curr_phase_get();
 #else
     return NULL;
@@ -622,7 +630,7 @@ static void * coex_schm_curr_phase_get_wrapper(void)
 
 static int coex_schm_curr_phase_idx_set_wrapper(int idx)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_EXTERNAL_COEX_ENABLE
     return coex_schm_curr_phase_idx_set(idx);
 #else
     return 0;
@@ -631,7 +639,7 @@ static int coex_schm_curr_phase_idx_set_wrapper(int idx)
 
 static int coex_schm_curr_phase_idx_get_wrapper(void)
 {
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_EXTERNAL_COEX_ENABLE
     return coex_schm_curr_phase_idx_get();
 #else
     return 0;
@@ -643,6 +651,11 @@ static void IRAM_ATTR esp_empty_wrapper(void)
 
 }
 
+int32_t IRAM_ATTR coex_is_in_isr_wrapper(void)
+{
+    return !xPortCanYield();
+}
+
 wifi_osi_funcs_t g_wifi_osi_funcs = {
     ._version = ESP_WIFI_OS_ADAPTER_VERSION,
     ._env_is_chip = env_is_chip_wrapper,
@@ -761,3 +774,19 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
     ._coex_schm_curr_phase_idx_get = coex_schm_curr_phase_idx_get_wrapper,
     ._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
 };
+
+coex_adapter_funcs_t g_coex_adapter_funcs = {
+    ._version = COEX_ADAPTER_VERSION,
+    ._task_yield_from_isr = task_yield_from_isr_wrapper,
+    ._semphr_create = semphr_create_wrapper,
+    ._semphr_delete = semphr_delete_wrapper,
+    ._semphr_take_from_isr = semphr_take_from_isr_wrapper,
+    ._semphr_give_from_isr = semphr_give_from_isr_wrapper,
+    ._semphr_take = semphr_take_wrapper,
+    ._semphr_give = semphr_give_wrapper,
+    ._is_in_isr = coex_is_in_isr_wrapper,
+    ._malloc_internal =  malloc_internal_wrapper,
+    ._free = free,
+    ._esp_timer_get_time = esp_timer_get_time,
+    ._magic = COEX_ADAPTER_MAGIC,
+};

components/esp_wifi/include/esp_coexist.h

@@ -1,16 +1,8 @@
-// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef __ESP_COEXIST_H__
 #define __ESP_COEXIST_H__
@@ -32,6 +24,13 @@ typedef enum {
     ESP_COEX_PREFER_NUM,            /*!< Prefer value numbers */
 } esp_coex_prefer_t;
 
+typedef enum {
+    EXTERN_COEX_WIRE_1 = 0,
+    EXTERN_COEX_WIRE_2,
+    EXTERN_COEX_WIRE_3,
+    EXTERN_COEX_WIRE_NUM,
+} external_coex_wire_t;
+
 /**
  * @brief coex status type
  */
@@ -41,6 +40,36 @@ typedef enum {
     ESP_COEX_ST_TYPE_BT,
 } esp_coex_status_type_t;
 
+/**
+ * @brief external coex gpio pti
+ */
+typedef struct {
+    int32_t in_pin0;
+    int32_t in_pin1;
+    int32_t out_pin0;
+} esp_external_coex_gpio_set_t;
+
+/**
+ * @brief external coex pti level
+ */
+typedef enum {
+    EXTERN_COEX_PTI_MID = 0,
+    EXTERN_COEX_PTI_HIGH,
+    EXTERN_COEX_PTI_NUM,
+} esp_coex_pti_level_t;
+
+/**
+ * @brief external coex pti
+ */
+typedef struct {
+    uint32_t in_pti1;
+    uint32_t in_pti2;
+    uint32_t in_pti3;
+    uint32_t out_pti1;
+    uint32_t out_pti2;
+    uint32_t out_pti3;
+} esp_external_coex_pti_set_t;
+
 #define ESP_COEX_BLE_ST_MESH_CONFIG        0x08
 #define ESP_COEX_BLE_ST_MESH_TRAFFIC       0x10
 #define ESP_COEX_BLE_ST_MESH_STANDBY       0x20
@@ -84,6 +113,18 @@ esp_err_t esp_coex_status_bit_set(esp_coex_status_type_t type, uint32_t status);
  */
 esp_err_t esp_coex_status_bit_clear(esp_coex_status_type_t type, uint32_t status);
 
+#if CONFIG_EXTERNAL_COEX_ENABLE
+/**
+ * @brief Setup gpio pin and corresponding pti level, start external coex.
+ * @param wire_type : to select the whole external coex gpio number.
+ * @param gpio_pin : gpio pin number to choose.
+ * @return : ESP_OK - success, other - failed
+ */
+esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type,
+                    esp_external_coex_gpio_set_t gpio_pin);
+
+esp_err_t esp_disable_extern_coex_gpio_pin();
+#endif
 
 #ifdef __cplusplus
 }

components/esp_wifi/include/esp_coexist_internal.h

@@ -1,21 +1,14 @@
-// Copyright 2018-2018 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #ifndef __ESP_COEXIST_INTERNAL_H__
 #define __ESP_COEXIST_INTERNAL_H__
 
 #include <stdbool.h>
+#include "esp_coexist.h"
 #include "esp_coexist_adapter.h"
 
 #ifdef __cplusplus
@@ -210,6 +203,29 @@ int coex_schm_curr_phase_idx_get(void);
  */
 esp_err_t esp_coex_adapter_register(coex_adapter_funcs_t *funcs);
 
+#if CONFIG_EXTERNAL_COEX_ENABLE
+/**
+  * @brief     Set external coexistence pti level and enable it.
+  *
+  * @param     level1    external coex low pti
+  * @param     level2    external coex mid pti
+  * @param     level3    external coex high pti
+  *
+  * @return
+  *    - ESP_OK: succeed
+  */
+esp_err_t esp_coex_external_set(esp_coex_pti_level_t level1,
+         esp_coex_pti_level_t level2, esp_coex_pti_level_t level3);
+
+/**
+  * @brief     Disable external coexist
+  *
+  * @return
+  *    - ESP_OK: succeed
+  */
+void esp_coex_external_stop(void);
+#endif    /*External Coex*/
+
 /**
   * @brief     Check the MD5 values of the coexistence adapter header files in IDF and WiFi library
   *

components/esp_wifi/include/esp_wifi_types.h

@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 
 #ifndef __ESP_WIFI_TYPES_H__
@@ -80,6 +72,7 @@ typedef enum {
     WIFI_REASON_ASSOC_NOT_AUTHED         = 9,
     WIFI_REASON_DISASSOC_PWRCAP_BAD      = 10,
     WIFI_REASON_DISASSOC_SUPCHAN_BAD     = 11,
+    WIFI_REASON_BSS_TRANSITION_DISASSOC  = 12,
     WIFI_REASON_IE_INVALID               = 13,
     WIFI_REASON_MIC_FAILURE              = 14,
     WIFI_REASON_4WAY_HANDSHAKE_TIMEOUT   = 15,
@@ -250,7 +243,8 @@ typedef struct {
     wifi_pmf_config_t pmf_cfg;    /**< Configuration for Protected Management Frame. Will be advertized in RSN Capabilities in RSN IE. */
     uint32_t rm_enabled:1;        /**< Whether Radio Measurements are enabled for the connection */
     uint32_t btm_enabled:1;       /**< Whether BSS Transition Management is enabled for the connection */
-    uint32_t reserved:30;         /**< Reserved for future feature set */
+    uint32_t mbo_enabled:1;       /**< Whether MBO is enabled for the connection */
+    uint32_t reserved:29;         /**< Reserved for future feature set */
 } wifi_sta_config_t;
 
 /** @brief Configuration data for ESP32 AP or STA.

components/esp_wifi/lib

@@ -1 +1 @@
-Subproject commit 045b526641b7dbe7a6be3d9039be93a2c1b56f10
+Subproject commit 049fbb7f22962fc4e2316e732ad08fc95b14149f

components/esp_wifi/sdkconfig.rename

@@ -2,3 +2,4 @@
 # CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
 
 CONFIG_SW_COEXIST_ENABLE                CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE
+CONFIG_EXTERNAL_COEX_ENABLE             CONFIG_ESP_WIFI_EXTERNAL_COEXIST_ENABLE

components/esp_wifi/src/coexist.c

@@ -1,20 +1,20 @@
-// Copyright 2018-2018 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #include "esp_coexist.h"
 #include "esp_coexist_internal.h"
 
+#if CONFIG_EXTERNAL_COEX_ENABLE
+#include "driver/gpio.h"
+#include "esp_rom_gpio.h"
+#include "hal/gpio_hal.h"
+#include "hal/gpio_types.h"
+#include "soc/gpio_periph.h"
+#endif
+
 const char *esp_coex_version_get(void)
 {
     return coex_version_get();
@@ -24,3 +24,91 @@ esp_err_t esp_coex_preference_set(esp_coex_prefer_t prefer)
 {
     return coex_preference_set((coex_prefer_t)prefer);
 }
+
+#if CONFIG_EXTERNAL_COEX_ENABLE
+#define GPIO_PIN_REG(a) (GPIO_PIN0_REG + a * 0x04)
+esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_external_coex_gpio_set_t gpio_pin)
+{
+    switch (wire_type)
+    {
+        case EXTERN_COEX_WIRE_3:
+        {
+            /*Input gpio pin setup --> GPIO_BT_PRIORITY_IDX：GPIO_BT_ACTIVE_IDX*/
+            gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin0], PIN_FUNC_GPIO);
+            gpio_set_direction(gpio_pin.in_pin0, GPIO_MODE_INPUT);
+            esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, GPIO_BT_ACTIVE_IDX, false);
+
+            gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin1], PIN_FUNC_GPIO);
+            gpio_set_direction(gpio_pin.in_pin1, GPIO_MODE_INPUT);
+            esp_rom_gpio_connect_in_signal(gpio_pin.in_pin1, GPIO_BT_PRIORITY_IDX, false);
+
+            /*Output gpio pin setup --> GPIO_WLAN_ACTIVE_IDX: 1 BT, 0 WiFi*/
+            gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.out_pin0], PIN_FUNC_GPIO);
+            gpio_set_direction(gpio_pin.out_pin0, GPIO_MODE_OUTPUT);
+            REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.out_pin0));
+            esp_rom_gpio_connect_out_signal(gpio_pin.out_pin0, GPIO_WLAN_ACTIVE_IDX, false, false);
+
+            REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC1_BYPASS, 2);
+            REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC2_BYPASS, 2);
+            REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin1), GPIO_PIN1_SYNC1_BYPASS, 2);
+            REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin1), GPIO_PIN1_SYNC2_BYPASS, 2);
+
+            int ret = esp_coex_external_set(EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_HIGH);
+            if (ESP_OK != ret) {
+                return ESP_FAIL;
+            }
+            break;
+        }
+        case EXTERN_COEX_WIRE_2:
+        {
+            /*Input gpio pin setup --> GPIO_BT_PRIORITY_IDX：GPIO_BT_ACTIVE_IDX*/
+            gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin0], PIN_FUNC_GPIO);
+            gpio_set_direction(gpio_pin.in_pin0, GPIO_MODE_INPUT);
+            esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, GPIO_BT_ACTIVE_IDX, false);
+
+            /*Output gpio pin setup --> GPIO_WLAN_ACTIVE_IDX: 1 BT, 0 WiFi*/
+            gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.out_pin0], PIN_FUNC_GPIO);
+            gpio_set_direction(gpio_pin.out_pin0, GPIO_MODE_OUTPUT);
+            REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.out_pin0));
+            esp_rom_gpio_connect_out_signal(gpio_pin.out_pin0, GPIO_WLAN_ACTIVE_IDX, false, false);
+
+            REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC1_BYPASS, 2);
+            REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC2_BYPASS, 2);
+
+            int ret = esp_coex_external_set(EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_MID);
+            if (ESP_OK != ret) {
+                return ESP_FAIL;
+            }
+            break;
+        }
+        case EXTERN_COEX_WIRE_1:
+        {
+            /*Input gpio pin setup --> GPIO_BT_PRIORITY_IDX：GPIO_BT_ACTIVE_IDX*/
+            gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin0], PIN_FUNC_GPIO);
+            gpio_set_direction(gpio_pin.in_pin0, GPIO_MODE_INPUT);
+            esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, GPIO_BT_ACTIVE_IDX, false);
+
+            REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC1_BYPASS, 2);
+            REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC2_BYPASS, 2);
+
+            int ret = esp_coex_external_set(EXTERN_COEX_PTI_HIGH, EXTERN_COEX_PTI_HIGH, EXTERN_COEX_PTI_HIGH);
+            if (ESP_OK != ret) {
+                return ESP_FAIL;
+            }
+            break;
+        }
+        default:
+        {
+            return ESP_FAIL;
+        }
+    }
+    return ESP_OK;
+}
+
+esp_err_t esp_disable_extern_coex_gpio_pin()
+{
+    esp_coex_external_stop();
+
+    return ESP_OK;
+}
+#endif/*External Coex*/

components/esp_wifi/src/wifi_init.c

@@ -1,16 +1,8 @@
-// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #include <esp_event.h>
 #include <esp_wifi.h>
@@ -237,7 +229,7 @@ esp_err_t esp_wifi_init(const wifi_init_config_t *config)
         ESP_LOGW(TAG, "Failed to set default Wi-Fi event handlers (0x%x)", err);
     }
 #endif
-#if CONFIG_SW_COEXIST_ENABLE
+#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
     coex_init();
 #endif
     esp_wifi_set_log_level();

components/espcoredump/src/port/xtensa/core_dump_port.c

@@ -1,16 +1,8 @@
-// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 /**
  * @file
@@ -531,7 +523,8 @@ void esp_core_dump_summary_parse_backtrace_info(esp_core_dump_bt_info_t *bt_info
     frame.next_pc = stack->a0;
 
     corrupted = !(esp_stack_ptr_is_sane(frame.sp) &&
-                esp_ptr_executable((void *)esp_cpu_process_stack_pc(frame.pc)));
+                (esp_ptr_executable((void *)esp_cpu_process_stack_pc(frame.pc)) ||
+                stack->exccause == EXCCAUSE_INSTR_PROHIBITED)); /* Ignore the first corrupted PC in case of InstrFetchProhibited */
 
     /* vaddr is actual stack address when crash occurred. However that stack is now saved
      * in the flash at a different location. Hence for each SP, we need to adjust the offset

components/esptool_py/Kconfig.projbuild

@@ -66,15 +66,6 @@ menu "Serial flasher config"
         bool "Enable Octal Flash"
         default n
 
-    choice ESPTOOLPY_FLASH_VENDOR
-        depends on ESPTOOLPY_OCT_FLASH
-        prompt "Select OPI Flash Vendor"
-        default ESPTOOLPY_FLASH_VENDOR_MXIC
-
-        config ESPTOOLPY_FLASH_VENDOR_MXIC
-            bool "MXIC OPI FLASH(MX25UM25645G)"
-    endchoice
-
     choice ESPTOOLPY_FLASHMODE
         prompt "Flash SPI mode"
         default ESPTOOLPY_FLASHMODE_DIO
@@ -100,17 +91,16 @@ menu "Serial flasher config"
             bool "OPI"
     endchoice
 
-    choice ESPTOOLPY_FLASHMODE_OCT
-        depends on ESPTOOLPY_FLASHMODE_OPI
-        prompt "Flash OPI mode"
-        default ESPTOOLPY_FLASHMODE_OPI_DTR
+    choice ESPTOOLPY_FLASH_SAMPLE_MODE
+        prompt "Flash Sampling Mode"
+        default ESPTOOLPY_FLASH_SAMPLE_MODE_DTR if ESPTOOLPY_OCT_FLASH
+        default ESPTOOLPY_FLASH_SAMPLE_MODE_STR if !ESPTOOLPY_OCT_FLASH
 
-        config ESPTOOLPY_FLASHMODE_OPI_STR
-            depends on ESPTOOLPY_FLASH_VENDOR_MXIC
-            bool "OPI_STR"
-        config ESPTOOLPY_FLASHMODE_OPI_DTR
-            depends on ESPTOOLPY_FLASH_VENDOR_MXIC
-            bool "OPI_DTR"
+        config ESPTOOLPY_FLASH_SAMPLE_MODE_STR
+            bool "STR Mode"
+        config ESPTOOLPY_FLASH_SAMPLE_MODE_DTR
+            depends on ESPTOOLPY_OCT_FLASH
+            bool "DTR Mode"
     endchoice
 
     # Note: we use esptool.py to flash bootloader in
@@ -136,7 +126,7 @@ menu "Serial flasher config"
             The SPI flash frequency to be used.
 
         config ESPTOOLPY_FLASHFREQ_120M
-            depends on ESPTOOLPY_FLASHMODE_OPI_STR || !ESPTOOLPY_OCT_FLASH
+            depends on ESPTOOLPY_FLASH_SAMPLE_MODE_STR
             bool "120 MHz"
         config ESPTOOLPY_FLASHFREQ_80M
             bool "80 MHz"

components/freertos/esp_additions/task_snapshot.c

@@ -1,16 +1,8 @@
-// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #include "freertos/FreeRTOS.h"
 #include "freertos/task_snapshot.h"
@@ -84,7 +76,7 @@
 		task in the Blocked state. */
 		prvTaskGetSnapshotsFromList( pxTaskSnapshotArray, &uxTask, uxArraySize, pxGetDelayedTaskList() );
 		prvTaskGetSnapshotsFromList( pxTaskSnapshotArray, &uxTask, uxArraySize, pxGetOverflowDelayedTaskList() );
-		for (i = 0; i < portNUM_PROCESSORS; i++) {
+		for (i = 0; i < configNUM_CORES; i++) {
 			if( uxTask >= uxArraySize ) {
 				break;
 			}
@@ -182,7 +174,7 @@
 		}
 		while( i > tskIDLE_PRIORITY );
 		/* pending ready tasks lists */
-		for (i = 0; i < portNUM_PROCESSORS; i++) {
+		for (i = 0; i < configNUM_CORES; i++) {
 			List_t *pxList = pxListGetReadyPendingTask(i);
 			if( bCurTaskListFound == pdFALSE && pxTaskList != NULL ) {
 				/* need to find list the current task item from */

components/freertos/event_groups.c

@@ -661,7 +661,7 @@ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
                  * eventUNBLOCKED_DUE_TO_BIT_SET bit is set so the task knows
                  * that is was unblocked due to its required bits matching, rather
                  * than because it timed out. */
-                xTaskRemoveFromUnorderedEventList( pxListItem, pxEventBits->uxEventBits | eventUNBLOCKED_DUE_TO_BIT_SET );
+                vTaskRemoveFromUnorderedEventList( pxListItem, pxEventBits->uxEventBits | eventUNBLOCKED_DUE_TO_BIT_SET );
             }
 
             /* Move onto the next list item.  Note pxListItem->pxNext is not
@@ -699,7 +699,7 @@ void vEventGroupDelete( EventGroupHandle_t xEventGroup )
             /* Unblock the task, returning 0 as the event list is being deleted
              * and cannot therefore have any bits set. */
             configASSERT( pxTasksWaitingForBits->xListEnd.pxNext != ( const ListItem_t * ) &( pxTasksWaitingForBits->xListEnd ) );
-            xTaskRemoveFromUnorderedEventList( pxTasksWaitingForBits->xListEnd.pxNext, eventUNBLOCKED_DUE_TO_BIT_SET );
+            vTaskRemoveFromUnorderedEventList( pxTasksWaitingForBits->xListEnd.pxNext, eventUNBLOCKED_DUE_TO_BIT_SET );
         }
     }
     taskEXIT_CRITICAL();

components/freertos/include/esp_additions/freertos/FreeRTOSConfig.h

@@ -90,7 +90,6 @@
 #define portNUM_PROCESSORS                              1
 #endif
 
-#define configASSERT_2                                  0
 #define portUSING_MPU_WRAPPERS                          0
 #define configUSE_MUTEX                                 1
 
@@ -206,7 +205,6 @@
 #define configGENERATE_RUN_TIME_STATS                   1       /* Used by vTaskGetRunTimeStats() */
 #endif
 
-#define configUSE_TRACE_FACILITY_2                      0
 #define configBENCHMARK                                 0
 #define configUSE_16_BIT_TICKS                          0
 #define configIDLE_SHOULD_YIELD                         0
@@ -306,4 +304,9 @@ extern void vPortCleanUpTCB ( void *pxTCB );
 
 #define configTASK_NOTIFICATION_ARRAY_ENTRIES           1
 
+// backward compatibility for 4.4
+#define xTaskRemoveFromUnorderedEventList vTaskRemoveFromUnorderedEventList
+
+#define configNUM_CORES                                 portNUM_PROCESSORS
+
 #endif /* FREERTOS_CONFIG_H */

components/freertos/include/freertos/event_groups.h

@@ -64,7 +64,7 @@
  * used to create a synchronisation point between multiple tasks (a
  * 'rendezvous').
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup EventGroup EventGroup
  * @endcond
  */
@@ -78,7 +78,7 @@
  * xEventGroupCreate() returns an EventGroupHandle_t variable that can then
  * be used as a parameter to other event group functions.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup EventGroupHandle_t EventGroupHandle_t
  * @endcond
  * \ingroup EventGroup
@@ -94,7 +94,7 @@ typedef struct EventGroupDef_t * EventGroupHandle_t;
  * number of bits it holds is set by configUSE_16_BIT_TICKS (16 bits if set to 1,
  * 32 bits if set to 0.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup EventBits_t EventBits_t
  * @endcond
  * \ingroup EventGroup
@@ -102,7 +102,7 @@ typedef struct EventGroupDef_t * EventGroupHandle_t;
 typedef TickType_t               EventBits_t;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * event_groups.h
  * @code{c}
  * EventGroupHandle_t xEventGroupCreate( void );
@@ -152,7 +152,7 @@ typedef TickType_t               EventBits_t;
  *      // The event group was created.
  *  }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xEventGroupCreate xEventGroupCreate
  * @endcond
  * \ingroup EventGroup
@@ -162,7 +162,7 @@ typedef TickType_t               EventBits_t;
 #endif
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * event_groups.h
  * @code{c}
  * EventGroupHandle_t xEventGroupCreateStatic( EventGroupHandle_t * pxEventGroupBuffer );
@@ -217,7 +217,7 @@ typedef TickType_t               EventBits_t;
 #endif
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * event_groups.h
  * @code{c}
  *  EventBits_t xEventGroupWaitBits(    EventGroupHandle_t xEventGroup,
@@ -307,7 +307,7 @@ typedef TickType_t               EventBits_t;
  *      }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xEventGroupWaitBits xEventGroupWaitBits
  * @endcond
  * \ingroup EventGroup
@@ -319,7 +319,7 @@ EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
                                  TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * event_groups.h
  * @code{c}
  *  EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear );
@@ -372,7 +372,7 @@ EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
  *      }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xEventGroupClearBits xEventGroupClearBits
  * @endcond
  * \ingroup EventGroup
@@ -381,7 +381,7 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
                                   const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * event_groups.h
  * @code{c}
  *  BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
@@ -432,7 +432,7 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
  *      }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xEventGroupClearBitsFromISR xEventGroupClearBitsFromISR
  * @endcond
  * \ingroup EventGroup
@@ -446,7 +446,7 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
 #endif
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * event_groups.h
  * @code{c}
  *  EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
@@ -516,7 +516,7 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
  *      }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xEventGroupSetBits xEventGroupSetBits
  * @endcond
  * \ingroup EventGroup
@@ -525,7 +525,7 @@ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
                                 const EventBits_t uxBitsToSet ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * event_groups.h
  * @code{c}
  *  BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken );
@@ -595,7 +595,7 @@ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
  *      }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xEventGroupSetBitsFromISR xEventGroupSetBitsFromISR
  * @endcond
  * \ingroup EventGroup
@@ -610,7 +610,7 @@ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
 #endif
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * event_groups.h
  * @code{c}
  *  EventBits_t xEventGroupSync(    EventGroupHandle_t xEventGroup,
@@ -732,7 +732,7 @@ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
  * }
  *
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xEventGroupSync xEventGroupSync
  * @endcond
  * \ingroup EventGroup
@@ -744,7 +744,7 @@ EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup,
 
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * event_groups.h
  * @code{c}
  *  EventBits_t xEventGroupGetBits( EventGroupHandle_t xEventGroup );
@@ -758,7 +758,7 @@ EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup,
  *
  * @return The event group bits at the time xEventGroupGetBits() was called.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xEventGroupGetBits xEventGroupGetBits
  * @endcond
  * \ingroup EventGroup
@@ -766,7 +766,7 @@ EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup,
 #define xEventGroupGetBits( xEventGroup )    xEventGroupClearBits( xEventGroup, 0 )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * event_groups.h
  * @code{c}
  *  EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup );
@@ -779,7 +779,7 @@ EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup,
  *
  * @return The event group bits at the time xEventGroupGetBitsFromISR() was called.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xEventGroupGetBitsFromISR xEventGroupGetBitsFromISR
  * @endcond
  * \ingroup EventGroup
@@ -787,7 +787,7 @@ EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup,
 EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * event_groups.h
  * @code{c}
  *  void xEventGroupDelete( EventGroupHandle_t xEventGroup );
@@ -802,7 +802,7 @@ EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) PRIVILEG
  */
 void vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
 
-/** @cond */
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
 
 /* For internal use only. */
 void vEventGroupSetBitsCallback( void * pvEventGroup,

components/freertos/include/freertos/message_buffer.h

@@ -85,7 +85,7 @@ typedef void * MessageBufferHandle_t;
 /*-----------------------------------------------------------*/
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * message_buffer.h
  *
  * @code{c}
@@ -139,7 +139,7 @@ typedef void * MessageBufferHandle_t;
  *  }
  *
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xMessageBufferCreate xMessageBufferCreate
  * @endcond
  * \ingroup MessageBufferManagement
@@ -148,7 +148,7 @@ typedef void * MessageBufferHandle_t;
     ( MessageBufferHandle_t ) xStreamBufferGenericCreate( xBufferSizeBytes, ( size_t ) 0, pdTRUE )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * message_buffer.h
  *
  * @code{c}
@@ -210,7 +210,7 @@ typedef void * MessageBufferHandle_t;
  * }
  *
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xMessageBufferCreateStatic xMessageBufferCreateStatic
  * @endcond
  * \ingroup MessageBufferManagement
@@ -219,7 +219,7 @@ typedef void * MessageBufferHandle_t;
     ( MessageBufferHandle_t ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, 0, pdTRUE, pucMessageBufferStorageArea, pxStaticMessageBuffer )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * message_buffer.h
  *
  * @code{c}
@@ -314,7 +314,7 @@ typedef void * MessageBufferHandle_t;
  *  }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xMessageBufferSend xMessageBufferSend
  * @endcond
  * \ingroup MessageBufferManagement
@@ -323,7 +323,7 @@ typedef void * MessageBufferHandle_t;
     xStreamBufferSend( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * message_buffer.h
  *
  * @code{c}
@@ -423,7 +423,7 @@ typedef void * MessageBufferHandle_t;
  *  portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xMessageBufferSendFromISR xMessageBufferSendFromISR
  * @endcond
  * \ingroup MessageBufferManagement
@@ -432,7 +432,7 @@ typedef void * MessageBufferHandle_t;
     xStreamBufferSendFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * message_buffer.h
  *
  * @code{c}
@@ -516,7 +516,7 @@ typedef void * MessageBufferHandle_t;
  *  }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xMessageBufferReceive xMessageBufferReceive
  * @endcond
  * \ingroup MessageBufferManagement
@@ -526,7 +526,7 @@ typedef void * MessageBufferHandle_t;
 
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * message_buffer.h
  *
  * @code{c}
@@ -622,7 +622,7 @@ typedef void * MessageBufferHandle_t;
  *  portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xMessageBufferReceiveFromISR xMessageBufferReceiveFromISR
  * @endcond
  * \ingroup MessageBufferManagement
@@ -631,7 +631,7 @@ typedef void * MessageBufferHandle_t;
     xStreamBufferReceiveFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * message_buffer.h
  *
  * @code{c}
@@ -654,7 +654,7 @@ typedef void * MessageBufferHandle_t;
     vStreamBufferDelete( ( StreamBufferHandle_t ) xMessageBuffer )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * message_buffer.h
  * @code{c}
  * BaseType_t xMessageBufferIsFull( MessageBufferHandle_t xMessageBuffer ) );
@@ -674,7 +674,7 @@ typedef void * MessageBufferHandle_t;
     xStreamBufferIsFull( ( StreamBufferHandle_t ) xMessageBuffer )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * message_buffer.h
  * @code{c}
  * BaseType_t xMessageBufferIsEmpty( MessageBufferHandle_t xMessageBuffer ) );
@@ -693,7 +693,7 @@ typedef void * MessageBufferHandle_t;
     xStreamBufferIsEmpty( ( StreamBufferHandle_t ) xMessageBuffer )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * message_buffer.h
  * @code{c}
  * BaseType_t xMessageBufferReset( MessageBufferHandle_t xMessageBuffer );
@@ -712,7 +712,7 @@ typedef void * MessageBufferHandle_t;
  * the message queue to wait for space to become available, or to wait for a
  * a message to be available, then pdFAIL is returned.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xMessageBufferReset xMessageBufferReset
  * @endcond
  * \ingroup MessageBufferManagement
@@ -722,7 +722,7 @@ typedef void * MessageBufferHandle_t;
 
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * message_buffer.h
  * @code{c}
  * size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer ) );
@@ -740,7 +740,7 @@ typedef void * MessageBufferHandle_t;
  * architecture, so if xMessageBufferSpacesAvailable() returns 10, then the size
  * of the largest message that can be written to the message buffer is 6 bytes.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xMessageBufferSpaceAvailable xMessageBufferSpaceAvailable
  * @endcond
  * \ingroup MessageBufferManagement
@@ -751,7 +751,7 @@ typedef void * MessageBufferHandle_t;
     xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer ) /* Corrects typo in original macro name. */
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * message_buffer.h
  * @code{c}
  * size_t xMessageBufferNextLengthBytes( MessageBufferHandle_t xMessageBuffer ) );
@@ -767,7 +767,7 @@ typedef void * MessageBufferHandle_t;
  * @return The length (in bytes) of the next message in the message buffer, or 0
  * if the message buffer is empty.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xMessageBufferNextLengthBytes xMessageBufferNextLengthBytes
  * @endcond
  * \ingroup MessageBufferManagement
@@ -776,7 +776,7 @@ typedef void * MessageBufferHandle_t;
     xStreamBufferNextMessageLengthBytes( ( StreamBufferHandle_t ) xMessageBuffer ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * message_buffer.h
  *
  * @code{c}
@@ -811,7 +811,7 @@ typedef void * MessageBufferHandle_t;
  * @return If a task was removed from the Blocked state then pdTRUE is returned.
  * Otherwise pdFALSE is returned.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xMessageBufferSendCompletedFromISR xMessageBufferSendCompletedFromISR
  * @endcond
  * \ingroup StreamBufferManagement
@@ -820,7 +820,7 @@ typedef void * MessageBufferHandle_t;
     xStreamBufferSendCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * message_buffer.h
  *
  * @code{c}
@@ -856,7 +856,7 @@ typedef void * MessageBufferHandle_t;
  * @return If a task was removed from the Blocked state then pdTRUE is returned.
  * Otherwise pdFALSE is returned.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xMessageBufferReceiveCompletedFromISR xMessageBufferReceiveCompletedFromISR
  * @endcond
  * \ingroup StreamBufferManagement

components/freertos/include/freertos/queue.h

@@ -62,7 +62,7 @@ typedef struct QueueDefinition   * QueueSetHandle_t;
  */
 typedef struct QueueDefinition   * QueueSetMemberHandle_t;
 
-/** @cond */
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
 
 /* For internal use only. */
 #define queueSEND_TO_BACK                     ( ( BaseType_t ) 0 )
@@ -80,7 +80,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
 /** @endcond */
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * QueueHandle_t xQueueCreate(
@@ -146,7 +146,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
  *  // ... Rest of task code.
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xQueueCreate xQueueCreate
  * @endcond
  * \ingroup QueueManagement
@@ -156,7 +156,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
 #endif
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * QueueHandle_t xQueueCreateStatic(
@@ -235,7 +235,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
  *  // ... Rest of task code.
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xQueueCreateStatic xQueueCreateStatic
  * @endcond
  * \ingroup QueueManagement
@@ -245,7 +245,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
 #endif /* configSUPPORT_STATIC_ALLOCATION */
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * BaseType_t xQueueSendToToFront(
@@ -321,7 +321,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
  *  // ... Rest of task code.
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xQueueSend xQueueSend
  * @endcond
  * \ingroup QueueManagement
@@ -330,7 +330,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
     xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_FRONT )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * BaseType_t xQueueSendToBack(
@@ -408,7 +408,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
  *  // ... Rest of task code.
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xQueueSend xQueueSend
  * @endcond
  * \ingroup QueueManagement
@@ -417,7 +417,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
     xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * BaseType_t xQueueSend(
@@ -497,7 +497,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
  *  // ... Rest of task code.
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xQueueSend xQueueSend
  * @endcond
  * \ingroup QueueManagement
@@ -506,7 +506,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
     xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * BaseType_t xQueueOverwrite(
@@ -585,7 +585,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
  *  // ...
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xQueueOverwrite xQueueOverwrite
  * @endcond
  * \ingroup QueueManagement
@@ -595,7 +595,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
 
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * BaseType_t xQueueGenericSend(
@@ -678,7 +678,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
  *  // ... Rest of task code.
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xQueueSend xQueueSend
  * @endcond
  * \ingroup QueueManagement
@@ -689,7 +689,7 @@ BaseType_t xQueueGenericSend( QueueHandle_t xQueue,
                               const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * BaseType_t xQueuePeek(
@@ -780,7 +780,7 @@ BaseType_t xQueueGenericSend( QueueHandle_t xQueue,
  *  // ... Rest of task code.
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xQueuePeek xQueuePeek
  * @endcond
  * \ingroup QueueManagement
@@ -790,7 +790,7 @@ BaseType_t xQueuePeek( QueueHandle_t xQueue,
                        TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * BaseType_t xQueuePeekFromISR(
@@ -820,7 +820,7 @@ BaseType_t xQueuePeek( QueueHandle_t xQueue,
  * @return pdTRUE if an item was successfully received from the queue,
  * otherwise pdFALSE.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xQueuePeekFromISR xQueuePeekFromISR
  * @endcond
  * \ingroup QueueManagement
@@ -829,7 +829,7 @@ BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue,
                               void * const pvBuffer ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * BaseType_t xQueueReceive(
@@ -917,7 +917,7 @@ BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue,
  *  // ... Rest of task code.
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xQueueReceive xQueueReceive
  * @endcond
  * \ingroup QueueManagement
@@ -927,7 +927,7 @@ BaseType_t xQueueReceive( QueueHandle_t xQueue,
                           TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue );
@@ -940,7 +940,7 @@ BaseType_t xQueueReceive( QueueHandle_t xQueue,
  *
  * @return The number of messages available in the queue.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting
  * @endcond
  * \ingroup QueueManagement
@@ -948,7 +948,7 @@ BaseType_t xQueueReceive( QueueHandle_t xQueue,
 UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue );
@@ -963,7 +963,7 @@ UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue ) PRIVILEGED_FUNC
  *
  * @return The number of spaces available in the queue.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting
  * @endcond
  * \ingroup QueueManagement
@@ -971,7 +971,7 @@ UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue ) PRIVILEGED_FUNC
 UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * void vQueueDelete( QueueHandle_t xQueue );
@@ -983,7 +983,7 @@ UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue ) PRIVILEGED_FUNC
  *
  * @param xQueue A handle to the queue to be deleted.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup vQueueDelete vQueueDelete
  * @endcond
  * \ingroup QueueManagement
@@ -991,7 +991,7 @@ UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue ) PRIVILEGED_FUNC
 void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * BaseType_t xQueueSendToFrontFromISR(
@@ -1057,7 +1057,7 @@ void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
  * }
  * @endcode
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xQueueSendFromISR xQueueSendFromISR
  * @endcond
  * \ingroup QueueManagement
@@ -1067,7 +1067,7 @@ void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * BaseType_t xQueueSendToBackFromISR(
@@ -1133,7 +1133,7 @@ void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
  * }
  * @endcode
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xQueueSendFromISR xQueueSendFromISR
  * @endcond
  * \ingroup QueueManagement
@@ -1142,7 +1142,7 @@ void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
     xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * BaseType_t xQueueOverwriteFromISR(
@@ -1225,7 +1225,7 @@ void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
  *  }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xQueueOverwriteFromISR xQueueOverwriteFromISR
  * @endcond
  * \ingroup QueueManagement
@@ -1234,7 +1234,7 @@ void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
     xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueOVERWRITE )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * BaseType_t xQueueSendFromISR(
@@ -1304,7 +1304,7 @@ void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
  * }
  * @endcode
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xQueueSendFromISR xQueueSendFromISR
  * @endcond
  * \ingroup QueueManagement
@@ -1312,10 +1312,10 @@ void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 #define xQueueSendFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) \
     xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
 
-/** @cond */
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
 /**@{*/
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * BaseType_t xQueueGenericSendFromISR(
@@ -1402,7 +1402,7 @@ BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue,
 /** @endcond */
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * queue. h
  * @code{c}
  * BaseType_t xQueueReceiveFromISR(
@@ -1487,7 +1487,7 @@ BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue,
  *  }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR
  * @endcond
  * \ingroup QueueManagement
@@ -1504,7 +1504,7 @@ BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FU
 BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
 
-/** @cond */
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
 /*
  * The functions defined above are for passing data to and from tasks.  The
  * functions below are the equivalents for passing data to and from
@@ -1778,7 +1778,7 @@ QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet,
  */
 QueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
 
-/** @cond */
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
 
 /* Not public API functions. */
 void vQueueWaitForMessageRestricted( QueueHandle_t xQueue,

components/freertos/include/freertos/semphr.h

@@ -39,7 +39,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
 #define semSEMAPHORE_QUEUE_ITEM_LENGTH      ( ( uint8_t ) 0U )
 #define semGIVE_BLOCK_TIME                  ( ( TickType_t ) 0U )
 
-/** @cond */
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
 /**
  * semphr. h
  * @code{c}
@@ -88,7 +88,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
  *  }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary
  * @endcond
  * \ingroup Semaphores
@@ -106,7 +106,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
 /** @endcond */
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * semphr. h
  * @code{c}
  * SemaphoreHandle_t xSemaphoreCreateBinary( void );
@@ -163,7 +163,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
  *  }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xSemaphoreCreateBinary xSemaphoreCreateBinary
  * @endcond
  * \ingroup Semaphores
@@ -173,7 +173,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
 #endif
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * semphr. h
  * @code{c}
  * SemaphoreHandle_t xSemaphoreCreateBinaryStatic( StaticSemaphore_t *pxSemaphoreBuffer );
@@ -229,7 +229,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
  *  // Rest of task code goes here.
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xSemaphoreCreateBinaryStatic xSemaphoreCreateBinaryStatic
  * @endcond
  * \ingroup Semaphores
@@ -239,7 +239,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
 #endif /* configSUPPORT_STATIC_ALLOCATION */
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * semphr. h
  * @code{c}
  * xSemaphoreTake(
@@ -304,7 +304,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
  *  }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xSemaphoreTake xSemaphoreTake
  * @endcond
  * \ingroup Semaphores
@@ -312,7 +312,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
 #define xSemaphoreTake( xSemaphore, xBlockTime )    xQueueSemaphoreTake( ( xSemaphore ), ( xBlockTime ) )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * semphr. h
  * @code{c}
  * xSemaphoreTakeRecursive(
@@ -403,7 +403,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
  *  }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xSemaphoreTakeRecursive xSemaphoreTakeRecursive
  * @endcond
  * \ingroup Semaphores
@@ -465,7 +465,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
  *  }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xSemaphoreGive xSemaphoreGive
  * @endcond
  * \ingroup Semaphores
@@ -473,7 +473,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
 #define xSemaphoreGive( xSemaphore )    xQueueGenericSend( ( QueueHandle_t ) ( xSemaphore ), NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * semphr. h
  * @code{c}
  * xSemaphoreGiveRecursive( SemaphoreHandle_t xMutex );
@@ -555,7 +555,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
  *  }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xSemaphoreGiveRecursive xSemaphoreGiveRecursive
  * @endcond
  * \ingroup Semaphores
@@ -641,7 +641,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
  *  }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR
  * @endcond
  * \ingroup Semaphores
@@ -649,7 +649,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
 #define xSemaphoreGiveFromISR( xSemaphore, pxHigherPriorityTaskWoken )    xQueueGiveFromISR( ( QueueHandle_t ) ( xSemaphore ), ( pxHigherPriorityTaskWoken ) )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * semphr. h
  * @code{c}
  * xSemaphoreTakeFromISR(
@@ -686,7 +686,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
 #define xSemaphoreTakeFromISR( xSemaphore, pxHigherPriorityTaskWoken )    xQueueReceiveFromISR( ( QueueHandle_t ) ( xSemaphore ), NULL, ( pxHigherPriorityTaskWoken ) )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * semphr. h
  * @code{c}
  * SemaphoreHandle_t xSemaphoreCreateMutex( void );
@@ -741,7 +741,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
  *  }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xSemaphoreCreateMutex xSemaphoreCreateMutex
  * @endcond
  * \ingroup Semaphores
@@ -751,7 +751,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
 #endif
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * semphr. h
  * @code{c}
  * SemaphoreHandle_t xSemaphoreCreateMutexStatic( StaticSemaphore_t *pxMutexBuffer );
@@ -808,7 +808,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
  *  // so there is no need to check it.
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xSemaphoreCreateMutexStatic xSemaphoreCreateMutexStatic
  * @endcond
  * \ingroup Semaphores
@@ -951,7 +951,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
 #endif /* configSUPPORT_STATIC_ALLOCATION */
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * semphr. h
  * @code{c}
  * SemaphoreHandle_t xSemaphoreCreateCounting( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount );
@@ -1027,7 +1027,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
  *  }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xSemaphoreCreateCounting xSemaphoreCreateCounting
  * @endcond
  * \ingroup Semaphores
@@ -1037,7 +1037,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
 #endif
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * semphr. h
  * @code{c}
  * SemaphoreHandle_t xSemaphoreCreateCountingStatic( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount, StaticSemaphore_t *pxSemaphoreBuffer );
@@ -1118,7 +1118,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
  *  // is no need to check its value.
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xSemaphoreCreateCountingStatic xSemaphoreCreateCountingStatic
  * @endcond
  * \ingroup Semaphores
@@ -1128,7 +1128,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
 #endif /* configSUPPORT_STATIC_ALLOCATION */
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * semphr. h
  * @code{c}
  * void vSemaphoreDelete( SemaphoreHandle_t xSemaphore );
@@ -1140,7 +1140,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
  *
  * @param xSemaphore A handle to the semaphore to be deleted.
  *
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * \defgroup vSemaphoreDelete vSemaphoreDelete
  * @endcond
  * \ingroup Semaphores
@@ -1148,7 +1148,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
 #define vSemaphoreDelete( xSemaphore )                   vQueueDelete( ( QueueHandle_t ) ( xSemaphore ) )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * semphr.h
  * @code{c}
  * TaskHandle_t xSemaphoreGetMutexHolder( SemaphoreHandle_t xMutex );
@@ -1167,7 +1167,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
 #define xSemaphoreGetMutexHolder( xSemaphore )           xQueueGetMutexHolder( ( xSemaphore ) )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * semphr.h
  * @code{c}
  * TaskHandle_t xSemaphoreGetMutexHolderFromISR( SemaphoreHandle_t xMutex );
@@ -1182,7 +1182,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
 #define xSemaphoreGetMutexHolderFromISR( xSemaphore )    xQueueGetMutexHolderFromISR( ( xSemaphore ) )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * semphr.h
  * @code{c}
  * UBaseType_t uxSemaphoreGetCount( SemaphoreHandle_t xSemaphore );

components/freertos/include/freertos/stream_buffer.h

@@ -71,7 +71,7 @@ typedef struct StreamBufferDef_t * StreamBufferHandle_t;
 
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * message_buffer.h
  *
  * @code{c}
@@ -134,7 +134,7 @@ typedef struct StreamBufferDef_t * StreamBufferHandle_t;
  *  }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xStreamBufferCreate xStreamBufferCreate
  * @endcond
  * \ingroup StreamBufferManagement
@@ -142,7 +142,7 @@ typedef struct StreamBufferDef_t * StreamBufferHandle_t;
 #define xStreamBufferCreate( xBufferSizeBytes, xTriggerLevelBytes )    xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * stream_buffer.h
  *
  * @code{c}
@@ -220,7 +220,7 @@ typedef struct StreamBufferDef_t * StreamBufferHandle_t;
  * }
  *
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xStreamBufferCreateStatic xStreamBufferCreateStatic
  * @endcond
  * \ingroup StreamBufferManagement
@@ -229,7 +229,7 @@ typedef struct StreamBufferDef_t * StreamBufferHandle_t;
     xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE, pucStreamBufferStorageArea, pxStaticStreamBuffer )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * stream_buffer.h
  *
  * @code{c}
@@ -319,7 +319,7 @@ typedef struct StreamBufferDef_t * StreamBufferHandle_t;
  *  }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xStreamBufferSend xStreamBufferSend
  * @endcond
  * \ingroup StreamBufferManagement
@@ -330,7 +330,7 @@ size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
                           TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * stream_buffer.h
  *
  * @code{c}
@@ -424,7 +424,7 @@ size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
  *  taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xStreamBufferSendFromISR xStreamBufferSendFromISR
  * @endcond
  * \ingroup StreamBufferManagement
@@ -435,7 +435,7 @@ size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
                                  BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * stream_buffer.h
  *
  * @code{c}
@@ -517,7 +517,7 @@ size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
  *  }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xStreamBufferReceive xStreamBufferReceive
  * @endcond
  * \ingroup StreamBufferManagement
@@ -528,7 +528,7 @@ size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
                              TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * stream_buffer.h
  *
  * @code{c}
@@ -607,7 +607,7 @@ size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
  *  taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xStreamBufferReceiveFromISR xStreamBufferReceiveFromISR
  * @endcond
  * \ingroup StreamBufferManagement
@@ -618,7 +618,7 @@ size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
                                     BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * stream_buffer.h
  *
  * @code{c}
@@ -636,7 +636,7 @@ size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
  *
  * @param xStreamBuffer The handle of the stream buffer to be deleted.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup vStreamBufferDelete vStreamBufferDelete
  * @endcond
  * \ingroup StreamBufferManagement
@@ -644,7 +644,7 @@ size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
 void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * stream_buffer.h
  *
  * @code{c}
@@ -660,7 +660,7 @@ void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTI
  * @return If the stream buffer is full then pdTRUE is returned.  Otherwise
  * pdFALSE is returned.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xStreamBufferIsFull xStreamBufferIsFull
  * @endcond
  * \ingroup StreamBufferManagement
@@ -668,7 +668,7 @@ void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTI
 BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * stream_buffer.h
  *
  * @code{c}
@@ -684,7 +684,7 @@ BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_
  * @return If the stream buffer is empty then pdTRUE is returned.  Otherwise
  * pdFALSE is returned.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xStreamBufferIsEmpty xStreamBufferIsEmpty
  * @endcond
  * \ingroup StreamBufferManagement
@@ -692,7 +692,7 @@ BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_
 BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * stream_buffer.h
  *
  * @code{c}
@@ -711,7 +711,7 @@ BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED
  * a task blocked waiting to send to or read from the stream buffer then the
  * stream buffer is not reset and pdFAIL is returned.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xStreamBufferReset xStreamBufferReset
  * @endcond
  * \ingroup StreamBufferManagement
@@ -719,7 +719,7 @@ BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED
 BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * stream_buffer.h
  *
  * @code{c}
@@ -736,7 +736,7 @@ BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_F
  * @return The number of bytes that can be written to the stream buffer before
  * the stream buffer would be full.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xStreamBufferSpacesAvailable xStreamBufferSpacesAvailable
  * @endcond
  * \ingroup StreamBufferManagement
@@ -744,7 +744,7 @@ BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_F
 size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * stream_buffer.h
  *
  * @code{c}
@@ -761,7 +761,7 @@ size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVIL
  * @return The number of bytes that can be read from the stream buffer before
  * the stream buffer would be empty.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xStreamBufferBytesAvailable xStreamBufferBytesAvailable
  * @endcond
  * \ingroup StreamBufferManagement
@@ -769,7 +769,7 @@ size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVIL
 size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * stream_buffer.h
  *
  * @code{c}
@@ -802,7 +802,7 @@ size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILE
  * then the trigger level will be updated and pdTRUE is returned.  Otherwise
  * pdFALSE is returned.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xStreamBufferSetTriggerLevel xStreamBufferSetTriggerLevel
  * @endcond
  * \ingroup StreamBufferManagement
@@ -811,7 +811,7 @@ BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
                                          size_t xTriggerLevel ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * stream_buffer.h
  *
  * @code{c}
@@ -846,7 +846,7 @@ BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
  * @return If a task was removed from the Blocked state then pdTRUE is returned.
  * Otherwise pdFALSE is returned.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xStreamBufferSendCompletedFromISR xStreamBufferSendCompletedFromISR
  * @endcond
  * \ingroup StreamBufferManagement
@@ -855,7 +855,7 @@ BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer
                                               BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * stream_buffer.h
  *
  * @code{c}
@@ -891,7 +891,7 @@ BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer
  * @return If a task was removed from the Blocked state then pdTRUE is returned.
  * Otherwise pdFALSE is returned.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xStreamBufferReceiveCompletedFromISR xStreamBufferReceiveCompletedFromISR
  * @endcond
  * \ingroup StreamBufferManagement
@@ -899,7 +899,7 @@ BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer
 BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
                                                  BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
-/** @cond */
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
 /* Functions below here are not part of the public API. */
 StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes,
                                                  size_t xTriggerLevelBytes,

components/freertos/include/freertos/task.h

@@ -76,7 +76,7 @@
  * returns (via a pointer parameter) an TaskHandle_t variable that can then
  * be used as a parameter to vTaskDelete to delete the task.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup TaskHandle_t TaskHandle_t
  * @endcond
  * \ingroup Tasks
@@ -114,7 +114,7 @@ typedef enum
     eSetValueWithoutOverwrite     /* Set the task's notification value if the previous value has been read by the task. */
 } eNotifyAction;
 
-/** @cond */
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
 /**
  * Used internally only.
  */
@@ -189,11 +189,13 @@ typedef enum
 #define tskIDLE_PRIORITY    ( ( UBaseType_t ) 0U )
 
 /**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
+ * @endcond
  *
  * Macro for forcing a context switch.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup taskYIELD taskYIELD
  * @endcond
  * \ingroup SchedulerControl
@@ -201,7 +203,9 @@ typedef enum
 #define taskYIELD()                        portYIELD()
 
 /**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
+ * @endcond
  *
  * Macro to mark the start of a critical code region.  Preemptive context
  * switches cannot occur when in a critical region.
@@ -209,7 +213,7 @@ typedef enum
  * @note This may alter the stack (depending on the portable implementation)
  * so must be used with care!
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup taskENTER_CRITICAL taskENTER_CRITICAL
  * @endcond
  * \ingroup SchedulerControl
@@ -228,7 +232,9 @@ typedef enum
 #endif //  ESP_PLATFORM
 
 /**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
+ * @endcond
  *
  * Macro to mark the end of a critical code region.  Preemptive context
  * switches cannot occur when in a critical region.
@@ -236,7 +242,7 @@ typedef enum
  * @note This may alter the stack (depending on the portable implementation)
  * so must be used with care!
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup taskEXIT_CRITICAL taskEXIT_CRITICAL
  * @endcond
  * \ingroup SchedulerControl
@@ -255,11 +261,13 @@ typedef enum
 #define taskEXIT_CRITICAL_ISR( )        portEXIT_CRITICAL_ISR( )
 #endif // ESP_PLATFORM
 /**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
+ * @endcond
  *
  * Macro to disable all maskable interrupts.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS
  * @endcond
  * \ingroup SchedulerControl
@@ -267,11 +275,13 @@ typedef enum
 #define taskDISABLE_INTERRUPTS()           portDISABLE_INTERRUPTS()
 
 /**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
+ * @endcond
  *
  * Macro to enable microcontroller interrupts.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS
  * @endcond
  * \ingroup SchedulerControl
@@ -422,7 +432,7 @@ typedef enum
  *   }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xTaskCreate xTaskCreate
  * @endcond
  * \ingroup Tasks
@@ -430,14 +440,14 @@ typedef enum
 #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
 
     static inline IRAM_ATTR BaseType_t xTaskCreate(
-            TaskFunction_t pvTaskCode,
-            const char * const pcName,
-            const uint32_t usStackDepth,
-            void * const pvParameters,
-            UBaseType_t uxPriority,
-            TaskHandle_t * const pvCreatedTask)
+                            TaskFunction_t pvTaskCode,
+                            const char * const pcName,     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                            const uint32_t usStackDepth,
+                            void * const pvParameters,
+                            UBaseType_t uxPriority,
+                            TaskHandle_t * const pxCreatedTask) PRIVILEGED_FUNCTION
     {
-        return xTaskCreatePinnedToCore( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pvCreatedTask, tskNO_AFFINITY );
+        return xTaskCreatePinnedToCore( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, tskNO_AFFINITY );
     }
 
 #endif
@@ -599,20 +609,20 @@ typedef enum
 
 #if( configSUPPORT_STATIC_ALLOCATION == 1 )
     static inline IRAM_ATTR TaskHandle_t xTaskCreateStatic(
-            TaskFunction_t pvTaskCode,
-            const char * const pcName,
-            const uint32_t ulStackDepth,
-            void * const pvParameters,
-            UBaseType_t uxPriority,
-            StackType_t * const pxStackBuffer,
-            StaticTask_t * const pxTaskBuffer)
+                                    TaskFunction_t pvTaskCode,
+                                    const char * const pcName,     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                                    const uint32_t ulStackDepth,
+                                    void * const pvParameters,
+                                    UBaseType_t uxPriority,
+                                    StackType_t * const puxStackBuffer,
+                                    StaticTask_t * const pxTaskBuffer) PRIVILEGED_FUNCTION
     {
-        return xTaskCreateStaticPinnedToCore( pvTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, pxStackBuffer, pxTaskBuffer, tskNO_AFFINITY );
+        return xTaskCreateStaticPinnedToCore( pvTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, puxStackBuffer, pxTaskBuffer, tskNO_AFFINITY );
     }
 #endif /* configSUPPORT_STATIC_ALLOCATION */
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * BaseType_t xTaskCreateRestricted( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );
@@ -683,18 +693,18 @@ typedef enum
  *  for( ;; );
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xTaskCreateRestricted xTaskCreateRestricted
  * @endcond
  * \ingroup Tasks
  */
 #if ( portUSING_MPU_WRAPPERS == 1 )
     BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition,
-                                      TaskHandle_t * pxCreatedTask );
+                                      TaskHandle_t * pxCreatedTask ) PRIVILEGED_FUNCTION;
 #endif
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * BaseType_t xTaskCreateRestrictedStatic( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );
@@ -777,7 +787,7 @@ typedef enum
  *  for( ;; );
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xTaskCreateRestrictedStatic xTaskCreateRestrictedStatic
  * @endcond
  * \ingroup Tasks
@@ -788,7 +798,7 @@ typedef enum
 #endif
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * void vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions );
@@ -833,7 +843,7 @@ typedef enum
  *  // defined or shared regions have been declared elsewhere).
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xTaskCreateRestricted xTaskCreateRestricted
  * @endcond
  * \ingroup Tasks
@@ -842,7 +852,7 @@ void vTaskAllocateMPURegions( TaskHandle_t xTask,
                               const MemoryRegion_t * const pxRegions ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * void vTaskDelete( TaskHandle_t xTask );
@@ -881,7 +891,7 @@ void vTaskAllocateMPURegions( TaskHandle_t xTask,
  *   vTaskDelete( xHandle );
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup vTaskDelete vTaskDelete
  * @endcond
  * \ingroup Tasks
@@ -893,10 +903,12 @@ void vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION;
  *----------------------------------------------------------*/
 
 /**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * void vTaskDelay( const TickType_t xTicksToDelay );
  * @endcode
+ * @endcond
  *
  * Delay a task for a given number of ticks.  The actual time that the
  * task remains blocked depends on the tick rate.  The constant
@@ -938,7 +950,7 @@ void vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION;
  * }
  * @endcode
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup vTaskDelay vTaskDelay
  * @endcond
  * \ingroup TaskCtrl
@@ -946,10 +958,12 @@ void vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION;
 void vTaskDelay( const TickType_t xTicksToDelay ) PRIVILEGED_FUNCTION;
 
 /**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * BaseType_t xTaskDelayUntil( TickType_t *pxPreviousWakeTime, const TickType_t xTimeIncrement );
  * @endcode
+ * @endcond
  *
  * INCLUDE_xTaskDelayUntil must be defined as 1 for this function to be available.
  * See the configuration section for more information.
@@ -1007,7 +1021,7 @@ void vTaskDelay( const TickType_t xTicksToDelay ) PRIVILEGED_FUNCTION;
  *     }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xTaskDelayUntil xTaskDelayUntil
  * @endcond
  * \ingroup TaskCtrl
@@ -1026,7 +1040,7 @@ BaseType_t xTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
 
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * BaseType_t xTaskAbortDelay( TaskHandle_t xTask );
@@ -1054,7 +1068,7 @@ BaseType_t xTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
  * @return If the task referenced by xTask was not in the Blocked state then
  * pdFAIL is returned.  Otherwise pdPASS is returned.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xTaskAbortDelay xTaskAbortDelay
  * @endcond
  * \ingroup TaskCtrl
@@ -1062,7 +1076,7 @@ BaseType_t xTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
 BaseType_t xTaskAbortDelay( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask );
@@ -1107,7 +1121,7 @@ BaseType_t xTaskAbortDelay( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
  *   }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup uxTaskPriorityGet uxTaskPriorityGet
  * @endcond
  * \ingroup TaskCtrl
@@ -1115,7 +1129,7 @@ BaseType_t xTaskAbortDelay( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask );
@@ -1127,7 +1141,7 @@ UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * eTaskState eTaskGetState( TaskHandle_t xTask );
@@ -1149,7 +1163,7 @@ UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask ) PRIVILEGED_FUNC
 eTaskState eTaskGetState( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState );
@@ -1203,7 +1217,7 @@ eTaskState eTaskGetState( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
  *                eInvalid ); // Include the task state in xTaskDetails.
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup vTaskGetInfo vTaskGetInfo
  * @endcond
  * \ingroup TaskCtrl
@@ -1214,7 +1228,7 @@ void vTaskGetInfo( TaskHandle_t xTask,
                    eTaskState eState ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority );
@@ -1254,7 +1268,7 @@ void vTaskGetInfo( TaskHandle_t xTask,
  *   vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 );
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup vTaskPrioritySet vTaskPrioritySet
  * @endcond
  * \ingroup TaskCtrl
@@ -1263,7 +1277,7 @@ void vTaskPrioritySet( TaskHandle_t xTask,
                        UBaseType_t uxNewPriority ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * void vTaskSuspend( TaskHandle_t xTaskToSuspend );
@@ -1312,7 +1326,7 @@ void vTaskPrioritySet( TaskHandle_t xTask,
  *   // with our handle as the parameter.
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup vTaskSuspend vTaskSuspend
  * @endcond
  * \ingroup TaskCtrl
@@ -1320,7 +1334,7 @@ void vTaskPrioritySet( TaskHandle_t xTask,
 void vTaskSuspend( TaskHandle_t xTaskToSuspend ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * void vTaskResume( TaskHandle_t xTaskToResume );
@@ -1367,7 +1381,7 @@ void vTaskSuspend( TaskHandle_t xTaskToSuspend ) PRIVILEGED_FUNCTION;
  *   // time in accordance with its priority within the system.
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup vTaskResume vTaskResume
  * @endcond
  * \ingroup TaskCtrl
@@ -1375,7 +1389,7 @@ void vTaskSuspend( TaskHandle_t xTaskToSuspend ) PRIVILEGED_FUNCTION;
 void vTaskResume( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * void xTaskResumeFromISR( TaskHandle_t xTaskToResume );
@@ -1402,7 +1416,7 @@ void vTaskResume( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;
  * otherwise pdFALSE. This is used by the ISR to determine if a context switch
  * may be required following the ISR.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup vTaskResumeFromISR vTaskResumeFromISR
  * @endcond
  * \ingroup TaskCtrl
@@ -1412,9 +1426,9 @@ BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;
 /*-----------------------------------------------------------
  * SCHEDULER CONTROL
  *----------------------------------------------------------*/
-/** @cond */
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * void vTaskStartScheduler( void );
@@ -1445,7 +1459,7 @@ BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;
  * }
  * @endcode
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup vTaskStartScheduler vTaskStartScheduler
  * @endcond
  * \ingroup SchedulerControl
@@ -1453,7 +1467,7 @@ BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;
 void vTaskStartScheduler( void ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * void vTaskEndScheduler( void );
@@ -1507,7 +1521,7 @@ void vTaskStartScheduler( void ) PRIVILEGED_FUNCTION;
  * }
  * @endcode
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup vTaskEndScheduler vTaskEndScheduler
  * @endcond
  * \ingroup SchedulerControl
@@ -1517,7 +1531,7 @@ void vTaskEndScheduler( void ) PRIVILEGED_FUNCTION;
 /** @endcond */
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * void vTaskSuspendAll( void );
@@ -1566,7 +1580,7 @@ void vTaskEndScheduler( void ) PRIVILEGED_FUNCTION;
  *   }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup vTaskSuspendAll vTaskSuspendAll
  * @endcond
  * \ingroup SchedulerControl
@@ -1574,7 +1588,7 @@ void vTaskEndScheduler( void ) PRIVILEGED_FUNCTION;
 void vTaskSuspendAll( void ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * BaseType_t xTaskResumeAll( void );
@@ -1626,7 +1640,7 @@ void vTaskSuspendAll( void ) PRIVILEGED_FUNCTION;
  *   }
  * }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xTaskResumeAll xTaskResumeAll
  * @endcond
  * \ingroup SchedulerControl
@@ -1638,7 +1652,7 @@ BaseType_t xTaskResumeAll( void ) PRIVILEGED_FUNCTION;
  *----------------------------------------------------------*/
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * TickType_t xTaskGetTickCount( void );
@@ -1647,7 +1661,7 @@ BaseType_t xTaskResumeAll( void ) PRIVILEGED_FUNCTION;
  *
  * @return The count of ticks since vTaskStartScheduler was called.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xTaskGetTickCount xTaskGetTickCount
  * @endcond
  * \ingroup TaskUtils
@@ -1655,7 +1669,7 @@ BaseType_t xTaskResumeAll( void ) PRIVILEGED_FUNCTION;
 TickType_t xTaskGetTickCount( void ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * TickType_t xTaskGetTickCountFromISR( void );
@@ -1669,7 +1683,7 @@ TickType_t xTaskGetTickCount( void ) PRIVILEGED_FUNCTION;
  * microcontroller being used or interrupt nesting is either not supported or
  * not being used.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xTaskGetTickCountFromISR xTaskGetTickCountFromISR
  * @endcond
  * \ingroup TaskUtils
@@ -1677,7 +1691,7 @@ TickType_t xTaskGetTickCount( void ) PRIVILEGED_FUNCTION;
 TickType_t xTaskGetTickCountFromISR( void ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * uint16_t uxTaskGetNumberOfTasks( void );
@@ -1689,7 +1703,7 @@ TickType_t xTaskGetTickCountFromISR( void ) PRIVILEGED_FUNCTION;
  * has been deleted but not yet freed by the idle task will also be
  * included in the count.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks
  * @endcond
  * \ingroup TaskUtils
@@ -1697,7 +1711,7 @@ TickType_t xTaskGetTickCountFromISR( void ) PRIVILEGED_FUNCTION;
 UBaseType_t uxTaskGetNumberOfTasks( void ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * char *pcTaskGetName( TaskHandle_t xTaskToQuery );
@@ -1708,7 +1722,7 @@ UBaseType_t uxTaskGetNumberOfTasks( void ) PRIVILEGED_FUNCTION;
  * xTaskToQuery.  A task can query its own name by either passing in its own
  * handle, or by setting xTaskToQuery to NULL.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup pcTaskGetName pcTaskGetName
  * @endcond
  * \ingroup TaskUtils
@@ -1716,7 +1730,7 @@ UBaseType_t uxTaskGetNumberOfTasks( void ) PRIVILEGED_FUNCTION;
 char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * TaskHandle_t xTaskGetHandle( const char *pcNameToQuery );
@@ -1730,7 +1744,7 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;     /*lin
  * NULL is returned if no matching name is found.  INCLUDE_xTaskGetHandle
  * must be set to 1 in FreeRTOSConfig.h for pcTaskGetHandle() to be available.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup pcTaskGetHandle pcTaskGetHandle
  * @endcond
  * \ingroup TaskUtils
@@ -1813,7 +1827,7 @@ uint8_t* pxTaskGetStackStart( TaskHandle_t xTask) PRIVILEGED_FUNCTION;
 #ifdef configUSE_APPLICATION_TASK_TAG
     #if configUSE_APPLICATION_TASK_TAG == 1
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task.h
  * @code{c}
  * void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction );
@@ -1830,7 +1844,7 @@ uint8_t* pxTaskGetStackStart( TaskHandle_t xTask) PRIVILEGED_FUNCTION;
                                          TaskHookFunction_t pxHookFunction ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task.h
  * @code{c}
  * void xTaskGetApplicationTaskTag( TaskHandle_t xTask );
@@ -1844,7 +1858,7 @@ uint8_t* pxTaskGetStackStart( TaskHandle_t xTask) PRIVILEGED_FUNCTION;
         TaskHookFunction_t xTaskGetApplicationTaskTag( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task.h
  * @code{c}
  * void xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask );
@@ -1932,7 +1946,7 @@ uint8_t* pxTaskGetStackStart( TaskHandle_t xTask) PRIVILEGED_FUNCTION;
 #if ( configCHECK_FOR_STACK_OVERFLOW > 0 )
 
      /**
-      * @cond
+      * @cond !DOC_EXCLUDE_HEADER_SECTION
       * task.h
       * @code{c}
       * void vApplicationStackOverflowHook( TaskHandle_t xTask char *pcTaskName);
@@ -1952,7 +1966,7 @@ uint8_t* pxTaskGetStackStart( TaskHandle_t xTask) PRIVILEGED_FUNCTION;
 
 #if  (  configUSE_TICK_HOOK > 0 )
     /**
-     * @cond
+     * @cond !DOC_EXCLUDE_HEADER_SECTION
      *  task.h
      * @code{c}
      * void vApplicationTickHook( void );
@@ -1967,7 +1981,7 @@ uint8_t* pxTaskGetStackStart( TaskHandle_t xTask) PRIVILEGED_FUNCTION;
 
 #if ( configSUPPORT_STATIC_ALLOCATION == 1 )
     /**
-     * @cond
+     * @cond !DOC_EXCLUDE_HEADER_SECTION
      * task.h
      * @code{c}
      * void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer, StackType_t ** ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize )
@@ -1986,7 +2000,7 @@ uint8_t* pxTaskGetStackStart( TaskHandle_t xTask) PRIVILEGED_FUNCTION;
 #endif
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task.h
  * @code{c}
  * BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter );
@@ -2155,7 +2169,7 @@ UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray,
  * enough to contain the generated report.  Approximately 40 bytes per
  * task should be sufficient.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup vTaskList vTaskList
  * @endcond
  * \ingroup TaskUtils
@@ -2210,7 +2224,7 @@ void vTaskList( char * pcWriteBuffer ) PRIVILEGED_FUNCTION;     /*lint !e971 Unq
  * contain the generated report.  Approximately 40 bytes per task should
  * be sufficient.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup vTaskGetRunTimeStats vTaskGetRunTimeStats
  * @endcond
  * \ingroup TaskUtils
@@ -2218,7 +2232,7 @@ void vTaskList( char * pcWriteBuffer ) PRIVILEGED_FUNCTION;     /*lint !e971 Unq
 void vTaskGetRunTimeStats( char * pcWriteBuffer ) PRIVILEGED_FUNCTION;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code
  * uint32_t ulTaskGetIdleRunTimeCounter( void );
@@ -2246,7 +2260,7 @@ void vTaskGetRunTimeStats( char * pcWriteBuffer ) PRIVILEGED_FUNCTION;     /*lin
  * frequency configured using the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and
  * portGET_RUN_TIME_COUNTER_VALUE() macros.
  *
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup ulTaskGetIdleRunTimeCounter ulTaskGetIdleRunTimeCounter
  * @endcond
  * \ingroup TaskUtils
@@ -2254,11 +2268,13 @@ void vTaskGetRunTimeStats( char * pcWriteBuffer ) PRIVILEGED_FUNCTION;     /*lin
 uint32_t ulTaskGetIdleRunTimeCounter( void ) PRIVILEGED_FUNCTION;
 
 /**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * BaseType_t xTaskNotifyIndexed( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction );
  * BaseType_t xTaskNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction );
  * @endcode
+ * @endcond
  *
  * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
  *
@@ -2359,7 +2375,9 @@ uint32_t ulTaskGetIdleRunTimeCounter( void ) PRIVILEGED_FUNCTION;
  * @return Dependent on the value of eAction.  See the description of the
  * eAction parameter.
  *
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xTaskNotifyIndexed xTaskNotifyIndexed
+ * @endcond
  * \ingroup TaskNotifications
  */
 BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify,
@@ -2373,11 +2391,13 @@ BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify,
     xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), NULL )
 
 /**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * BaseType_t xTaskNotifyAndQueryIndexed( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotifyValue );
  * BaseType_t xTaskNotifyAndQuery( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotifyValue );
  * @endcode
+ * @endcond
  *
  * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
  *
@@ -2393,7 +2413,9 @@ BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify,
  * than when the function returns) in the additional pulPreviousNotifyValue
  * parameter.
  *
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xTaskNotifyAndQueryIndexed xTaskNotifyAndQueryIndexed
+ * @endcond
  * \ingroup TaskNotifications
  */
 #define xTaskNotifyAndQuery( xTaskToNotify, ulValue, eAction, pulPreviousNotifyValue ) \
@@ -2402,11 +2424,13 @@ BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify,
     xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) )
 
 /**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * BaseType_t xTaskNotifyIndexedFromISR( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction, BaseType_t *pxHigherPriorityTaskWoken );
  * BaseType_t xTaskNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, BaseType_t *pxHigherPriorityTaskWoken );
  * @endcode
+ * @endcond
  *
  * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
  *
@@ -2511,7 +2535,9 @@ BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify,
  * @return Dependent on the value of eAction.  See the description of the
  * eAction parameter.
  *
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xTaskNotifyIndexedFromISR xTaskNotifyIndexedFromISR
+ * @endcond
  * \ingroup TaskNotifications
  */
 BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify,
@@ -2526,11 +2552,13 @@ BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify,
     xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) )
 
 /**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * BaseType_t xTaskNotifyAndQueryIndexedFromISR( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken );
  * BaseType_t xTaskNotifyAndQueryFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken );
  * @endcode
+ * @endcond
  *
  * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
  *
@@ -2546,7 +2574,9 @@ BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify,
  * function is called rather than at the time the function returns) in the
  * additional pulPreviousNotifyValue parameter.
  *
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xTaskNotifyAndQueryIndexedFromISR xTaskNotifyAndQueryIndexedFromISR
+ * @endcond
  * \ingroup TaskNotifications
  */
 #define xTaskNotifyAndQueryIndexedFromISR( xTaskToNotify, uxIndexToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken ) \
@@ -2555,12 +2585,14 @@ BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify,
     xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( tskDEFAULT_INDEX_TO_NOTIFY ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) )
 
 /**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * BaseType_t xTaskNotifyWaitIndexed( UBaseType_t uxIndexToWaitOn, uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait );
  *
  * BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait );
  * @endcode
+ * @endcond
  *
  * Waits for a direct to task notification to be pending at a given index within
  * an array of direct to task notifications.
@@ -2655,7 +2687,9 @@ BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify,
  * already pending when xTaskNotifyWait was called) then pdPASS is
  * returned.  Otherwise pdFAIL is returned.
  *
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xTaskNotifyWaitIndexed xTaskNotifyWaitIndexed
+ * @endcond
  * \ingroup TaskNotifications
  */
 BaseType_t xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn,
@@ -2669,11 +2703,13 @@ BaseType_t xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn,
     xTaskGenericNotifyWait( ( uxIndexToWaitOn ), ( ulBitsToClearOnEntry ), ( ulBitsToClearOnExit ), ( pulNotificationValue ), ( xTicksToWait ) )
 
 /**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * BaseType_t xTaskNotifyGiveIndexed( TaskHandle_t xTaskToNotify, UBaseType_t uxIndexToNotify );
  * BaseType_t xTaskNotifyGive( TaskHandle_t xTaskToNotify );
  * @endcode
+ * @endcond
  *
  * Sends a direct to task notification to a particular index in the target
  * task's notification array in a manner similar to giving a counting semaphore.
@@ -2737,7 +2773,9 @@ BaseType_t xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn,
  * @return xTaskNotifyGive() is a macro that calls xTaskNotify() with the
  * eAction parameter set to eIncrement - so pdPASS is always returned.
  *
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xTaskNotifyGiveIndexed xTaskNotifyGiveIndexed
+ * @endcond
  * \ingroup TaskNotifications
  */
 #define xTaskNotifyGive( xTaskToNotify ) \
@@ -2746,11 +2784,13 @@ BaseType_t xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn,
     xTaskGenericNotify( ( xTaskToNotify ), ( uxIndexToNotify ), ( 0 ), eIncrement, NULL )
 
 /**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * void vTaskNotifyGiveIndexedFromISR( TaskHandle_t xTaskHandle, UBaseType_t uxIndexToNotify, BaseType_t *pxHigherPriorityTaskWoken );
  * void vTaskNotifyGiveFromISR( TaskHandle_t xTaskHandle, BaseType_t *pxHigherPriorityTaskWoken );
  * @endcode
+ * @endcond
  *
  * A version of xTaskNotifyGiveIndexed() that can be called from an interrupt
  * service routine (ISR).
@@ -2821,7 +2861,9 @@ BaseType_t xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn,
  * requested from an ISR is dependent on the port - see the documentation page
  * for the port in use.
  *
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup vTaskNotifyGiveIndexedFromISR vTaskNotifyGiveIndexedFromISR
+ * @endcond
  * \ingroup TaskNotifications
  */
 void vTaskGenericNotifyGiveFromISR( TaskHandle_t xTaskToNotify,
@@ -2833,12 +2875,14 @@ void vTaskGenericNotifyGiveFromISR( TaskHandle_t xTaskToNotify,
     vTaskGenericNotifyGiveFromISR( ( xTaskToNotify ), ( uxIndexToNotify ), ( pxHigherPriorityTaskWoken ) );
 
 /**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * uint32_t ulTaskNotifyTakeIndexed( UBaseType_t uxIndexToWaitOn, BaseType_t xClearCountOnExit, TickType_t xTicksToWait );
  *
  * uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait );
  * @endcode
+ * @endcond
  *
  * Waits for a direct to task notification on a particular index in the calling
  * task's notification array in a manner similar to taking a counting semaphore.
@@ -2927,7 +2971,9 @@ void vTaskGenericNotifyGiveFromISR( TaskHandle_t xTaskToNotify,
  * @return The task's notification count before it is either cleared to zero or
  * decremented (see the xClearCountOnExit parameter).
  *
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup ulTaskNotifyTakeIndexed ulTaskNotifyTakeIndexed
+ * @endcond
  * \ingroup TaskNotifications
  */
 uint32_t ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn,
@@ -2939,12 +2985,14 @@ uint32_t ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn,
     ulTaskGenericNotifyTake( ( uxIndexToWaitOn ), ( xClearCountOnExit ), ( xTicksToWait ) )
 
 /**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * BaseType_t xTaskNotifyStateClearIndexed( TaskHandle_t xTask, UBaseType_t uxIndexToCLear );
  *
  * BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask );
  * @endcode
+ * @endcond
  *
  * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
  *
@@ -2992,7 +3040,9 @@ uint32_t ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn,
  * @return pdTRUE if the task's notification state was set to
  * eNotWaitingNotification, otherwise pdFALSE.
  *
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xTaskNotifyStateClearIndexed xTaskNotifyStateClearIndexed
+ * @endcond
  * \ingroup TaskNotifications
  */
 BaseType_t xTaskGenericNotifyStateClear( TaskHandle_t xTask,
@@ -3003,12 +3053,14 @@ BaseType_t xTaskGenericNotifyStateClear( TaskHandle_t xTask,
     xTaskGenericNotifyStateClear( ( xTask ), ( uxIndexToClear ) )
 
 /**
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task. h
  * @code{c}
  * uint32_t ulTaskNotifyValueClearIndexed( TaskHandle_t xTask, UBaseType_t uxIndexToClear, uint32_t ulBitsToClear );
  *
  * uint32_t ulTaskNotifyValueClear( TaskHandle_t xTask, uint32_t ulBitsToClear );
  * @endcode
+ * @endcond
  *
  * See https://www.FreeRTOS.org/RTOS-task-notifications.html for details.
  *
@@ -3057,7 +3109,9 @@ BaseType_t xTaskGenericNotifyStateClear( TaskHandle_t xTask,
  *
  * @return The value of the target task's notification value before the bits
  * specified by ulBitsToClear were cleared.
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup ulTaskNotifyValueClear ulTaskNotifyValueClear
+ * @endcond
  * \ingroup TaskNotifications
  */
 uint32_t ulTaskGenericNotifyValueClear( TaskHandle_t xTask,
@@ -3069,7 +3123,7 @@ uint32_t ulTaskGenericNotifyValueClear( TaskHandle_t xTask,
     ulTaskGenericNotifyValueClear( ( xTask ), ( uxIndexToClear ), ( ulBitsToClear ) )
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task.h
  * @code{c}
  * void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut );
@@ -3082,14 +3136,14 @@ uint32_t ulTaskGenericNotifyValueClear( TaskHandle_t xTask,
  * is to be captured.  The captured time includes the tick count and the number
  * of times the tick count has overflowed since the system first booted.
  * \defgroup vTaskSetTimeOutState vTaskSetTimeOutState
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \ingroup TaskCtrl
  * @endcond
  */
 void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task.h
  * @code
  * BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait );
@@ -3170,7 +3224,7 @@ void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;
  *      return uxReceived;
  *  }
  * @endcode
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \defgroup xTaskCheckForTimeOut xTaskCheckForTimeOut
  * @endcond
  * \ingroup TaskCtrl
@@ -3179,7 +3233,7 @@ BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut,
                                  TickType_t * const pxTicksToWait ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * task.h
  * @code{c}
  * BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp );
@@ -3204,7 +3258,7 @@ BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut,
  * blocked state and a context switch being performed.  Otherwise pdFALSE.
  *
  * \defgroup xTaskCatchUpTicks xTaskCatchUpTicks
- * @cond
+ * @cond !DOC_SINGLE_GROUP
  * \ingroup TaskCtrl
  * @endcond
  */
@@ -3214,7 +3268,7 @@ BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) PRIVILEGED_FUNCTION;
 /*-----------------------------------------------------------
  * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES
  *----------------------------------------------------------*/
-/** @cond */
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
 /*
  * Return the handle of the task running on a certain CPU. Because of
  * the nature of SMP processing, there is no guarantee that this
@@ -3335,8 +3389,8 @@ void vTaskPlaceOnEventListRestricted( List_t * const pxEventList,
  * making the call, otherwise pdFALSE.
  */
 BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList ) PRIVILEGED_FUNCTION;
-BaseType_t xTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem,
-                                              const TickType_t xItemValue ) PRIVILEGED_FUNCTION;
+void vTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem,
+                                        const TickType_t xItemValue ) PRIVILEGED_FUNCTION;
 
 /*
  * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS ONLY
@@ -3399,11 +3453,6 @@ void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder,
  */
 UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
 
-/*
- * Get the current core affinity of a task
- */
-BaseType_t xTaskGetAffinity( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
-
 /*
  * Set the uxTaskNumber of the task referenced by the xTask parameter to
  * uxHandle.

components/freertos/include/freertos/timers.h

@@ -450,7 +450,7 @@ void vTimerSetTimerID( TimerHandle_t xTimer,
 BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
 
 /**
- * @cond
+ * @cond !DOC_EXCLUDE_HEADER_SECTION
  * TaskHandle_t xTimerGetTimerDaemonTaskHandle( void );
  * @endcond
  *
@@ -1315,7 +1315,7 @@ TickType_t xTimerGetPeriod( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
  */
 TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
 
-/** @cond */
+/** @cond !DOC_EXCLUDE_HEADER_SECTION */
 
 /*
  * Functions beyond this part are not part of the public API and are intended
@@ -1339,7 +1339,7 @@ BaseType_t xTimerGenericCommand( TimerHandle_t xTimer,
 #if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
     /**
-     * @cond
+     * @cond !DOC_EXCLUDE_HEADER_SECTION
      * task.h
      * @code{c}
      * void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer, StackType_t ** ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize )

components/freertos/linker.lf

@@ -26,7 +26,7 @@ entries:
         tasks: vTaskSuspendAll (default)
         tasks: uxTaskGetNumberOfTasks (default)
         tasks: xTaskGetIdleTaskHandle (default)
-        tasks: xTaskRemoveFromUnorderedEventList (default)
+        tasks: vTaskRemoveFromUnorderedEventList (default)
         tasks: uxTaskPriorityGet (default)
         tasks: vTaskPrioritySet (default)
         tasks: vTaskSetThreadLocalStoragePointerAndDelCallback (default)

components/freertos/port/port_common.c

@@ -1,16 +1,8 @@
-// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #include <string.h>
 #include "FreeRTOS.h"
@@ -22,8 +14,9 @@
 #include "esp_task_wdt.h"
 #include "esp_task.h"
 #include "esp_private/crosscore_int.h"
-#include "esp_private/startup_internal.h"
+#include "esp_private/startup_internal.h"    /* Required by g_spiram_ok. [refactor-todo] for g_spiram_ok */
 #include "esp_log.h"
+#include "soc/soc_memory_types.h"
 #include "soc/dport_access.h"
 #include "sdkconfig.h"
 
@@ -56,7 +49,7 @@ volatile unsigned port_xSchedulerRunning[portNUM_PROCESSORS] = {0};
 //
 // And since this should be true, we can just check for CONFIG_FREERTOS_UNICORE.
 #if CONFIG_FREERTOS_UNICORE != CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
-	#error "FreeRTOS and system configuration mismatch regarding the use of multiple cores."
+    #error "FreeRTOS and system configuration mismatch regarding the use of multiple cores."
 #endif
 
 static void main_task(void* args);
@@ -70,69 +63,85 @@ extern void app_main(void);
 void esp_startup_start_app_common(void)
 {
 #if CONFIG_ESP_INT_WDT
-	esp_int_wdt_init();
-	//Initialize the interrupt watch dog for CPU0.
-	esp_int_wdt_cpu_init();
+    esp_int_wdt_init();
+    //Initialize the interrupt watch dog for CPU0.
+    esp_int_wdt_cpu_init();
 #endif
 
-	esp_crosscore_int_init();
+    esp_crosscore_int_init();
 
 #ifdef CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME
     esp_gdbstub_init();
 #endif // CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME
 
-	portBASE_TYPE res = xTaskCreatePinnedToCore(&main_task, "main",
-												ESP_TASK_MAIN_STACK, NULL,
-												ESP_TASK_MAIN_PRIO, NULL, ESP_TASK_MAIN_CORE);
-	assert(res == pdTRUE);
-	(void)res;
+    portBASE_TYPE res = xTaskCreatePinnedToCore(&main_task, "main",
+                                                ESP_TASK_MAIN_STACK, NULL,
+                                                ESP_TASK_MAIN_PRIO, NULL, ESP_TASK_MAIN_CORE);
+    assert(res == pdTRUE);
+    (void)res;
 }
 
 static void main_task(void* args)
 {
 #if !CONFIG_FREERTOS_UNICORE
-	// Wait for FreeRTOS initialization to finish on APP CPU, before replacing its startup stack
-	while (port_xSchedulerRunning[1] == 0) {
-		;
-	}
+    // Wait for FreeRTOS initialization to finish on APP CPU, before replacing its startup stack
+    while (port_xSchedulerRunning[1] == 0) {
+        ;
+    }
 #endif
 
-	// [refactor-todo] check if there is a way to move the following block to esp_system startup
-	heap_caps_enable_nonos_stack_heaps();
+    // [refactor-todo] check if there is a way to move the following block to esp_system startup
+    heap_caps_enable_nonos_stack_heaps();
 
-	// Now we have startup stack RAM available for heap, enable any DMA pool memory
+    // Now we have startup stack RAM available for heap, enable any DMA pool memory
 #if CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL
-	if (g_spiram_ok) {
-		esp_err_t r = esp_spiram_reserve_dma_pool(CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL);
-		if (r != ESP_OK) {
-			ESP_EARLY_LOGE(TAG, "Could not reserve internal/DMA pool (error 0x%x)", r);
-			abort();
-		}
-	}
+    if (g_spiram_ok) {
+        esp_err_t r = esp_spiram_reserve_dma_pool(CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL);
+        if (r != ESP_OK) {
+            ESP_EARLY_LOGE(TAG, "Could not reserve internal/DMA pool (error 0x%x)", r);
+            abort();
+        }
+    }
 #endif
 
-	//Initialize task wdt if configured to do so
+    //Initialize task wdt if configured to do so
 #ifdef CONFIG_ESP_TASK_WDT_PANIC
-	ESP_ERROR_CHECK(esp_task_wdt_init(CONFIG_ESP_TASK_WDT_TIMEOUT_S, true));
+    ESP_ERROR_CHECK(esp_task_wdt_init(CONFIG_ESP_TASK_WDT_TIMEOUT_S, true));
 #elif CONFIG_ESP_TASK_WDT
-	ESP_ERROR_CHECK(esp_task_wdt_init(CONFIG_ESP_TASK_WDT_TIMEOUT_S, false));
+    ESP_ERROR_CHECK(esp_task_wdt_init(CONFIG_ESP_TASK_WDT_TIMEOUT_S, false));
 #endif
 
-	//Add IDLE 0 to task wdt
+    //Add IDLE 0 to task wdt
 #ifdef CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0
-	TaskHandle_t idle_0 = xTaskGetIdleTaskHandleForCPU(0);
-	if(idle_0 != NULL){
-		ESP_ERROR_CHECK(esp_task_wdt_add(idle_0));
-	}
+    TaskHandle_t idle_0 = xTaskGetIdleTaskHandleForCPU(0);
+    if(idle_0 != NULL){
+        ESP_ERROR_CHECK(esp_task_wdt_add(idle_0));
+    }
 #endif
-	//Add IDLE 1 to task wdt
+    //Add IDLE 1 to task wdt
 #ifdef CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1
-	TaskHandle_t idle_1 = xTaskGetIdleTaskHandleForCPU(1);
-	if(idle_1 != NULL){
-		ESP_ERROR_CHECK(esp_task_wdt_add(idle_1));
-	}
+    TaskHandle_t idle_1 = xTaskGetIdleTaskHandleForCPU(1);
+    if(idle_1 != NULL){
+        ESP_ERROR_CHECK(esp_task_wdt_add(idle_1));
+    }
 #endif
 
-	app_main();
-	vTaskDelete(NULL);
+    app_main();
+    vTaskDelete(NULL);
+}
+
+// -------------------- Heap Related -----------------------
+
+bool xPortCheckValidTCBMem(const void *ptr)
+{
+    return esp_ptr_internal(ptr) && esp_ptr_byte_accessible(ptr);
+}
+
+bool xPortcheckValidStackMem(const void *ptr)
+{
+#ifdef CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
+    return esp_ptr_byte_accessible(ptr);
+#else
+    return esp_ptr_internal(ptr) && esp_ptr_byte_accessible(ptr);
+#endif
 }

components/freertos/port/riscv/include/freertos/portmacro.h

@@ -24,89 +24,465 @@
  *
  * 1 tab == 4 spaces!
  */
+
 #ifndef PORTMACRO_H
 #define PORTMACRO_H
 
+#ifndef __ASSEMBLER__
+
+#include "sdkconfig.h"
+#include <stdint.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include "soc/spinlock.h"
+#include "soc/interrupt_core0_reg.h"
+#include "soc/cpu.h"
+#include "esp_attr.h"
+#include "esp_rom_sys.h"
+#include "esp_timer.h"              /* required for FreeRTOS run time stats */
+#include "esp_heap_caps.h"
+#include "esp_system.h"             /* required by esp_get_...() functions in portable.h. [refactor-todo] Update portable.h */
+#include "esp_newlib.h"
+#include "portbenchmark.h"
+
+/* [refactor-todo] These includes are not directly used in this file. They are kept into to prevent a breaking change. Remove these. */
+#include <limits.h>
+#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
+#include "soc/soc_memory_layout.h"
+#endif
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#ifndef __ASSEMBLER__
 
-#include <stdint.h>
-#include <stdlib.h>
-#include <stdbool.h>
-#include <stdio.h>
-#include <limits.h>
-#include "esp_timer.h"              /* required for FreeRTOS run time stats */
 
-#include "sdkconfig.h"
-#include "esp_attr.h"
-#include "esp_heap_caps.h"
-#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
-#include "soc/soc_memory_layout.h"
-#endif
-#include "soc/spinlock.h"
-#include "soc/interrupt_core0_reg.h"
-#include "esp_rom_sys.h"
-#include "soc/cpu.h"
-#include "esp_system.h"
-#include "esp_newlib.h"
+/* --------------------------------------------------- Port Types ------------------------------------------------------
+ * - Port specific types.
+ * - The settings in this file configure FreeRTOS correctly for the given hardware and compiler.
+ * - These settings should not be altered.
+ * - The port types must come first as they are used further down in this file
+ * ------------------------------------------------------------------------------------------------------------------ */
 
-/*-----------------------------------------------------------
- * Port specific definitions.
- *
- * The settings in this file configure FreeRTOS correctly for the
- * given hardware and compiler.
- *
- * These settings should not be altered.
- *-----------------------------------------------------------
- */
+#define portCHAR                    uint8_t
+#define portFLOAT                   float
+#define portDOUBLE                  double
+#define portLONG                    int32_t
+#define portSHORT                   int16_t
+#define portSTACK_TYPE              uint8_t
+#define portBASE_TYPE               int
 
-/* Type definitions. */
-#define portCHAR		uint8_t
-#define portFLOAT		float
-#define portDOUBLE		double
-#define portLONG		int32_t
-#define portSHORT		int16_t
-#define portSTACK_TYPE	uint8_t
-#define portBASE_TYPE	int
-// interrupt module will mask interrupt with priority less than threshold
-#define RVHAL_EXCM_LEVEL    4
+typedef portSTACK_TYPE              StackType_t;
+typedef portBASE_TYPE               BaseType_t;
+typedef unsigned portBASE_TYPE      UBaseType_t;
 
-typedef portSTACK_TYPE			StackType_t;
-typedef portBASE_TYPE			BaseType_t;
-typedef unsigned portBASE_TYPE	UBaseType_t;
-
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffff
+#if (configUSE_16_BIT_TICKS == 1)
+typedef uint16_t TickType_t;
+#define portMAX_DELAY (TickType_t)  0xffff
 #else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+typedef uint32_t TickType_t;
+#define portMAX_DELAY (TickType_t)  0xffffffffUL
 #endif
-/*------------------------------------------------------*/
 
-/* Architecture specifics. */
-#define portSTACK_GROWTH			( -1 )
-#define portTICK_PERIOD_MS			( ( TickType_t ) (1000 / configTICK_RATE_HZ) )
-#define portBYTE_ALIGNMENT			16
-/*-----------------------------------------------------------*/
-#include "portbenchmark.h"
+/* Task function macros as described on the FreeRTOS.org WEB site. */
+#define portTASK_FUNCTION_PROTO(vFunction, pvParameters) void vFunction(void *pvParameters)
+#define portTASK_FUNCTION(vFunction, pvParameters) void vFunction(void *pvParameters)
 
-static inline BaseType_t IRAM_ATTR xPortGetCoreID(void) {
-    return cpu_hal_get_core_id();
+// interrupt module will mask interrupt with priority less than threshold
+#define RVHAL_EXCM_LEVEL            4
+
+
+/* ----------------------------------------------- Port Configurations -------------------------------------------------
+ * - Configurations values supplied by each port
+ * - Required by FreeRTOS
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+#define portCRITICAL_NESTING_IN_TCB     0
+#define portSTACK_GROWTH                (-1)
+#define portTICK_PERIOD_MS              ((TickType_t) (1000 / configTICK_RATE_HZ))
+#define portBYTE_ALIGNMENT              16
+#define portNOP() __asm volatile        (" nop ")
+
+
+
+/* ---------------------------------------------- Forward Declarations -------------------------------------------------
+ * - Forward declarations of all the port functions and macros need to implement the FreeRTOS porting interface
+ * - These must come before definition/declaration of the FreeRTOS porting interface
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+// --------------------- Interrupts ------------------------
+
+/**
+ * @brief Checks if the current core is in an ISR context
+ *
+ * - ISR context consist of Low/Mid priority ISR, or time tick ISR
+ * - High priority ISRs aren't detected here, but they normally cannot call C code, so that should not be an issue anyway.
+ *
+ * @note [refactor-todo] Check if this should be inlined
+ * @return
+ *  - pdTRUE if in ISR
+ *  - pdFALSE otherwise
+ */
+BaseType_t xPortInIsrContext(void);
+
+/**
+ * @brief Check if in ISR context from High priority ISRs
+ *
+ * - Called from High priority ISR
+ * - Checks if the previous context (before high priority interrupt) was in ISR context (meaning low/med priority)
+ *
+ * @note [refactor-todo] Check if this should be inlined
+ * @return
+ *  - pdTRUE if in previous in ISR context
+ *  - pdFALSE otherwise
+ */
+BaseType_t xPortInterruptedFromISRContext(void);
+
+/**
+ * @brief Disable interrupts in a nested manner
+ *
+ * - Cleaner solution allows nested interrupts disabling and restoring via local registers or stack.
+ * - They can be called from interrupts too.
+ * - WARNING Only applies to current CPU.
+ *
+ * @note [refactor-todo] Define this as portSET_INTERRUPT_MASK_FROM_ISR() instead
+ * @return unsigned Previous interrupt state
+ */
+static inline unsigned portENTER_CRITICAL_NESTED(void);
+
+/* ---------------------- Spinlocks ------------------------
+ - Spinlocks added to match API with SMP FreeRTOS. Single core RISC-V does not need spin locks
+ - Because single core does not have a primitive spinlock data type, we have to implement one here
+ * @note [refactor-todo] Refactor critical section API so that this is no longer required
+ * ------------------------------------------------------ */
+
+/**
+ * @brief Spinlock object
+ * Owner:
+ *  - Set to 0 if uninitialized
+ *  - Set to portMUX_FREE_VAL when free
+ *  - Set to CORE_ID_REGVAL_PRO or CORE_ID_REGVAL_AP when locked
+ *  - Any other value indicates corruption
+ * Count:
+ *  - 0 if unlocked
+ *  - Recursive count if locked
+ *
+ * @note Not a true spinlock as single core RISC-V does not have atomic compare and set instruction
+ * @note Keep portMUX_INITIALIZER_UNLOCKED in sync with this struct
+ */
+typedef struct {
+    uint32_t owner;
+    uint32_t count;
+#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
+    const char *lastLockedFn;
+    int lastLockedLine;
+#endif
+} portMUX_TYPE;
+/**< Spinlock initializer */
+#ifndef CONFIG_FREERTOS_PORTMUX_DEBUG
+#define portMUX_INITIALIZER_UNLOCKED {                  \
+            .owner = portMUX_FREE_VAL,                      \
+            .count = 0,                                     \
+        }
+#else
+#define portMUX_INITIALIZER_UNLOCKED {                  \
+            .owner = portMUX_FREE_VAL,                      \
+            .count = 0,                                     \
+            .lastLockedFn = "(never locked)",               \
+            .lastLockedLine = -1                            \
+        }
+#endif /* CONFIG_FREERTOS_PORTMUX_DEBUG */
+#define portMUX_FREE_VAL        SPINLOCK_FREE           /**< Spinlock is free. [refactor-todo] check if this is still required */
+#define portMUX_NO_TIMEOUT      SPINLOCK_WAIT_FOREVER   /**< When passed for 'timeout_cycles', spin forever if necessary. [refactor-todo] check if this is still required */
+#define portMUX_TRY_LOCK        SPINLOCK_NO_WAIT        /**< Try to acquire the spinlock a single time only. [refactor-todo] check if this is still required */
+
+/**
+ * @brief Initialize a spinlock
+ *
+ * - Initializes a spinlock that is used by FreeRTOS SMP critical sections
+ *
+ * @note [refactor-todo] We can make this inline or consider making it a macro
+ * @param[in] mux Spinlock
+ */
+void vPortCPUInitializeMutex(portMUX_TYPE *mux);
+
+/**
+ * @brief Acquire a spinlock
+ *
+ * @note [refactor-todo] check if we still need this
+ * @note [refactor-todo] Check if this should be inlined
+ * @param[in] mux Spinlock
+ */
+void vPortCPUAcquireMutex(portMUX_TYPE *mux);
+
+/**
+ * @brief Acquire a spinlock but with a specified timeout
+ *
+ * @note [refactor-todo] Check if we still need this
+ * @note [refactor-todo] Check if this should be inlined
+ * @note [refactor-todo] Check if this function should be renamed (due to bool return type)
+ * @param[in] mux Spinlock
+ * @param[in] timeout Timeout in number of CPU cycles
+ * @return true Spinlock acquired
+ * @return false Timed out
+ */
+bool vPortCPUAcquireMutexTimeout(portMUX_TYPE *mux, int timeout_cycles);
+
+/**
+ * @brief Release a spinlock
+ *
+ * @note [refactor-todo] check if we still need this
+ * @note [refactor-todo] Check if this should be inlined
+ * @param[in] mux Spinlock
+ */
+void vPortCPUReleaseMutex(portMUX_TYPE *mux);
+
+/**
+ * @brief Wrapper for atomic compare-and-set instruction
+ *
+ * @note Isn't a real atomic CAS.
+ * @note [refactor-todo] check if we still need this
+ * @note [refactor-todo] Check if this function should be renamed (due to void return type)
+ *
+ * @param[inout] addr Pointer to target address
+ * @param[in] compare Compare value
+ * @param[inout] set Pointer to set value
+ */
+static inline void __attribute__((always_inline)) uxPortCompareSet(volatile uint32_t *addr, uint32_t compare, uint32_t *set);
+
+/**
+ * @brief Wrapper for atomic compare-and-set instruction in external RAM
+ *
+ * @note Isn't a real atomic CAS.
+ * @note [refactor-todo] check if we still need this
+ * @note [refactor-todo] Check if this function should be renamed (due to void return type)
+ *
+ * @param[inout] addr Pointer to target address
+ * @param[in] compare Compare value
+ * @param[inout] set Pointer to set value
+ */
+static inline void uxPortCompareSetExtram(volatile uint32_t *addr, uint32_t compare, uint32_t *set);
+
+// ------------------ Critical Sections --------------------
+
+/**
+ * @brief Enter a critical section
+ *
+ * - Simply disable interrupts
+ * - Can be nested
+ */
+void vPortEnterCritical(void);
+
+/**
+ * @brief Exit a critical section
+ *
+ * - Reenables interrupts
+ * - Can be nested
+ */
+void vPortExitCritical(void);
+
+// ---------------------- Yielding -------------------------
+
+/**
+ * @brief Set interrupt mask and return current interrupt enable register
+ *
+ * @note [refactor-todo] Check if this function should be renamed (due to int return type)
+ * @return int Current interrupt enable register before set
+ */
+int vPortSetInterruptMask(void);
+
+/**
+ * @brief Clear current interrupt mask and set given mask
+ *
+ * @param mask Interrupt mask
+ */
+void vPortClearInterruptMask(int mask);
+
+/**
+ * @brief Perform a context switch from a task
+ *
+ * @note [refactor-todo] The rest of ESP-IDF should call taskYield() instead
+ */
+void vPortYield(void);
+
+/**
+ * @brief Perform a context switch from an ISR
+ */
+void vPortYieldFromISR(void);
+
+/**
+ * @brief Yields the other core
+ *
+ * @note Added to be compatible with SMP API
+ * @note [refactor-todo] Put this into private macros as its only called from task.c and is not public API
+ * @param coreid ID of core to yield
+ */
+void vPortYieldOtherCore(BaseType_t coreid);
+
+/**
+ * @brief Checks if the current core can yield
+ *
+ * - A core cannot yield if its in an ISR or in a critical section
+ *
+ * @note [refactor-todo] See if this can be separated from port macro
+ * @note [refactor-todo] Check if this function should be renamed (due to bool return type)
+ * @return true Core can yield
+ * @return false Core cannot yield
+ */
+static inline bool IRAM_ATTR xPortCanYield(void);
+
+// ------------------- Hook Functions ----------------------
+
+extern void esp_vApplicationIdleHook(void);
+extern void esp_vApplicationTickHook(void);
+
+/**
+ * @brief Hook function called on entry to tickless idle
+ *
+ * - Implemented in pm_impl.c
+ *
+ * @param xExpectedIdleTime Expected idle time
+ */
+void vApplicationSleep(TickType_t xExpectedIdleTime);
+
+// ----------------------- System --------------------------
+
+/**
+ * @brief Get the tick rate per second
+ *
+ * @note [refactor-todo] make this inline
+ * @note [refactor-todo] Check if this function should be renamed (due to uint return type)
+ * @return uint32_t Tick rate in Hz
+ */
+uint32_t xPortGetTickRateHz(void);
+
+/**
+ * @brief Set a watchpoint to watch the last 32 bytes of the stack
+ *
+ * Callback to set a watchpoint on the end of the stack. Called every context switch to change the stack watchpoint
+ * around.
+ *
+ * @param pxStackStart Pointer to the start of the stack
+ */
+void vPortSetStackWatchpoint(void *pxStackStart);
+
+/**
+ * @brief Get the current core's ID
+ *
+ * @note Added to be compatible with SMP API
+ * @note [refactor-todo] IDF should call a FreeRTOS like macro instead of port function directly
+ * @return BaseType_t Core ID
+ */
+static inline BaseType_t IRAM_ATTR xPortGetCoreID(void)
+{
+    return (uint32_t) cpu_hal_get_core_id();
 }
 
 
-static inline bool IRAM_ATTR xPortCanYield(void)
+
+/* ------------------------------------------- FreeRTOS Porting Interface ----------------------------------------------
+ * - Contains all the mappings of the macros required by FreeRTOS
+ * - Most come after forward declare as porting macros map to declared functions
+ * - Maps to forward declared functions
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+// ----------------------- Memory --------------------------
+
+/**
+ * @brief Task memory allocation macros
+ *
+ * @note Because the ROM routines don't necessarily handle a stack in external RAM correctly, we force the stack
+ * memory to always be internal.
+ * @note [refactor-todo] Update portable.h to match v10.4.3 to use new malloc prototypes
+ */
+#define portTcbMemoryCaps               (MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT)
+#define portStackMemoryCaps             (MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT)
+#define pvPortMallocTcbMem(size)        pvPortMalloc(size)
+#define pvPortMallocStackMem(size)      pvPortMalloc(size)
+
+// --------------------- Interrupts ------------------------
+
+#define portEXIT_CRITICAL_NESTED(state)     do { portCLEAR_INTERRUPT_MASK_FROM_ISR(state);} while(0);
+#define portDISABLE_INTERRUPTS()            portSET_INTERRUPT_MASK_FROM_ISR()
+#define portENABLE_INTERRUPTS()             portCLEAR_INTERRUPT_MASK_FROM_ISR(1)
+#define portSET_INTERRUPT_MASK_FROM_ISR()                       vPortSetInterruptMask()
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(uxSavedStatusValue) vPortClearInterruptMask(uxSavedStatusValue)
+
+// ------------------ Critical Sections --------------------
+
+#define portENTER_CRITICAL(mux)         {(void)mux;  vPortEnterCritical();}
+#define portEXIT_CRITICAL(mux)          {(void)mux;  vPortExitCritical();}
+//In single-core RISC-V, we can use the same critical section API
+#define portENTER_CRITICAL_ISR(mux)     portENTER_CRITICAL(mux)
+#define portEXIT_CRITICAL_ISR(mux)      portEXIT_CRITICAL(mux)
+/* [refactor-todo] on RISC-V, both ISR and non-ISR cases result in the same call. We can redefine this macro */
+#define portENTER_CRITICAL_SAFE(mux)    ({  \
+    if (xPortInIsrContext()) {              \
+        portENTER_CRITICAL_ISR(mux);        \
+    } else {                                \
+        portENTER_CRITICAL(mux);            \
+    }                                       \
+})
+#define portEXIT_CRITICAL_SAFE(mux)     ({  \
+    if (xPortInIsrContext()) {              \
+        portEXIT_CRITICAL_ISR(mux);         \
+    } else {                                \
+        portEXIT_CRITICAL(mux);             \
+    }                                       \
+})
+
+// ---------------------- Yielding -------------------------
+
+#define portYIELD() vPortYield()
+#define portYIELD_FROM_ISR() vPortYieldFromISR()
+#define portEND_SWITCHING_ISR(xSwitchRequired) if(xSwitchRequired) vPortYield()
+/* Yielding within an API call (when interrupts are off), means the yield should be delayed
+   until interrupts are re-enabled.
+   To do this, we use the "cross-core" interrupt as a trigger to yield on this core when interrupts are re-enabled.This
+   is the same interrupt & code path which is used to trigger a yield between CPUs, although in this case the yield is
+   happening on the same CPU.
+*/
+#define portYIELD_WITHIN_API() portYIELD()
+
+// ------------------- Hook Functions ----------------------
+
+#ifndef CONFIG_FREERTOS_LEGACY_HOOKS
+#define vApplicationIdleHook    esp_vApplicationIdleHook
+#define vApplicationTickHook    esp_vApplicationTickHook
+#endif /* !CONFIG_FREERTOS_LEGACY_HOOKS */
+#define portSUPPRESS_TICKS_AND_SLEEP(idleTime) vApplicationSleep(idleTime)
+
+// ------------------- Run Time Stats ----------------------
+
+#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
+#define portGET_RUN_TIME_COUNTER_VALUE() 0
+#ifdef CONFIG_FREERTOS_RUN_TIME_STATS_USING_ESP_TIMER
+/* Coarse resolution time (us) */
+#define portALT_GET_RUN_TIME_COUNTER_VALUE(x)    do {x = (uint32_t)esp_timer_get_time();} while(0)
+#endif
+
+
+
+/* --------------------------------------------- Inline Implementations ------------------------------------------------
+ * - Implementation of inline functions of the forward declares
+ * - Should come after forward declare and FreeRTOS Porting interface, as implementation may use both.
+ * - For implementation of non-inlined functions, see port.c, port_common.c, or other assembly files
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+// --------------------- Interrupts ------------------------
+
+static inline unsigned portENTER_CRITICAL_NESTED(void)
 {
-    uint32_t threshold = REG_READ(INTERRUPT_CORE0_CPU_INT_THRESH_REG);
-    /* when enter critical code, freertos will mask threshold to RVHAL_EXCM_LEVEL
-     * and exit critical code, will recover threshold value (1). so threshold <= 1
-     * means not in critical code
-     */
-    return (threshold <= 1);
+    unsigned state = portSET_INTERRUPT_MASK_FROM_ISR();
+    return state;
+}
+
+// ---------------------- Spinlocks ------------------------
+
+static inline void __attribute__((always_inline)) uxPortCompareSet(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
+{
+    compare_and_set_native(addr, compare, set);
 }
 
 static inline void uxPortCompareSetExtram(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
@@ -116,199 +492,56 @@ static inline void uxPortCompareSetExtram(volatile uint32_t *addr, uint32_t comp
 #endif
 }
 
-static inline void __attribute__((always_inline)) uxPortCompareSet(volatile uint32_t *addr, uint32_t compare, uint32_t *set) {
-    compare_and_set_native(addr, compare, set);
+// ---------------------- Yielding -------------------------
+
+static inline bool IRAM_ATTR xPortCanYield(void)
+{
+    uint32_t threshold = REG_READ(INTERRUPT_CORE0_CPU_INT_THRESH_REG);
+    /* when enter critical code, FreeRTOS will mask threshold to RVHAL_EXCM_LEVEL
+     * and exit critical code, will recover threshold value (1). so threshold <= 1
+     * means not in critical code
+     */
+    return (threshold <= 1);
 }
 
-#define portCRITICAL_NESTING_IN_TCB 0
 
-/*
- * Send an interrupt to another core in order to make the task running
- * on it yield for a higher-priority task.
+
+/* ------------------------------------------------------ Misc ---------------------------------------------------------
+ * - Miscellaneous porting macros
+ * - These are not port of the FreeRTOS porting interface, but are used by other FreeRTOS dependent components
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+// -------------------- Heap Related -----------------------
+
+/**
+ * @brief Checks if a given piece of memory can be used to store a task's TCB
+ *
+ * - Defined in port_common.c
+ *
+ * @param ptr Pointer to memory
+ * @return true Memory can be used to store a TCB
+ * @return false Otherwise
  */
-void vPortYieldOtherCore( BaseType_t coreid);
+bool xPortCheckValidTCBMem(const void *ptr);
 
-/*
- Callback to set a watchpoint on the end of the stack. Called every context switch to change the stack
- watchpoint around.
+/**
+ * @brief Checks if a given piece of memory can be used to store a task's stack
+ *
+ * - Defined in port_common.c
+ *
+ * @param ptr Pointer to memory
+ * @return true Memory can be used to store a task stack
+ * @return false Otherwise
  */
-void vPortSetStackWatchpoint( void* pxStackStart );
+bool xPortcheckValidStackMem(const void *ptr);
 
-/*
- * Returns true if the current core is in ISR context; low prio ISR, med prio ISR or timer tick ISR. High prio ISRs
- * aren't detected here, but they normally cannot call C code, so that should not be an issue anyway.
- */
-BaseType_t xPortInIsrContext(void);
-
-/*
- * This function will be called in High prio ISRs. Returns true if the current core was in ISR context
- * before calling into high prio ISR context.
- */
-BaseType_t xPortInterruptedFromISRContext(void);
-
-/* "mux" data structure (spinlock) */
-typedef struct {
-	/* owner field values:
-	 * 0				- Uninitialized (invalid)
-	 * portMUX_FREE_VAL - Mux is free, can be locked by either CPU
-	 * CORE_ID_REGVAL_PRO / CORE_ID_REGVAL_APP - Mux is locked to the particular core
-	 *
-	 *
-	 * Any value other than portMUX_FREE_VAL, CORE_ID_REGVAL_PRO, CORE_ID_REGVAL_APP indicates corruption
-	 */
-	uint32_t owner;
-	/* count field:
-	 * If mux is unlocked, count should be zero.
-	 * If mux is locked, count is non-zero & represents the number of recursive locks on the mux.
-	 */
-	uint32_t count;
-#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
-	const char *lastLockedFn;
-	int lastLockedLine;
-#endif
-} portMUX_TYPE;
-
-#define portMUX_FREE_VAL		SPINLOCK_FREE
-
-/* Special constants for vPortCPUAcquireMutexTimeout() */
-#define portMUX_NO_TIMEOUT      SPINLOCK_WAIT_FOREVER  /* When passed for 'timeout_cycles', spin forever if necessary */
-#define portMUX_TRY_LOCK        SPINLOCK_NO_WAIT     /* Try to acquire the spinlock a single time only */
-
-// Keep this in sync with the portMUX_TYPE struct definition please.
-#ifndef CONFIG_FREERTOS_PORTMUX_DEBUG
-#define portMUX_INITIALIZER_UNLOCKED {					\
-		.owner = portMUX_FREE_VAL,						\
-		.count = 0,										\
-	}
-#else
-#define portMUX_INITIALIZER_UNLOCKED {					\
-		.owner = portMUX_FREE_VAL,						\
-		.count = 0,										\
-		.lastLockedFn = "(never locked)",				\
-		.lastLockedLine = -1							\
-	}
-#endif
-
-/* Scheduler utilities. */
-extern void vPortYield( void );
-extern void vPortYieldFromISR( void );
-
-#define portYIELD()			    vPortYield()
-#define portYIELD_FROM_ISR()    vPortYieldFromISR()
-
-/* Yielding within an API call (when interrupts are off), means the yield should be delayed
-   until interrupts are re-enabled.
-   To do this, we use the "cross-core" interrupt as a trigger to yield on this core when interrupts are re-enabled.This
-   is the same interrupt & code path which is used to trigger a yield between CPUs, although in this case the yield is
-   happening on the same CPU.
-*/
-#define portYIELD_WITHIN_API() portYIELD()
-/*-----------------------------------------------------------*/
-
-/* Critical section management. */
-extern int vPortSetInterruptMask(void);
-extern void vPortClearInterruptMask( int );
-
-void vPortCPUInitializeMutex(portMUX_TYPE *mux);
-void vPortCPUAcquireMutex(portMUX_TYPE *mux);
-bool vPortCPUAcquireMutexTimeout(portMUX_TYPE *mux, int timeout_cycles);
-void vPortCPUReleaseMutex(portMUX_TYPE *mux);
-
-extern void vPortEnterCritical( void );
-extern void vPortExitCritical( void );
-
-#define portDISABLE_INTERRUPTS()				portSET_INTERRUPT_MASK_FROM_ISR()
-#define portENABLE_INTERRUPTS()					portCLEAR_INTERRUPT_MASK_FROM_ISR(1)
-
-#define portENTER_CRITICAL(mux)		{(void)mux;  vPortEnterCritical();}
-#define portEXIT_CRITICAL(mux)		{(void)mux;  vPortExitCritical();}
-
-#define portENTER_CRITICAL_ISR(mux)    portENTER_CRITICAL(mux)
-#define portEXIT_CRITICAL_ISR(mux)     portEXIT_CRITICAL(mux)
-
-#define portENTER_CRITICAL_SAFE(mux)  do {                                             \
-                                         if (xPortInIsrContext()) {                    \
-                                             portENTER_CRITICAL_ISR(mux);              \
-                                         } else {                                      \
-                                             portENTER_CRITICAL(mux);                  \
-                                         }                                             \
-                                      } while(0)
-
-#define portEXIT_CRITICAL_SAFE(mux)  do {                                              \
-                                         if (xPortInIsrContext()) {                    \
-                                             portEXIT_CRITICAL_ISR(mux);               \
-                                         } else {                                      \
-                                             portEXIT_CRITICAL(mux);                   \
-                                         }                                             \
-                                      } while(0)
-
-/*------------------------------------------------------------*/
-#define portSET_INTERRUPT_MASK_FROM_ISR()       vPortSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue )       vPortClearInterruptMask( uxSavedStatusValue )
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYield()
-
-// Cleaner solution allows nested interrupts disabling and restoring via local registers or stack.
-// They can be called from interrupts too.
-static inline unsigned portENTER_CRITICAL_NESTED(void) {
-    unsigned state = portSET_INTERRUPT_MASK_FROM_ISR();
-	return state;
-}
-
-#define portEXIT_CRITICAL_NESTED(state)   do { portCLEAR_INTERRUPT_MASK_FROM_ISR( state );} while(0);
-/*-----------------------------------------------------------*/
-
-//Because the ROM routines don't necessarily handle a stack in external RAM correctly, we force
-//the stack memory to always be internal.
-#define portTcbMemoryCaps (MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT)
-#define portStackMemoryCaps (MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT)
-
-#define pvPortMallocTcbMem(size) pvPortMalloc(size)
-#define pvPortMallocStackMem(size)  pvPortMalloc(size)
-
-/* Fine resolution time */
-#define portGET_RUN_TIME_COUNTER_VALUE() 0
-#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
-
-#ifdef CONFIG_FREERTOS_RUN_TIME_STATS_USING_ESP_TIMER
-/* Coarse resolution time (us) */
-#define portALT_GET_RUN_TIME_COUNTER_VALUE(x)    do {x = (uint32_t)esp_timer_get_time();} while(0)
-#endif
-
-extern void esp_vApplicationIdleHook( void );
-extern void esp_vApplicationTickHook( void );
-
-#ifndef CONFIG_FREERTOS_LEGACY_HOOKS
-#define vApplicationIdleHook    esp_vApplicationIdleHook
-#define vApplicationTickHook    esp_vApplicationTickHook
-#endif /* !CONFIG_FREERTOS_LEGACY_HOOKS */
-
-/* Task function macros as described on the FreeRTOS.org WEB site. */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
-
-void vApplicationSleep( TickType_t xExpectedIdleTime );
-#define portSUPPRESS_TICKS_AND_SLEEP( idleTime ) vApplicationSleep( idleTime )
-
-#define portNOP() __asm volatile 	( " nop " )
-
-#define portVALID_TCB_MEM(ptr) esp_ptr_byte_accessible(ptr)
-#define portVALID_STACK_MEM(ptr) esp_ptr_byte_accessible(ptr)
-
-/* Get tick rate per second */
-uint32_t xPortGetTickRateHz(void);
-
-// configASSERT_2 if requested
-#if configASSERT_2
-#include <stdio.h>
-void exit(int);
-#define configASSERT( x )   if (!(x)) { porttracePrint(-1); printf("\nAssertion failed in %s:%d\n", __FILE__, __LINE__); exit(-1); }
-#endif
-
-
-#endif //__ASSEMBLER__
+#define portVALID_TCB_MEM(ptr) xPortCheckValidTCBMem(ptr)
+#define portVALID_STACK_MEM(ptr) xPortcheckValidStackMem(ptr)
 
 #ifdef __cplusplus
 }
 #endif
 
+#endif //__ASSEMBLER__
+
 #endif /* PORTMACRO_H */

components/freertos/port/riscv/port.c

@@ -74,31 +74,35 @@
  * Implementation of functions defined in portable.h for the RISC-V port.
  *----------------------------------------------------------------------*/
 
-#include <string.h>
-#include "FreeRTOS.h"
-#include "task.h"
-#include "portmacro.h"
-
 #include "sdkconfig.h"
-
+#include <string.h>
 #include "soc/soc_caps.h"
 #include "soc/periph_defs.h"
 #include "soc/system_reg.h"
 #include "hal/systimer_hal.h"
 #include "hal/systimer_ll.h"
-
 #include "riscv/rvruntime-frames.h"
 #include "riscv/riscv_interrupts.h"
 #include "riscv/interrupt.h"
-
-#include "port_systick.h"
+#include "esp_private/crosscore_int.h"
+#include "esp_private/pm_trace.h"
+#include "esp_attr.h"
 #include "esp_system.h"
 #include "esp_intr_alloc.h"
-#include "esp_private/crosscore_int.h"
-#include "esp_attr.h"
 #include "esp_debug_helpers.h"
 #include "esp_log.h"
-#include "esp_private/pm_trace.h"
+#include "FreeRTOS.h"       /* This pulls in portmacro.h */
+#include "task.h"
+#include "portmacro.h"
+#include "port_systick.h"
+
+
+
+/* ---------------------------------------------------- Variables ------------------------------------------------------
+ *
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+static const char *TAG = "cpu_start"; // [refactor-todo]: might be appropriate to change in the future, but
 
 /**
  * @brief A variable is used to keep track of the critical section nesting.
@@ -114,33 +118,43 @@ BaseType_t xPortSwitchFlag = 0;
 __attribute__((aligned(16))) static StackType_t xIsrStack[configISR_STACK_SIZE];
 StackType_t *xIsrStackTop = &xIsrStack[0] + (configISR_STACK_SIZE & (~((portPOINTER_SIZE_TYPE)portBYTE_ALIGNMENT_MASK)));
 
-static const char *TAG = "cpu_start"; // [refactor-todo]: might be appropriate to change in the future, but
 
-static void prvTaskExitError(void);
+
+/* ------------------------------------------------ FreeRTOS Portable --------------------------------------------------
+ * - Provides implementation for functions required by FreeRTOS
+ * - Declared in portable.h
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+// ----------------- Scheduler Start/End -------------------
 
 extern void esprv_intc_int_set_threshold(int); // FIXME, this function is in ROM only
-
-void vPortEnterCritical(void)
+BaseType_t xPortStartScheduler(void)
 {
-    BaseType_t state = portENTER_CRITICAL_NESTED();
-    uxCriticalNesting++;
+    uxInterruptNesting = 0;
+    uxCriticalNesting = 0;
+    uxSchedulerRunning = 0;
 
-    if (uxCriticalNesting == 1) {
-        uxSavedInterruptState = state;
-    }
+    /* Setup the hardware to generate the tick. */
+    vPortSetupTimer();
+
+    esprv_intc_int_set_threshold(1); /* set global INTC masking level */
+    riscv_global_interrupts_enable();
+
+    vPortYield();
+
+    /*Should not get here*/
+    return pdFALSE;
 }
 
-void vPortExitCritical(void)
+void vPortEndScheduler(void)
 {
-    if (uxCriticalNesting > 0) {
-        uxCriticalNesting--;
-        if (uxCriticalNesting == 0) {
-            portEXIT_CRITICAL_NESTED(uxSavedInterruptState);
-        }
-    }
+    /* very unlikely this function will be called, so just trap here */
+    abort();
 }
 
-void prvTaskExitError(void)
+// ------------------------ Stack --------------------------
+
+static void prvTaskExitError(void)
 {
     /* A function that implements a task must not exit or attempt to return to
     its caller as there is nothing to return to.  If a task wants to exit it
@@ -153,57 +167,11 @@ void prvTaskExitError(void)
     abort();
 }
 
-/* Clear current interrupt mask and set given mask */
-void vPortClearInterruptMask(int mask)
-{
-    REG_WRITE(INTERRUPT_CORE0_CPU_INT_THRESH_REG, mask);
-    /**
-     * The delay between the moment we unmask the interrupt threshold register
-     * and the moment the potential requested interrupt is triggered is not
-     * null: up to three machine cycles/instructions can be executed.
-     *
-     * When compilation size optimization is enabled, this function and its
-     * callers returning void will have NO epilogue, thus the instruction
-     * following these calls will be executed.
-     *
-     * If the requested interrupt is a context switch to a higher priority
-     * task then the one currently running, we MUST NOT execute any instruction
-     * before the interrupt effectively happens.
-     * In order to prevent this, force this routine to have a 3-instruction
-     * delay before exiting.
-     */
-    asm volatile ( "nop" );
-    asm volatile ( "nop" );
-    asm volatile ( "nop" );
-}
-
-/* Set interrupt mask and return current interrupt enable register */
-int vPortSetInterruptMask(void)
-{
-    int ret;
-    unsigned old_mstatus = RV_CLEAR_CSR(mstatus, MSTATUS_MIE);
-    ret = REG_READ(INTERRUPT_CORE0_CPU_INT_THRESH_REG);
-    REG_WRITE(INTERRUPT_CORE0_CPU_INT_THRESH_REG, RVHAL_EXCM_LEVEL);
-    RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE);
-    /**
-     * In theory, this function should not return immediately as there is a
-     * delay between the moment we mask the interrupt threshold register and
-     * the moment a potential lower-priority interrupt is triggered (as said
-     * above), it should have a delay of 2 machine cycles/instructions.
-     *
-     * However, in practice, this function has an epilogue of one instruction,
-     * thus the instruction masking the interrupt threshold register is
-     * followed by two instructions: `ret` and `csrrs` (RV_SET_CSR).
-     * That's why we don't need any additional nop instructions here.
-     */
-    return ret;
-}
-
 StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters)
 {
     extern uint32_t __global_pointer$;
-    uint8_t* task_thread_local_start;
-    uint8_t* threadptr;
+    uint8_t *task_thread_local_start;
+    uint8_t *threadptr;
     extern char _thread_local_start, _thread_local_end, _flash_rodata_start;
 
     /* Byte pointer, so that subsequent calculations don't depend on sizeof(StackType_t). */
@@ -271,78 +239,13 @@ StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxC
     return (StackType_t *)frame;
 }
 
-BaseType_t xPortStartScheduler(void)
-{
-    uxInterruptNesting = 0;
-    uxCriticalNesting = 0;
-    uxSchedulerRunning = 0;
 
-	/* Setup the hardware to generate the tick. */
-    vPortSetupTimer();
 
-    esprv_intc_int_set_threshold(1); /* set global INTC masking level */
-    riscv_global_interrupts_enable();
+/* ---------------------------------------------- Port Implementations -------------------------------------------------
+ *
+ * ------------------------------------------------------------------------------------------------------------------ */
 
-    vPortYield();
-
-    /*Should not get here*/
-    return pdFALSE;
-}
-
-void vPortEndScheduler(void)
-{
-    /* very unlikely this function will be called, so just trap here */
-    abort();
-}
-
-void vPortYieldOtherCore(BaseType_t coreid)
-{
-    esp_crosscore_int_send_yield(coreid);
-}
-
-void vPortYieldFromISR( void )
-{
-    traceISR_EXIT_TO_SCHEDULER();
-    uxSchedulerRunning = 1;
-    xPortSwitchFlag = 1;
-}
-
-void vPortYield(void)
-{
-    if (uxInterruptNesting) {
-        vPortYieldFromISR();
-    } else {
-
-        esp_crosscore_int_send_yield(0);
-        /* There are 3-4 instructions of latency between triggering the software
-           interrupt and the CPU interrupt happening. Make sure it happened before
-           we return, otherwise vTaskDelay() may return and execute 1-2
-           instructions before the delay actually happens.
-
-           (We could use the WFI instruction here, but there is a chance that
-           the interrupt will happen while evaluating the other two conditions
-           for an instant yield, and if that happens then the WFI would be
-           waiting for the next interrupt to occur...)
-        */
-        while (uxSchedulerRunning && uxCriticalNesting == 0 && REG_READ(SYSTEM_CPU_INTR_FROM_CPU_0_REG) != 0) {}
-    }
-
-}
-
-#define STACK_WATCH_AREA_SIZE 32
-#define STACK_WATCH_POINT_NUMBER (SOC_CPU_WATCHPOINTS_NUM - 1)
-
-void vPortSetStackWatchpoint(void *pxStackStart)
-{
-    uint32_t addr = (uint32_t)pxStackStart;
-    addr = (addr + (STACK_WATCH_AREA_SIZE - 1)) & (~(STACK_WATCH_AREA_SIZE - 1));
-    esp_cpu_set_watchpoint(STACK_WATCH_POINT_NUMBER, (char *)addr, STACK_WATCH_AREA_SIZE, ESP_WATCHPOINT_STORE);
-}
-
-uint32_t xPortGetTickRateHz(void)
-{
-    return (uint32_t)configTICK_RATE_HZ;
-}
+// --------------------- Interrupts ------------------------
 
 BaseType_t xPortInIsrContext(void)
 {
@@ -355,6 +258,7 @@ BaseType_t IRAM_ATTR xPortInterruptedFromISRContext(void)
     return uxInterruptNesting;
 }
 
+// ---------------------- Spinlocks ------------------------
 
 void vPortCPUInitializeMutex(portMUX_TYPE *mux)
 {
@@ -378,6 +282,109 @@ void vPortCPUReleaseMutex(portMUX_TYPE *mux)
     (void)mux;     //TODO: IDF-2393
 }
 
+// ------------------ Critical Sections --------------------
+
+void vPortEnterCritical(void)
+{
+    BaseType_t state = portENTER_CRITICAL_NESTED();
+    uxCriticalNesting++;
+
+    if (uxCriticalNesting == 1) {
+        uxSavedInterruptState = state;
+    }
+}
+
+void vPortExitCritical(void)
+{
+    if (uxCriticalNesting > 0) {
+        uxCriticalNesting--;
+        if (uxCriticalNesting == 0) {
+            portEXIT_CRITICAL_NESTED(uxSavedInterruptState);
+        }
+    }
+}
+
+// ---------------------- Yielding -------------------------
+
+int vPortSetInterruptMask(void)
+{
+    int ret;
+    unsigned old_mstatus = RV_CLEAR_CSR(mstatus, MSTATUS_MIE);
+    ret = REG_READ(INTERRUPT_CORE0_CPU_INT_THRESH_REG);
+    REG_WRITE(INTERRUPT_CORE0_CPU_INT_THRESH_REG, RVHAL_EXCM_LEVEL);
+    RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE);
+    /**
+     * In theory, this function should not return immediately as there is a
+     * delay between the moment we mask the interrupt threshold register and
+     * the moment a potential lower-priority interrupt is triggered (as said
+     * above), it should have a delay of 2 machine cycles/instructions.
+     *
+     * However, in practice, this function has an epilogue of one instruction,
+     * thus the instruction masking the interrupt threshold register is
+     * followed by two instructions: `ret` and `csrrs` (RV_SET_CSR).
+     * That's why we don't need any additional nop instructions here.
+     */
+    return ret;
+}
+
+void vPortClearInterruptMask(int mask)
+{
+    REG_WRITE(INTERRUPT_CORE0_CPU_INT_THRESH_REG, mask);
+    /**
+     * The delay between the moment we unmask the interrupt threshold register
+     * and the moment the potential requested interrupt is triggered is not
+     * null: up to three machine cycles/instructions can be executed.
+     *
+     * When compilation size optimization is enabled, this function and its
+     * callers returning void will have NO epilogue, thus the instruction
+     * following these calls will be executed.
+     *
+     * If the requested interrupt is a context switch to a higher priority
+     * task then the one currently running, we MUST NOT execute any instruction
+     * before the interrupt effectively happens.
+     * In order to prevent this, force this routine to have a 3-instruction
+     * delay before exiting.
+     */
+    asm volatile ( "nop" );
+    asm volatile ( "nop" );
+    asm volatile ( "nop" );
+}
+
+void vPortYield(void)
+{
+    if (uxInterruptNesting) {
+        vPortYieldFromISR();
+    } else {
+
+        esp_crosscore_int_send_yield(0);
+        /* There are 3-4 instructions of latency between triggering the software
+           interrupt and the CPU interrupt happening. Make sure it happened before
+           we return, otherwise vTaskDelay() may return and execute 1-2
+           instructions before the delay actually happens.
+
+           (We could use the WFI instruction here, but there is a chance that
+           the interrupt will happen while evaluating the other two conditions
+           for an instant yield, and if that happens then the WFI would be
+           waiting for the next interrupt to occur...)
+        */
+        while (uxSchedulerRunning && uxCriticalNesting == 0 && REG_READ(SYSTEM_CPU_INTR_FROM_CPU_0_REG) != 0) {}
+    }
+}
+
+void vPortYieldFromISR( void )
+{
+    traceISR_EXIT_TO_SCHEDULER();
+    uxSchedulerRunning = 1;
+    xPortSwitchFlag = 1;
+}
+
+void vPortYieldOtherCore(BaseType_t coreid)
+{
+    esp_crosscore_int_send_yield(coreid);
+}
+
+// ------------------- Hook Functions ----------------------
+
 void __attribute__((weak)) vApplicationStackOverflowHook(TaskHandle_t xTask, char *pcTaskName)
 {
 #define ERR_STR1 "***ERROR*** A stack overflow in task "
@@ -393,6 +400,32 @@ void __attribute__((weak)) vApplicationStackOverflowHook(TaskHandle_t xTask, cha
     esp_system_abort(buf);
 }
 
+// ----------------------- System --------------------------
+
+uint32_t xPortGetTickRateHz(void)
+{
+    return (uint32_t)configTICK_RATE_HZ;
+}
+
+#define STACK_WATCH_AREA_SIZE 32
+#define STACK_WATCH_POINT_NUMBER (SOC_CPU_WATCHPOINTS_NUM - 1)
+
+void vPortSetStackWatchpoint(void *pxStackStart)
+{
+    uint32_t addr = (uint32_t)pxStackStart;
+    addr = (addr + (STACK_WATCH_AREA_SIZE - 1)) & (~(STACK_WATCH_AREA_SIZE - 1));
+    esp_cpu_set_watchpoint(STACK_WATCH_POINT_NUMBER, (char *)addr, STACK_WATCH_AREA_SIZE, ESP_WATCHPOINT_STORE);
+}
+
+
+
+/* ---------------------------------------------- Misc Implementations -------------------------------------------------
+ *
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+// --------------------- App Start-up ----------------------
+
+/* [refactor-todo]: See if we can include this through a header */
 extern void esp_startup_start_app_common(void);
 
 void esp_startup_start_app(void)

components/freertos/port/xtensa/include/freertos/portmacro_priv.h

@@ -1,78 +0,0 @@
-/*
-    FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
-    All rights reserved
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that has become a de facto standard.             *
-     *                                                                       *
-     *    Help yourself get started quickly and support the FreeRTOS         *
-     *    project by purchasing a FreeRTOS tutorial book, reference          *
-     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *
-     *                                                                       *
-     *    Thank you!                                                         *
-     *                                                                       *
-    ***************************************************************************
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
-
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available from the following
-    link: http://www.freertos.org/a00114.html
-
-    1 tab == 4 spaces!
-
-    ***************************************************************************
-     *                                                                       *
-     *    Having a problem?  Start by reading the FAQ "My application does   *
-     *    not run, what could be wrong?"                                     *
-     *                                                                       *
-     *    http://www.FreeRTOS.org/FAQHelp.html                               *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions,
-    license and Real Time Engineers Ltd. contact details.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
-    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-
-/* This header holds the macros for porting which should only be used inside FreeRTOS */
-
-#pragma once
-#include "soc/soc_memory_layout.h"
-
-//xTaskCreateStatic uses these functions to check incoming memory.
-#define portVALID_TCB_MEM(ptr) (esp_ptr_internal(ptr) && esp_ptr_byte_accessible(ptr))
-#ifdef CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
-#define portVALID_STACK_MEM(ptr) esp_ptr_byte_accessible(ptr)
-#else
-#define portVALID_STACK_MEM(ptr) (esp_ptr_internal(ptr) && esp_ptr_byte_accessible(ptr))
-#endif

components/freertos/port/xtensa/port.c

@@ -1,153 +1,124 @@
 /*
-    FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
-    All rights reserved
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ * 1 tab == 4 spaces!
+ */
 
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+/*
+ * Copyright (c) 2015-2019 Cadence Design Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
 
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
-
-	***************************************************************************
-    >>!   NOTE: The modification to the GPL is included to allow you to     !<<
-    >>!   distribute a combined work that includes FreeRTOS without being   !<<
-    >>!   obliged to provide the source code for proprietary components     !<<
-    >>!   outside of the FreeRTOS kernel.                                   !<<
-	***************************************************************************
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available on the following
-    link: http://www.freertos.org/a00114.html
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that is more than just the market leader, it     *
-     *    is the industry's de facto standard.                               *
-     *                                                                       *
-     *    Help yourself get started quickly while simultaneously helping     *
-     *    to support the FreeRTOS project by purchasing a FreeRTOS           *
-     *    tutorial book, reference manual, or both:                          *
-     *    http://www.FreeRTOS.org/Documentation                              *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
-	the FAQ page "My application does not run, what could be wrong?".  Have you
-	defined configASSERT()?
-
-	http://www.FreeRTOS.org/support - In return for receiving this top quality
-	embedded software for free we request you assist our global community by
-	participating in the support forum.
-
-	http://www.FreeRTOS.org/training - Investing in training allows your team to
-	be as productive as possible as early as possible.  Now you can receive
-	FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
-	Ltd, and the world's leading authority on the world's leading RTOS.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
-    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
-    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and commercial middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-/*******************************************************************************
-// Copyright (c) 2003-2015 Cadence Design Systems, Inc.
-//
-// Permission is hereby granted, free of charge, to any person obtaining
-// a copy of this software and associated documentation files (the
-// "Software"), to deal in the Software without restriction, including
-// without limitation the rights to use, copy, modify, merge, publish,
-// distribute, sublicense, and/or sell copies of the Software, and to
-// permit persons to whom the Software is furnished to do so, subject to
-// the following conditions:
-//
-// The above copyright notice and this permission notice shall be included
-// in all copies or substantial portions of the Software.
-//
-// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
-// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
-// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
-// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
---------------------------------------------------------------------------------
-*/
+#include "sdkconfig.h"
+#include <stdint.h>
 #include <stdlib.h>
 #include <string.h>
+#include <stdarg.h>
 #include <xtensa/config/core.h>
-
-#include "xtensa_rtos.h"
-
-#include "soc/cpu.h"
-
-#include "FreeRTOS.h"
-#include "task.h"
-
-#include "esp_debug_helpers.h"
-#include "esp_heap_caps.h"
-#include "esp_heap_caps_init.h"
-#include "esp_private/crosscore_int.h"
-
-#include "esp_intr_alloc.h"
-#include "esp_log.h"
-#include "sdkconfig.h"
-
-#include "esp_task_wdt.h"
-#include "esp_task.h"
-
+#include <xtensa/xtensa_context.h>
 #include "soc/soc_caps.h"
-#include "soc/efuse_reg.h"
-#include "soc/dport_access.h"
-#include "soc/dport_reg.h"
+#include "esp_private/crosscore_int.h"
+#include "esp_system.h"
+#include "esp_log.h"
 #include "esp_int_wdt.h"
-
-
-#include "sdkconfig.h"
-
-#if CONFIG_IDF_TARGET_ESP32
-#include "esp32/spiram.h"
-#elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/spiram.h"
-#elif CONFIG_IDF_TARGET_ESP32S3
-#include "esp32s3/spiram.h"
-#endif
-
+#include "esp_app_trace.h"    /* Required for esp_apptrace_init. [refactor-todo] */
+#include "FreeRTOS.h"        /* This pulls in portmacro.h */
+#include "task.h"            /* Required for TaskHandle_t, tskNO_AFFINITY, and vTaskStartScheduler */
 #include "port_systick.h"
-#include "esp_private/startup_internal.h" // [refactor-todo] for g_spiram_ok
-#include "esp_app_trace.h" // [refactor-todo] for esp_app_trace_init
-
-/* Defined in xtensa_context.S */
-extern void _xt_coproc_init(void);
-
-static const char* TAG = "cpu_start"; // [refactor-todo]: might be appropriate to change in the future, but
-								// for now maintain the same log output
 
 _Static_assert(tskNO_AFFINITY == CONFIG_FREERTOS_NO_AFFINITY, "incorrect tskNO_AFFINITY value");
 
-/*-----------------------------------------------------------*/
+
+/* ---------------------------------------------------- Variables ------------------------------------------------------
+ *
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+static const char *TAG = "cpu_start"; /* [refactor-todo]: might be appropriate to change in the future, but for now maintain the same log output */
 extern volatile int port_xSchedulerRunning[portNUM_PROCESSORS];
 unsigned port_interruptNesting[portNUM_PROCESSORS] = {0};  // Interrupt nesting level. Increased/decreased in portasm.c, _frxt_int_enter/_frxt_int_exit
 BaseType_t port_uxCriticalNesting[portNUM_PROCESSORS] = {0};
 BaseType_t port_uxOldInterruptState[portNUM_PROCESSORS] = {0};
-/*-----------------------------------------------------------*/
+
+
+/* ------------------------------------------------ FreeRTOS Portable --------------------------------------------------
+ * - Provides implementation for functions required by FreeRTOS
+ * - Declared in portable.h
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+// ----------------- Scheduler Start/End -------------------
+
+/* Defined in xtensa_context.S */
+extern void _xt_coproc_init(void);
+
+BaseType_t xPortStartScheduler( void )
+{
+    // Interrupts are disabled at this point and stack contains PS with enabled interrupts when task context is restored
+
+#if XCHAL_CP_NUM > 0
+    /* Initialize co-processor management for tasks. Leave CPENABLE alone. */
+    _xt_coproc_init();
+#endif
+
+    /* Setup the hardware to generate the tick. */
+    vPortSetupTimer();
+
+    port_xSchedulerRunning[xPortGetCoreID()] = 1;
+
+    // Cannot be directly called from C; never returns
+    __asm__ volatile ("call0    _frxt_dispatch\n");
+
+    /* Should not get here. */
+    return pdTRUE;
+}
+
+void vPortEndScheduler( void )
+{
+    /* It is unlikely that the Xtensa port will get stopped.  If required simply
+    disable the tick interrupt here. */
+    abort();
+}
+
+// ------------------------ Stack --------------------------
 
 // User exception dispatcher when exiting
 void _xt_user_exit(void);
@@ -156,219 +127,204 @@ void _xt_user_exit(void);
 // Wrapper to allow task functions to return (increases stack overhead by 16 bytes)
 static void vPortTaskWrapper(TaskFunction_t pxCode, void *pvParameters)
 {
-	pxCode(pvParameters);
-	//FreeRTOS tasks should not return. Log the task name and abort.
-	char * pcTaskName = pcTaskGetTaskName(NULL);
-	ESP_LOGE("FreeRTOS", "FreeRTOS Task \"%s\" should not return, Aborting now!", pcTaskName);
-	abort();
+    pxCode(pvParameters);
+    //FreeRTOS tasks should not return. Log the task name and abort.
+    char *pcTaskName = pcTaskGetTaskName(NULL);
+    ESP_LOGE("FreeRTOS", "FreeRTOS Task \"%s\" should not return, Aborting now!", pcTaskName);
+    abort();
 }
 #endif
 
-/*
- * Stack initialization
- */
 #if portUSING_MPU_WRAPPERS
 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged )
 #else
 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
 #endif
 {
-	StackType_t *sp, *tp;
-	XtExcFrame  *frame;
-	#if XCHAL_CP_NUM > 0
-	uint32_t *p;
-	#endif
-	uint32_t *threadptr;
-	void *task_thread_local_start;
-	extern int _thread_local_start, _thread_local_end, _flash_rodata_start, _flash_rodata_align;
-	// TODO: check that TLS area fits the stack
-	uint32_t thread_local_sz = (uint8_t *)&_thread_local_end - (uint8_t *)&_thread_local_start;
+    StackType_t *sp, *tp;
+    XtExcFrame  *frame;
+#if XCHAL_CP_NUM > 0
+    uint32_t *p;
+#endif
+    uint32_t *threadptr;
+    void *task_thread_local_start;
+    extern int _thread_local_start, _thread_local_end, _flash_rodata_start, _flash_rodata_align;
+    // TODO: check that TLS area fits the stack
+    uint32_t thread_local_sz = (uint8_t *)&_thread_local_end - (uint8_t *)&_thread_local_start;
 
-	thread_local_sz = ALIGNUP(0x10, thread_local_sz);
+    thread_local_sz = ALIGNUP(0x10, thread_local_sz);
 
-	/* Initialize task's stack so that we have the following structure at the top:
+    /* Initialize task's stack so that we have the following structure at the top:
 
-		----LOW ADDRESSES ----------------------------------------HIGH ADDRESSES----------
-		 task stack | interrupt stack frame | thread local vars | co-processor save area |
-		----------------------------------------------------------------------------------
-					|																	 |
-					SP 																pxTopOfStack
+        ----LOW ADDRESSES ----------------------------------------HIGH ADDRESSES----------
+         task stack | interrupt stack frame | thread local vars | co-processor save area |
+        ----------------------------------------------------------------------------------
+                    |                                                                     |
+                    SP                                                                 pxTopOfStack
 
-		All parts are aligned to 16 byte boundary. */
-	sp = (StackType_t *) (((UBaseType_t)pxTopOfStack - XT_CP_SIZE - thread_local_sz - XT_STK_FRMSZ) & ~0xf);
+        All parts are aligned to 16 byte boundary. */
+    sp = (StackType_t *) (((UBaseType_t)pxTopOfStack - XT_CP_SIZE - thread_local_sz - XT_STK_FRMSZ) & ~0xf);
 
-	/* Clear the entire frame (do not use memset() because we don't depend on C library) */
-	for (tp = sp; tp <= pxTopOfStack; ++tp)
-		*tp = 0;
+    /* Clear the entire frame (do not use memset() because we don't depend on C library) */
+    for (tp = sp; tp <= pxTopOfStack; ++tp) {
+        *tp = 0;
+    }
 
-	frame = (XtExcFrame *) sp;
+    frame = (XtExcFrame *) sp;
 
-	/* Explicitly initialize certain saved registers */
-	#if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
-	frame->pc	= (UBaseType_t) vPortTaskWrapper;	/* task wrapper						*/
-	#else
-	frame->pc   = (UBaseType_t) pxCode;				/* task entrypoint					*/
-	#endif
-	frame->a0	= 0;								/* to terminate GDB backtrace		*/
-	frame->a1	= (UBaseType_t) sp + XT_STK_FRMSZ;	/* physical top of stack frame		*/
-	frame->exit = (UBaseType_t) _xt_user_exit;		/* user exception exit dispatcher	*/
+    /* Explicitly initialize certain saved registers */
+#if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
+    frame->pc    = (UBaseType_t) vPortTaskWrapper;    /* task wrapper                        */
+#else
+    frame->pc   = (UBaseType_t) pxCode;                /* task entrypoint                    */
+#endif
+    frame->a0    = 0;                                /* to terminate GDB backtrace        */
+    frame->a1    = (UBaseType_t) sp + XT_STK_FRMSZ;    /* physical top of stack frame        */
+    frame->exit = (UBaseType_t) _xt_user_exit;        /* user exception exit dispatcher    */
 
-	/* Set initial PS to int level 0, EXCM disabled ('rfe' will enable), user mode. */
-	/* Also set entry point argument parameter. */
-	#ifdef __XTENSA_CALL0_ABI__
-		#if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
-		frame->a2 = (UBaseType_t) pxCode;
-		frame->a3 = (UBaseType_t) pvParameters;
-		#else
-		frame->a2 = (UBaseType_t) pvParameters;
-		#endif
-	frame->ps = PS_UM | PS_EXCM;
-	#else
-	/* + for windowed ABI also set WOE and CALLINC (pretend task was 'call4'd). */
-		#if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
-		frame->a6 = (UBaseType_t) pxCode;
-		frame->a7 = (UBaseType_t) pvParameters;
-		#else
-		frame->a6 = (UBaseType_t) pvParameters;
-		#endif
-	frame->ps = PS_UM | PS_EXCM | PS_WOE | PS_CALLINC(1);
-	#endif
-
-	#ifdef XT_USE_SWPRI
-	/* Set the initial virtual priority mask value to all 1's. */
-	frame->vpri = 0xFFFFFFFF;
-	#endif
-
-	/* Init threadptr register and set up TLS run-time area.
-	 * The diagram in port/riscv/port.c illustrates the calculations below.
-	 */
-	task_thread_local_start = (void *)(((uint32_t)pxTopOfStack - XT_CP_SIZE - thread_local_sz) & ~0xf);
-	memcpy(task_thread_local_start, &_thread_local_start, thread_local_sz);
-	threadptr = (uint32_t *)(sp + XT_STK_EXTRA);
-	/* Calculate THREADPTR value.
-	 * The generated code will add THREADPTR value to a constant value determined at link time,
-	 * to get the address of the TLS variable.
-	 * The constant value is calculated by the linker as follows
-	 * (search for 'tpoff' in elf32-xtensa.c in BFD):
-	 *    offset = address - tls_section_vma + align_up(TCB_SIZE, tls_section_alignment)
-	 * where TCB_SIZE is hardcoded to 8.
-	 * Note this is slightly different compared to the RISC-V port, where offset = address - tls_section_vma.
-	 */
-	const uint32_t tls_section_alignment = (uint32_t) &_flash_rodata_align;  /* ALIGN value of .flash.rodata section */
-	const uint32_t tcb_size = 8; /* Unrelated to FreeRTOS, this is the constant from BFD */
-	const uint32_t base = (tcb_size + tls_section_alignment - 1) & (~(tls_section_alignment - 1));
-	*threadptr = (uint32_t)task_thread_local_start - ((uint32_t)&_thread_local_start - (uint32_t)&_flash_rodata_start) - base;
-
-	#if XCHAL_CP_NUM > 0
-	/* Init the coprocessor save area (see xtensa_context.h) */
-	/* No access to TCB here, so derive indirectly. Stack growth is top to bottom.
-	 * //p = (uint32_t *) xMPUSettings->coproc_area;
-	 */
-	p = (uint32_t *)(((uint32_t) pxTopOfStack - XT_CP_SIZE) & ~0xf);
-	configASSERT( ( uint32_t ) p >= frame->a1 );
-	p[0] = 0;
-	p[1] = 0;
-	p[2] = (((uint32_t) p) + 12 + XCHAL_TOTAL_SA_ALIGN - 1) & -XCHAL_TOTAL_SA_ALIGN;
-	#endif
-
-	return sp;
-}
-
-/*-----------------------------------------------------------*/
-
-void vPortEndScheduler( void )
-{
-	/* It is unlikely that the Xtensa port will get stopped.  If required simply
-	disable the tick interrupt here. */
-	abort();
-}
-
-/*-----------------------------------------------------------*/
-
-BaseType_t xPortStartScheduler( void )
-{
-	// Interrupts are disabled at this point and stack contains PS with enabled interrupts when task context is restored
-
-	#if XCHAL_CP_NUM > 0
-	/* Initialize co-processor management for tasks. Leave CPENABLE alone. */
-	_xt_coproc_init();
-	#endif
-
-	/* Setup the hardware to generate the tick. */
-	vPortSetupTimer();
-
-	port_xSchedulerRunning[xPortGetCoreID()] = 1;
-
-	// Cannot be directly called from C; never returns
-	__asm__ volatile ("call0    _frxt_dispatch\n");
-
-	/* Should not get here. */
-	return pdTRUE;
-}
-/*-----------------------------------------------------------*/
-
-void vPortYieldOtherCore( BaseType_t coreid ) {
-	esp_crosscore_int_send_yield( coreid );
-}
-
-/*-----------------------------------------------------------*/
-
-/*
- * Used to set coprocessor area in stack. Current hack is to reuse MPU pointer for coprocessor area.
- */
-#if portUSING_MPU_WRAPPERS
-void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t usStackDepth )
-{
-	#if XCHAL_CP_NUM > 0
-	xMPUSettings->coproc_area = ( StackType_t * ) ( ( uint32_t ) ( pxBottomOfStack + usStackDepth - 1 ));
-	xMPUSettings->coproc_area = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) xMPUSettings->coproc_area ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) );
-	xMPUSettings->coproc_area = ( StackType_t * ) ( ( ( uint32_t ) xMPUSettings->coproc_area - XT_CP_SIZE ) & ~0xf );
-
-
-	/* NOTE: we cannot initialize the coprocessor save area here because FreeRTOS is going to
-         * clear the stack area after we return. This is done in pxPortInitialiseStack().
-	 */
-	#endif
-}
-
-void vPortReleaseTaskMPUSettings( xMPU_SETTINGS *xMPUSettings )
-{
-	/* If task has live floating point registers somewhere, release them */
-	_xt_coproc_release( xMPUSettings->coproc_area );
-}
+    /* Set initial PS to int level 0, EXCM disabled ('rfe' will enable), user mode. */
+    /* Also set entry point argument parameter. */
+#ifdef __XTENSA_CALL0_ABI__
+#if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
+    frame->a2 = (UBaseType_t) pxCode;
+    frame->a3 = (UBaseType_t) pvParameters;
+#else
+    frame->a2 = (UBaseType_t) pvParameters;
+#endif
+    frame->ps = PS_UM | PS_EXCM;
+#else /* __XTENSA_CALL0_ABI__ */
+    /* + for windowed ABI also set WOE and CALLINC (pretend task was 'call4'd). */
+#if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
+    frame->a6 = (UBaseType_t) pxCode;
+    frame->a7 = (UBaseType_t) pvParameters;
+#else
+    frame->a6 = (UBaseType_t) pvParameters;
+#endif
+    frame->ps = PS_UM | PS_EXCM | PS_WOE | PS_CALLINC(1);
+#endif /* __XTENSA_CALL0_ABI__ */
 
+#ifdef XT_USE_SWPRI
+    /* Set the initial virtual priority mask value to all 1's. */
+    frame->vpri = 0xFFFFFFFF;
 #endif
 
-/*
- * Returns true if the current core is in ISR context; low prio ISR, med prio ISR or timer tick ISR. High prio ISRs
- * aren't detected here, but they normally cannot call C code, so that should not be an issue anyway.
- */
-BaseType_t xPortInIsrContext(void)
-{
-	unsigned int irqStatus;
-	BaseType_t ret;
-	irqStatus=portENTER_CRITICAL_NESTED();
-	ret=(port_interruptNesting[xPortGetCoreID()] != 0);
-	portEXIT_CRITICAL_NESTED(irqStatus);
-	return ret;
+    /* Init threadptr register and set up TLS run-time area.
+     * The diagram in port/riscv/port.c illustrates the calculations below.
+     */
+    task_thread_local_start = (void *)(((uint32_t)pxTopOfStack - XT_CP_SIZE - thread_local_sz) & ~0xf);
+    memcpy(task_thread_local_start, &_thread_local_start, thread_local_sz);
+    threadptr = (uint32_t *)(sp + XT_STK_EXTRA);
+    /* Calculate THREADPTR value.
+     * The generated code will add THREADPTR value to a constant value determined at link time,
+     * to get the address of the TLS variable.
+     * The constant value is calculated by the linker as follows
+     * (search for 'tpoff' in elf32-xtensa.c in BFD):
+     *    offset = address - tls_section_vma + align_up(TCB_SIZE, tls_section_alignment)
+     * where TCB_SIZE is hardcoded to 8.
+     * Note this is slightly different compared to the RISC-V port, where offset = address - tls_section_vma.
+     */
+    const uint32_t tls_section_alignment = (uint32_t) &_flash_rodata_align;  /* ALIGN value of .flash.rodata section */
+    const uint32_t tcb_size = 8; /* Unrelated to FreeRTOS, this is the constant from BFD */
+    const uint32_t base = (tcb_size + tls_section_alignment - 1) & (~(tls_section_alignment - 1));
+    *threadptr = (uint32_t)task_thread_local_start - ((uint32_t)&_thread_local_start - (uint32_t)&_flash_rodata_start) - base;
+
+#if XCHAL_CP_NUM > 0
+    /* Init the coprocessor save area (see xtensa_context.h) */
+    /* No access to TCB here, so derive indirectly. Stack growth is top to bottom.
+     * //p = (uint32_t *) xMPUSettings->coproc_area;
+     */
+    p = (uint32_t *)(((uint32_t) pxTopOfStack - XT_CP_SIZE) & ~0xf);
+    configASSERT( ( uint32_t ) p >= frame->a1 );
+    p[0] = 0;
+    p[1] = 0;
+    p[2] = (((uint32_t) p) + 12 + XCHAL_TOTAL_SA_ALIGN - 1) & -XCHAL_TOTAL_SA_ALIGN;
+#endif /* XCHAL_CP_NUM */
+
+    return sp;
+}
+
+
+
+/* ---------------------------------------------- Port Implementations -------------------------------------------------
+ *
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+// --------------------- Interrupts ------------------------
+
+BaseType_t xPortInIsrContext(void)
+{
+    unsigned int irqStatus;
+    BaseType_t ret;
+    irqStatus = portENTER_CRITICAL_NESTED();
+    ret = (port_interruptNesting[xPortGetCoreID()] != 0);
+    portEXIT_CRITICAL_NESTED(irqStatus);
+    return ret;
+}
+
+void vPortAssertIfInISR(void)
+{
+    configASSERT(xPortInIsrContext());
 }
 
-/*
- * This function will be called in High prio ISRs. Returns true if the current core was in ISR context
- * before calling into high prio ISR context.
- */
 BaseType_t IRAM_ATTR xPortInterruptedFromISRContext(void)
 {
-	return (port_interruptNesting[xPortGetCoreID()] != 0);
+    return (port_interruptNesting[xPortGetCoreID()] != 0);
 }
 
+// ------------------ Critical Sections --------------------
+
+void __attribute__((optimize("-O3"))) vPortEnterCritical(portMUX_TYPE *mux)
+{
+    BaseType_t oldInterruptLevel = portENTER_CRITICAL_NESTED();
+    /* Interrupts may already be disabled (because we're doing this recursively)
+    * but we can't get the interrupt level after
+    * vPortCPUAquireMutex, because it also may mess with interrupts.
+    * Get it here first, then later figure out if we're nesting
+    * and save for real there.
+    */
+    vPortCPUAcquireMutex( mux );
+    BaseType_t coreID = xPortGetCoreID();
+    BaseType_t newNesting = port_uxCriticalNesting[coreID] + 1;
+    port_uxCriticalNesting[coreID] = newNesting;
+
+    if ( newNesting == 1 ) {
+        //This is the first time we get called. Save original interrupt level.
+        port_uxOldInterruptState[coreID] = oldInterruptLevel;
+    }
+}
+
+void __attribute__((optimize("-O3"))) vPortExitCritical(portMUX_TYPE *mux)
+{
+    vPortCPUReleaseMutex( mux );
+    BaseType_t coreID = xPortGetCoreID();
+    BaseType_t nesting = port_uxCriticalNesting[coreID];
+
+    if (nesting > 0) {
+        nesting--;
+        port_uxCriticalNesting[coreID] = nesting;
+
+        if ( nesting == 0 ) {
+            portEXIT_CRITICAL_NESTED(port_uxOldInterruptState[coreID]);
+        }
+    }
+}
+
+// ---------------------- Yielding -------------------------
+
+void vPortYieldOtherCore( BaseType_t coreid )
+{
+    esp_crosscore_int_send_yield( coreid );
+}
+
+extern void _frxt_setup_switch( void );     //Defined in portasm.S
+
 void IRAM_ATTR vPortEvaluateYieldFromISR(int argc, ...)
 {
     BaseType_t xYield;
     va_list ap;
     va_start(ap, argc);
 
-    if(argc) {
+    if (argc) {
         xYield = (BaseType_t)va_arg(ap, int);
         va_end(ap);
     } else {
@@ -380,119 +336,115 @@ void IRAM_ATTR vPortEvaluateYieldFromISR(int argc, ...)
     }
 
     //Yield exists, so need evaluate it first then switch:
-    if(xYield == pdTRUE) {
+    if (xYield == pdTRUE) {
         traceISR_EXIT_TO_SCHEDULER();
         _frxt_setup_switch();
     }
 }
 
-void vPortAssertIfInISR(void)
+// ------------------- Hook Functions ----------------------
+
+void  __attribute__((weak)) vApplicationStackOverflowHook( TaskHandle_t xTask, char *pcTaskName )
 {
-	configASSERT(xPortInIsrContext());
+#define ERR_STR1 "***ERROR*** A stack overflow in task "
+#define ERR_STR2 " has been detected."
+    const char *str[] = {ERR_STR1, pcTaskName, ERR_STR2};
+
+    char buf[sizeof(ERR_STR1) + CONFIG_FREERTOS_MAX_TASK_NAME_LEN + sizeof(ERR_STR2) + 1 /* null char */] = { 0 };
+
+    char *dest = buf;
+    for (size_t i = 0 ; i < sizeof(str) / sizeof(str[0]); i++) {
+        dest = strcat(dest, str[i]);
+    }
+    esp_system_abort(buf);
 }
 
+// ----------------------- System --------------------------
+
+uint32_t xPortGetTickRateHz(void)
+{
+    return (uint32_t)configTICK_RATE_HZ;
+}
+
+
 #define STACK_WATCH_AREA_SIZE 32
 #define STACK_WATCH_POINT_NUMBER (SOC_CPU_WATCHPOINTS_NUM - 1)
 
-void vPortSetStackWatchpoint( void* pxStackStart ) {
-	//Set watchpoint 1 to watch the last 32 bytes of the stack.
-	//Unfortunately, the Xtensa watchpoints can't set a watchpoint on a random [base - base+n] region because
-	//the size works by masking off the lowest address bits. For that reason, we futz a bit and watch the lowest 32
-	//bytes of the stack we can actually watch. In general, this can cause the watchpoint to be triggered at most
-	//28 bytes early. The value 32 is chosen because it's larger than the stack canary, which in FreeRTOS is 20 bytes.
-	//This way, we make sure we trigger before/when the stack canary is corrupted, not after.
-	int addr=(int)pxStackStart;
-	addr=(addr+31)&(~31);
-	esp_cpu_set_watchpoint(STACK_WATCH_POINT_NUMBER, (char*)addr, 32, ESP_WATCHPOINT_STORE);
-}
-
-uint32_t xPortGetTickRateHz(void) {
-	return (uint32_t)configTICK_RATE_HZ;
-}
-
-void __attribute__((optimize("-O3"))) vPortEnterCritical(portMUX_TYPE *mux)
+void vPortSetStackWatchpoint( void *pxStackStart )
 {
-	BaseType_t oldInterruptLevel = portENTER_CRITICAL_NESTED();
-	/* Interrupts may already be disabled (because we're doing this recursively)
-	* but we can't get the interrupt level after
-	* vPortCPUAquireMutex, because it also may mess with interrupts.
-	* Get it here first, then later figure out if we're nesting
-	* and save for real there.
-	*/
-	vPortCPUAcquireMutex( mux );
-	BaseType_t coreID = xPortGetCoreID();
-	BaseType_t newNesting = port_uxCriticalNesting[coreID] + 1;
-	port_uxCriticalNesting[coreID] = newNesting;
-
-	if( newNesting == 1 )
-	{
-		//This is the first time we get called. Save original interrupt level.
-		port_uxOldInterruptState[coreID] = oldInterruptLevel;
-	}
+    //Set watchpoint 1 to watch the last 32 bytes of the stack.
+    //Unfortunately, the Xtensa watchpoints can't set a watchpoint on a random [base - base+n] region because
+    //the size works by masking off the lowest address bits. For that reason, we futz a bit and watch the lowest 32
+    //bytes of the stack we can actually watch. In general, this can cause the watchpoint to be triggered at most
+    //28 bytes early. The value 32 is chosen because it's larger than the stack canary, which in FreeRTOS is 20 bytes.
+    //This way, we make sure we trigger before/when the stack canary is corrupted, not after.
+    int addr = (int)pxStackStart;
+    addr = (addr + 31) & (~31);
+    esp_cpu_set_watchpoint(STACK_WATCH_POINT_NUMBER, (char *)addr, 32, ESP_WATCHPOINT_STORE);
 }
 
-void __attribute__((optimize("-O3"))) vPortExitCritical(portMUX_TYPE *mux)
+/* ---------------------------------------------- Misc Implementations -------------------------------------------------
+ *
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+// -------------------- Co-Processor -----------------------
+
+/*
+ * Used to set coprocessor area in stack. Current hack is to reuse MPU pointer for coprocessor area.
+ */
+#if portUSING_MPU_WRAPPERS
+void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION *const xRegions, StackType_t *pxBottomOfStack, uint32_t usStackDepth )
 {
-	vPortCPUReleaseMutex( mux );
-	BaseType_t coreID = xPortGetCoreID();
-	BaseType_t nesting = port_uxCriticalNesting[coreID];
+#if XCHAL_CP_NUM > 0
+    xMPUSettings->coproc_area = ( StackType_t * ) ( ( uint32_t ) ( pxBottomOfStack + usStackDepth - 1 ));
+    xMPUSettings->coproc_area = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) xMPUSettings->coproc_area ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) );
+    xMPUSettings->coproc_area = ( StackType_t * ) ( ( ( uint32_t ) xMPUSettings->coproc_area - XT_CP_SIZE ) & ~0xf );
 
-	if(nesting > 0)
-	{
-		nesting--;
-		port_uxCriticalNesting[coreID] = nesting;
 
-		if( nesting == 0 )
-		{
-			portEXIT_CRITICAL_NESTED(port_uxOldInterruptState[coreID]);
-		}
-	}
+    /* NOTE: we cannot initialize the coprocessor save area here because FreeRTOS is going to
+     * clear the stack area after we return. This is done in pxPortInitialiseStack().
+     */
+#endif
 }
 
-void  __attribute__((weak)) vApplicationStackOverflowHook( TaskHandle_t xTask, char *pcTaskName )
+void vPortReleaseTaskMPUSettings( xMPU_SETTINGS *xMPUSettings )
 {
-	#define ERR_STR1 "***ERROR*** A stack overflow in task "
-	#define ERR_STR2 " has been detected."
-	const char *str[] = {ERR_STR1, pcTaskName, ERR_STR2};
-
-	char buf[sizeof(ERR_STR1) + CONFIG_FREERTOS_MAX_TASK_NAME_LEN + sizeof(ERR_STR2) + 1 /* null char */] = { 0 };
-
-	char *dest = buf;
-	for (size_t i = 0 ; i < sizeof(str)/ sizeof(str[0]); i++) {
-		dest = strcat(dest, str[i]);
-	}
-	esp_system_abort(buf);
+    /* If task has live floating point registers somewhere, release them */
+    _xt_coproc_release( xMPUSettings->coproc_area );
 }
+#endif /* portUSING_MPU_WRAPPERS */
+
+// --------------------- App Start-up ----------------------
 
 #if !CONFIG_FREERTOS_UNICORE
 void esp_startup_start_app_other_cores(void)
 {
-	// For now, we only support up to two core: 0 and 1.
-	if (xPortGetCoreID() >= 2) {
-		abort();
-	}
+    // For now, we only support up to two core: 0 and 1.
+    if (xPortGetCoreID() >= 2) {
+        abort();
+    }
 
-	// Wait for FreeRTOS initialization to finish on PRO CPU
-	while (port_xSchedulerRunning[0] == 0) {
-		;
-	}
+    // Wait for FreeRTOS initialization to finish on PRO CPU
+    while (port_xSchedulerRunning[0] == 0) {
+        ;
+    }
 
 #if CONFIG_APPTRACE_ENABLE
-	// [refactor-todo] move to esp_system initialization
-	esp_err_t err = esp_apptrace_init();
-	assert(err == ESP_OK && "Failed to init apptrace module on APP CPU!");
+    // [refactor-todo] move to esp_system initialization
+    esp_err_t err = esp_apptrace_init();
+    assert(err == ESP_OK && "Failed to init apptrace module on APP CPU!");
 #endif
 
 #if CONFIG_ESP_INT_WDT
-	//Initialize the interrupt watch dog for CPU1.
-	esp_int_wdt_cpu_init();
+    //Initialize the interrupt watch dog for CPU1.
+    esp_int_wdt_cpu_init();
 #endif
 
-	esp_crosscore_int_init();
+    esp_crosscore_int_init();
 
-	ESP_EARLY_LOGI(TAG, "Starting scheduler on APP CPU.");
-	xPortStartScheduler();
-	abort(); /* Only get to here if FreeRTOS somehow very broken */
+    ESP_EARLY_LOGI(TAG, "Starting scheduler on APP CPU.");
+    xPortStartScheduler();
+    abort(); /* Only get to here if FreeRTOS somehow very broken */
 }
 #endif // !CONFIG_FREERTOS_UNICORE
 
@@ -502,12 +454,12 @@ void esp_startup_start_app(void)
 {
 #if !CONFIG_ESP_INT_WDT
 #if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX
-	assert(!soc_has_cache_lock_bug() && "ESP32 Rev 3 + Dual Core + PSRAM requires INT WDT enabled in project config!");
+    assert(!soc_has_cache_lock_bug() && "ESP32 Rev 3 + Dual Core + PSRAM requires INT WDT enabled in project config!");
 #endif
 #endif
 
-	esp_startup_start_app_common();
+    esp_startup_start_app_common();
 
-	ESP_LOGI(TAG, "Starting scheduler on PRO CPU.");
-	vTaskStartScheduler();
+    ESP_LOGI(TAG, "Starting scheduler on PRO CPU.");
+    vTaskStartScheduler();
 }

components/freertos/tasks.c

@@ -243,7 +243,7 @@
  * task should be used in place of the parameter.  This macro simply checks to
  * see if the parameter is NULL and returns a pointer to the appropriate TCB.
  */
-#if portNUM_PROCESSORS > 1
+#if configNUM_CORES > 1
 /* In SMP, we need to disable interrupts if getting the current task handle outside a critical section. Calling xTaskGetCurrentTaskHandle() ensures this. */
 #define prvGetTCBFromHandle( pxHandle ) ( ( ( pxHandle ) == NULL ) ? xTaskGetCurrentTaskHandle() : ( (TaskHandle_t)pxHandle ) )
 #else
@@ -358,7 +358,7 @@ typedef tskTCB TCB_t;
 
 /*lint -save -e956 A manual analysis and inspection has been used to determine
  * which static variables must be declared volatile. */
-PRIVILEGED_DATA TCB_t * volatile pxCurrentTCB[portNUM_PROCESSORS] = {NULL};
+PRIVILEGED_DATA TCB_t * volatile pxCurrentTCB[configNUM_CORES] = {NULL};
 
 /* Lists for ready and blocked tasks. --------------------
  * xDelayedTaskList1 and xDelayedTaskList2 could be moved to function scope but
@@ -369,7 +369,7 @@ PRIVILEGED_DATA static List_t xDelayedTaskList1;                         /*< Del
 PRIVILEGED_DATA static List_t xDelayedTaskList2;                         /*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */
 PRIVILEGED_DATA static List_t * volatile pxDelayedTaskList;              /*< Points to the delayed task list currently being used. */
 PRIVILEGED_DATA static List_t * volatile pxOverflowDelayedTaskList;      /*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */
-PRIVILEGED_DATA static List_t xPendingReadyList[ portNUM_PROCESSORS ];                      /*< Tasks that have been readied while the scheduler was suspended.  They will be moved to the ready list when the scheduler is resumed. */
+PRIVILEGED_DATA static List_t xPendingReadyList[ configNUM_CORES ];                      /*< Tasks that have been readied while the scheduler was suspended.  They will be moved to the ready list when the scheduler is resumed. */
 
 #ifdef ESP_PLATFORM
 PRIVILEGED_DATA static portMUX_TYPE xTaskQueueMutex = portMUX_INITIALIZER_UNLOCKED;
@@ -400,11 +400,11 @@ PRIVILEGED_DATA static volatile TickType_t xTickCount = ( TickType_t ) configINI
 PRIVILEGED_DATA static volatile UBaseType_t uxTopReadyPriority = tskIDLE_PRIORITY;
 PRIVILEGED_DATA static volatile BaseType_t xSchedulerRunning = pdFALSE;
 PRIVILEGED_DATA static volatile TickType_t xPendedTicks = ( TickType_t ) 0U;
-PRIVILEGED_DATA static volatile BaseType_t xYieldPending[portNUM_PROCESSORS] = {pdFALSE};
+PRIVILEGED_DATA static volatile BaseType_t xYieldPending[configNUM_CORES] = {pdFALSE};
 PRIVILEGED_DATA static volatile BaseType_t xNumOfOverflows = ( BaseType_t ) 0;
 PRIVILEGED_DATA static UBaseType_t uxTaskNumber = ( UBaseType_t ) 0U;
 PRIVILEGED_DATA static volatile TickType_t xNextTaskUnblockTime = ( TickType_t ) 0U; /* Initialised to portMAX_DELAY before the scheduler starts. */
-PRIVILEGED_DATA static TaskHandle_t xIdleTaskHandle[portNUM_PROCESSORS] = {NULL};    /*< Holds the handle of the idle task.  The idle task is created automatically when the scheduler is started. */
+PRIVILEGED_DATA static TaskHandle_t xIdleTaskHandle[configNUM_CORES] = {NULL};    /*< Holds the handle of the idle task.  The idle task is created automatically when the scheduler is started. */
 
 /* Context switches are held pending while the scheduler is suspended.  Also,
  * interrupts must not manipulate the xStateListItem of a TCB, or any of the
@@ -414,13 +414,13 @@ PRIVILEGED_DATA static TaskHandle_t xIdleTaskHandle[portNUM_PROCESSORS] = {NULL}
  * kernel to move the task from the pending ready list into the real ready list
  * when the scheduler is unsuspended.  The pending ready list itself can only be
  * accessed from a critical section. */
-PRIVILEGED_DATA static volatile UBaseType_t uxSchedulerSuspended[portNUM_PROCESSORS] = {( UBaseType_t ) pdFALSE};
+PRIVILEGED_DATA static volatile UBaseType_t uxSchedulerSuspended[configNUM_CORES] = {( UBaseType_t ) pdFALSE};
 
 #if ( configGENERATE_RUN_TIME_STATS == 1 )
 
 /* Do not move these variables to function scope as doing so prevents the
  * code working with debuggers that need to remove the static qualifier. */
-    PRIVILEGED_DATA static uint32_t ulTaskSwitchedInTime[portNUM_PROCESSORS] = {0U}; /*< Holds the value of a timer/counter the last time a task was switched in. */
+    PRIVILEGED_DATA static uint32_t ulTaskSwitchedInTime[configNUM_CORES] = {0U}; /*< Holds the value of a timer/counter the last time a task was switched in. */
     PRIVILEGED_DATA static uint32_t ulTotalRunTime = 0UL;                            /*< Holds the total amount of execution time as defined by the run time counter clock. */
 
 #endif
@@ -428,7 +428,7 @@ PRIVILEGED_DATA static volatile UBaseType_t uxSchedulerSuspended[portNUM_PROCESS
 // per-CPU flags indicating that we are doing context switch, it is used by apptrace and sysview modules
 // in order to avoid calls of vPortYield from traceTASK_SWITCHED_IN/OUT when waiting
 // for locks to be free or for host to read full trace buffer
-PRIVILEGED_DATA static volatile BaseType_t xSwitchingContext[ portNUM_PROCESSORS ]  = { pdFALSE };
+PRIVILEGED_DATA static volatile BaseType_t xSwitchingContext[ configNUM_CORES ]  = { pdFALSE };
 
 /*lint -restore */
 
@@ -641,7 +641,7 @@ void taskYIELD_OTHER_CORE( BaseType_t xCoreID, UBaseType_t uxPriority )
     else
     {
         /* The task has no affinity. See if we can find a CPU to put it on.*/
-        for (i=0; i<portNUM_PROCESSORS; i++) {
+        for (i=0; i<configNUM_CORES; i++) {
             if (i != xPortGetCoreID() && pxCurrentTCB[ i ]->uxPriority < uxPriority)
             {
                 vPortYieldOtherCore( i );
@@ -669,7 +669,7 @@ void taskYIELD_OTHER_CORE( BaseType_t xCoreID, UBaseType_t uxPriority )
 
         configASSERT( portVALID_TCB_MEM(pxTaskBuffer) );
         configASSERT( portVALID_STACK_MEM(pxStackBuffer) );
-        configASSERT( (xCoreID>=0 && xCoreID<portNUM_PROCESSORS) || (xCoreID==tskNO_AFFINITY) );
+        configASSERT( (xCoreID>=0 && xCoreID<configNUM_CORES) || (xCoreID==tskNO_AFFINITY) );
 
         #if ( configASSERT_DEFINED == 1 )
             {
@@ -918,7 +918,7 @@ static void prvInitialiseNewTask( TaskFunction_t pxTaskCode,
     StackType_t * pxTopOfStack;
     UBaseType_t x;
 
-    #if (portNUM_PROCESSORS < 2)
+    #if (configNUM_CORES < 2)
     xCoreID = 0;
     #endif
 
@@ -1183,7 +1183,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB,
 {
     TCB_t *curTCB, *tcb0, *tcb1;
 
-    #if (portNUM_PROCESSORS < 2)
+    #if (configNUM_CORES < 2)
     xCoreID = 0;
     #endif
 
@@ -1195,7 +1195,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB,
 
         if ( xCoreID == tskNO_AFFINITY )
         {
-            if ( portNUM_PROCESSORS == 1 )
+            if ( configNUM_CORES == 1 )
             {
                 xCoreID = 0;
             }
@@ -1361,10 +1361,10 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB,
 
             if( pxTCB == curTCB ||
                 /* in SMP, we also can't immediately delete the task active on the other core */
-                (portNUM_PROCESSORS > 1 && pxTCB == pxCurrentTCB[ !core ]) ||
+                (configNUM_CORES > 1 && pxTCB == pxCurrentTCB[ !core ]) ||
                 /* ... and we can't delete a non-running task pinned to the other core, as
                    FPU cleanup has to happen on the same core */
-                (portNUM_PROCESSORS > 1 && pxTCB->xCoreID == (!core)) )
+                (configNUM_CORES > 1 && pxTCB->xCoreID == (!core)) )
             {
                 /* A task is deleting itself.  This cannot complete within the
                  * task itself, as a context switch to another task is required.
@@ -1385,7 +1385,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB,
                  * required. */
                 portPRE_TASK_DELETE_HOOK( pxTCB, &xYieldPending[core] );
 
-                if (portNUM_PROCESSORS > 1 && pxTCB == pxCurrentTCB[ !core ])
+                if (configNUM_CORES > 1 && pxTCB == pxCurrentTCB[ !core ])
                 {
                     /* SMP case of deleting a task running on a different core. Same issue
                     as a task deleting itself, but we need to send a yield to this task now
@@ -1611,7 +1611,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB,
             /* The task calling this function is querying its own state. */
             eReturn = eRunning;
         }
-        #if (portNUM_PROCESSORS > 1)
+        #if (configNUM_CORES > 1)
         else if (pxTCB == pxCurrentTCB[!xPortGetCoreID()])
         {
             /* The task calling this function is querying its own state. */
@@ -2261,12 +2261,12 @@ void vTaskStartScheduler( void )
     BaseType_t xReturn;
 
     #if ( configSUPPORT_STATIC_ALLOCATION == 1 && configSUPPORT_STATIC_ALLOCATION == 0 )
-    StaticTask_t *pxIdleTaskTCBBuffer[portNUM_PROCESSORS] = {NULL};
-    StackType_t *pxIdleTaskStackBuffer[portNUM_PROCESSORS]  = {NULL};
+    StaticTask_t *pxIdleTaskTCBBuffer[configNUM_CORES] = {NULL};
+    StackType_t *pxIdleTaskStackBuffer[configNUM_CORES]  = {NULL};
     uint32_t ulIdleTaskStackSize;
     #endif
 
-    for(BaseType_t i = 0; i < portNUM_PROCESSORS; i++)
+    for(BaseType_t i = 0; i < configNUM_CORES; i++)
     {
         /* Add the idle task at the lowest priority. */
         #if( 0 ) /* configSUPPORT_STATIC_ALLOCATION == 1 ) Temporarily unsupported IDF-2243 */
@@ -2347,11 +2347,13 @@ void vTaskStartScheduler( void )
         portDISABLE_INTERRUPTS();
 
         #if ( configUSE_NEWLIB_REENTRANT == 1 )
-        {
-            // /* Switch Newlib's _impure_ptr variable to point to the _reent
-            // structure specific to the task that will run first. */
+            {
+                /* Switch Newlib's _impure_ptr variable to point to the _reent
+                 * structure specific to the task that will run first.
+                 * See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
+                 * for additional information. */
             // _impure_ptr = &( pxCurrentTCB[xPortGetCoreID()]->xNewLib_reent );
-        }
+            }
         #endif /* configUSE_NEWLIB_REENTRANT */
 
         xNextTaskUnblockTime = portMAX_DELAY;
@@ -2437,7 +2439,7 @@ void vTaskSuspendAll( void )
 
 #if ( configUSE_TICKLESS_IDLE != 0 )
 
-#if ( portNUM_PROCESSORS > 1 )
+#if ( configNUM_CORES > 1 )
 
     static BaseType_t xHaveReadyTasks( void )
     {
@@ -2455,7 +2457,7 @@ void vTaskSuspendAll( void )
         return pdFALSE;
     }
 
-#endif // portNUM_PROCESSORS > 1
+#endif // configNUM_CORES > 1
 
     static TickType_t prvGetExpectedIdleTime( void )
     {
@@ -2467,7 +2469,7 @@ void vTaskSuspendAll( void )
         {
             xReturn = 0;
         }
-#if portNUM_PROCESSORS > 1
+#if configNUM_CORES > 1
         /* This function is called from Idle task; in single core case this
          * means that no higher priority tasks are ready to run, and we can
          * enter sleep. In SMP case, there might be ready tasks waiting for
@@ -2477,8 +2479,8 @@ void vTaskSuspendAll( void )
         {
             xReturn = 0;
         }
-#endif // portNUM_PROCESSORS > 1
-        else if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > portNUM_PROCESSORS )
+#endif // configNUM_CORES > 1
+        else if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > configNUM_CORES )
         {
             /* There are other idle priority tasks in the ready state.  If
              * time slicing is used then the very next tick interrupt must be
@@ -2926,7 +2928,7 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) /*lint !e971 Unqualified char
 
     TaskHandle_t xTaskGetIdleTaskHandleForCPU( UBaseType_t cpuid )
     {
-        configASSERT( cpuid < portNUM_PROCESSORS );
+        configASSERT( cpuid < configNUM_CORES );
         configASSERT( ( xIdleTaskHandle[cpuid] != NULL ) );
         return xIdleTaskHandle[cpuid];
     }
@@ -3105,6 +3107,7 @@ BaseType_t xTaskIncrementTick( void )
      * Increments the tick then checks to see if the new tick value will cause any
      * tasks to be unblocked. */
     traceTASK_INCREMENT_TICK( xTickCount );
+
     if( uxSchedulerSuspended[xPortGetCoreID()] == ( UBaseType_t ) pdFALSE )
     {
         taskENTER_CRITICAL_ISR();
@@ -3326,7 +3329,8 @@ BaseType_t xTaskIncrementTick( void )
 
 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
 
-    BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter )
+    BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask,
+                                             void * pvParameter )
     {
         TCB_t * xTCB;
         BaseType_t xReturn;
@@ -3458,7 +3462,7 @@ void vTaskSwitchContext( void )
                     already being executed by another core */
                     foundNonExecutingWaiter = pdTRUE;
                     portBASE_TYPE i = 0;
-                    for ( i=0; i<portNUM_PROCESSORS; i++ ) {
+                    for ( i=0; i<configNUM_CORES; i++ ) {
                         if (i == xPortGetCoreID()) {
                             continue;
                         } else if (pxCurrentTCB[i] == pxTCB) {
@@ -3529,7 +3533,8 @@ void vTaskSwitchContext( void )
 }
 /*-----------------------------------------------------------*/
 
-void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait )
+void vTaskPlaceOnEventList( List_t * const pxEventList,
+                            const TickType_t xTicksToWait )
 {
     configASSERT( pxEventList );
     taskENTER_CRITICAL();
@@ -3548,7 +3553,9 @@ void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksT
 }
 /*-----------------------------------------------------------*/
 
-void vTaskPlaceOnUnorderedEventList( List_t * pxEventList, const TickType_t xItemValue, const TickType_t xTicksToWait )
+void vTaskPlaceOnUnorderedEventList( List_t * pxEventList,
+                                     const TickType_t xItemValue,
+                                     const TickType_t xTicksToWait )
 {
     configASSERT( pxEventList );
     taskENTER_CRITICAL();
@@ -3642,7 +3649,7 @@ BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
     if ( pxUnblockedTCB->xCoreID == tskNO_AFFINITY )
     {
         uxTargetCPU = xPortGetCoreID();
-        for (i = 0; i < portNUM_PROCESSORS; i++)
+        for (i = 0; i < configNUM_CORES; i++)
         {
             if ( uxSchedulerSuspended[ i ] == ( UBaseType_t ) pdFALSE )
             {
@@ -3709,10 +3716,10 @@ BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t xTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem, const TickType_t xItemValue )
+void vTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem,
+                                        const TickType_t xItemValue )
 {
     TCB_t * pxUnblockedTCB;
-    BaseType_t xReturn;
 
     taskENTER_CRITICAL();
 
@@ -3733,12 +3740,6 @@ BaseType_t xTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem, cons
 
     if ( tskCAN_RUN_HERE(pxUnblockedTCB->xCoreID) && pxUnblockedTCB->uxPriority >= pxCurrentTCB[ xPortGetCoreID() ]->uxPriority )
     {
-        /* Return true if the task removed from the event list has
-         * a higher priority than the calling task.  This allows
-         * the calling task to know if it should force a context
-         * switch now. */
-        xReturn = pdTRUE;
-
         /* Mark that a yield is pending in case the user is not using the
          * "xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
         xYieldPending[ xPortGetCoreID() ] = pdTRUE;
@@ -3746,15 +3747,9 @@ BaseType_t xTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem, cons
     else if ( pxUnblockedTCB->xCoreID != xPortGetCoreID() )
     {
         taskYIELD_OTHER_CORE( pxUnblockedTCB->xCoreID, pxUnblockedTCB->uxPriority );
-        xReturn = pdFALSE;
-    }
-    else
-    {
-        xReturn = pdFALSE;
     }
 
     taskEXIT_CRITICAL();
-    return xReturn;
 }
 /*-----------------------------------------------------------*/
 
@@ -3778,7 +3773,8 @@ void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut )
 }
 /*-----------------------------------------------------------*/
 
-BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait )
+BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut,
+                                 TickType_t * const pxTicksToWait )
 {
     BaseType_t xReturn;
 
@@ -3872,7 +3868,8 @@ void vTaskMissedYield( void )
 
 #if ( configUSE_TRACE_FACILITY == 1 )
 
-    void vTaskSetTaskNumber( TaskHandle_t xTask, const UBaseType_t uxHandle )
+    void vTaskSetTaskNumber( TaskHandle_t xTask,
+                             const UBaseType_t uxHandle )
     {
         TCB_t * pxTCB;
 
@@ -4166,8 +4163,8 @@ static void prvInitialiseTaskLists( void )
     vListInitialise( &xDelayedTaskList1 );
     vListInitialise( &xDelayedTaskList2 );
 
-    #if ( portNUM_PROCESSORS > 1 )
-    for(BaseType_t i = 0; i < portNUM_PROCESSORS; i++) {
+    #if ( configNUM_CORES > 1 )
+    for(BaseType_t i = 0; i < configNUM_CORES; i++) {
         vListInitialise( &xPendingReadyList[ i ] );
     }
     #else
@@ -4220,7 +4217,7 @@ static void prvCheckTasksWaitingTermination( void )
                             TCB_t *tgt_tcb = ( TCB_t * )listGET_LIST_ITEM_OWNER(target);
                             int affinity = tgt_tcb->xCoreID;
                             //Self deleting tasks are added to Termination List before they switch context. Ensure they aren't still currently running
-                            if( pxCurrentTCB[core] == tgt_tcb || (portNUM_PROCESSORS > 1 && pxCurrentTCB[!core] == tgt_tcb) ){
+                            if( pxCurrentTCB[core] == tgt_tcb || (configNUM_CORES > 1 && pxCurrentTCB[!core] == tgt_tcb) ){
                                 continue;   //Can't free memory of task that is still running
                             }
                             if(affinity == core || affinity == tskNO_AFFINITY){     //Find first item not pinned to other core
@@ -4616,7 +4613,7 @@ static void prvResetNextTaskUnblockTime( void )
 }
 /*-----------------------------------------------------------*/
 
-#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) || (portNUM_PROCESSORS > 1) )
+#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) || (configNUM_CORES > 1) )
 
     TaskHandle_t xTaskGetCurrentTaskHandle( void )
     {
@@ -4635,7 +4632,7 @@ static void prvResetNextTaskUnblockTime( void )
     TaskHandle_t xReturn=NULL;
 
         //Xtensa-specific: the pxCurrentPCB pointer is atomic so we shouldn't need a lock.
-        if (cpuid < portNUM_PROCESSORS) {
+        if (cpuid < configNUM_CORES) {
             xReturn = pxCurrentTCB[ cpuid ];
         }
 
@@ -5423,6 +5420,7 @@ TickType_t uxTaskResetEventItemValue( void )
         BaseType_t xReturn;
 
         configASSERT( uxIndexToWait < configTASK_NOTIFICATION_ARRAY_ENTRIES );
+
         taskENTER_CRITICAL();
         {
             /* Only block if a notification is not already pending. */
@@ -5930,7 +5928,7 @@ static void prvAddCurrentTaskToDelayedList( const portBASE_TYPE xCoreID, const T
     TickType_t xTimeToWake;
     const TickType_t xConstTickCount = xTickCount;
 
-    if (portNUM_PROCESSORS > 1 && listIS_CONTAINED_WITHIN(&xTasksWaitingTermination,  &( pxCurrentTCB[xCoreID]->xStateListItem))) {
+    if (configNUM_CORES > 1 && listIS_CONTAINED_WITHIN(&xTasksWaitingTermination,  &( pxCurrentTCB[xCoreID]->xStateListItem))) {
         /* vTaskDelete() has been called to delete this task. This would have happened from the other core while this task was spinning on xTaskQueueMutex,
            so don't move the running task to the delayed list - as soon as this core re-enables interrupts this task will
            be suspended permanently */

components/hal/esp32c3/include/hal/i2s_ll.h

@@ -1,16 +1,8 @@
-// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 // The LL layer for I2S register operations
 /*******************************************************************************
@@ -86,6 +78,26 @@ static inline void i2s_ll_rx_enable_clock(i2s_dev_t *hw)
     hw->rx_clkm_conf.rx_clk_active = 1;
 }
 
+/**
+ * @brief Disable I2S tx module clock
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_tx_disable_clock(i2s_dev_t *hw)
+{
+    hw->tx_clkm_conf.tx_clk_active = 0;
+}
+
+/**
+ * @brief Disable I2S rx module clock
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_rx_disable_clock(i2s_dev_t *hw)
+{
+    hw->rx_clkm_conf.rx_clk_active = 0;
+}
+
 /**
  * @brief I2S mclk use tx module clock
  *

components/hal/esp32c3/include/hal/rmt_ll.h

@@ -1,16 +1,9 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 #pragma once
 
 #include <stdint.h>
@@ -23,6 +16,9 @@
 extern "C" {
 #endif
 
+
+#define RMT_LL_MAX_LOOP_COUNT           (1023)/*!< Max loop count that hardware is supported */
+
 #define RMT_LL_HW_BASE  (&RMT)
 #define RMT_LL_MEM_BASE (&RMTMEM)
 

components/hal/esp32h2/include/hal/i2s_ll.h

@@ -1,16 +1,8 @@
-// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 /*******************************************************************************
  * NOTICE
@@ -87,6 +79,26 @@ static inline void i2s_ll_rx_enable_clock(i2s_dev_t *hw)
     hw->rx_clkm_conf.rx_clk_active = 1;
 }
 
+/**
+ * @brief Disable I2S tx module clock
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_tx_disable_clock(i2s_dev_t *hw)
+{
+    hw->tx_clkm_conf.tx_clk_active = 0;
+}
+
+/**
+ * @brief Disable I2S rx module clock
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_rx_disable_clock(i2s_dev_t *hw)
+{
+    hw->rx_clkm_conf.rx_clk_active = 0;
+}
+
 /**
  * @brief I2S mclk use tx module clock
  *

components/hal/esp32h2/include/hal/rmt_ll.h

@@ -1,16 +1,9 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 #pragma once
 
 #include <stdint.h>
@@ -23,6 +16,8 @@
 extern "C" {
 #endif
 
+#define RMT_LL_MAX_LOOP_COUNT           (1023)/*!< Max loop count that hardware is supported */
+
 #define RMT_LL_HW_BASE  (&RMT)
 #define RMT_LL_MEM_BASE (&RMTMEM)
 

components/hal/esp32s2/include/hal/rmt_ll.h

@@ -1,16 +1,9 @@
-// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 #pragma once
 
 #include <stdbool.h>
@@ -22,6 +15,8 @@
 extern "C" {
 #endif
 
+#define RMT_LL_MAX_LOOP_COUNT          (1023)/*!< Max loop count that hardware is supported */
+
 #define RMT_LL_HW_BASE  (&RMT)
 #define RMT_LL_MEM_BASE (&RMTMEM)
 

components/hal/esp32s3/include/hal/i2s_ll.h

@@ -1,16 +1,8 @@
-// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 // The LL layer for I2S register operations
 /*******************************************************************************
@@ -87,6 +79,26 @@ static inline void i2s_ll_rx_enable_clock(i2s_dev_t *hw)
     hw->rx_clkm_conf.rx_clk_active = 1;
 }
 
+/**
+ * @brief Disable I2S tx module clock
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_tx_disable_clock(i2s_dev_t *hw)
+{
+    hw->tx_clkm_conf.tx_clk_active = 0;
+}
+
+/**
+ * @brief Disable I2S rx module clock
+ *
+ * @param hw Peripheral I2S hardware instance address.
+ */
+static inline void i2s_ll_rx_disable_clock(i2s_dev_t *hw)
+{
+    hw->rx_clkm_conf.rx_clk_active = 0;
+}
+
 /**
  * @brief I2S mclk use tx module clock
  *

components/hal/esp32s3/include/hal/lcd_ll.h

@@ -1,16 +1,8 @@
-// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #pragma once
 
 #include <stdint.h>
@@ -63,17 +55,20 @@ static inline void lcd_ll_set_group_clock_src(lcd_cam_dev_t *dev, lcd_clock_sour
     }
 }
 
+__attribute__((always_inline))
 static inline void lcd_ll_set_clock_idle_level(lcd_cam_dev_t *dev, bool level)
 {
     dev->lcd_clock.lcd_ck_idle_edge = level;
 }
 
+__attribute__((always_inline))
 static inline void lcd_ll_set_pixel_clock_edge(lcd_cam_dev_t *dev, bool active_on_neg)
 {
     dev->lcd_clock.lcd_clk_equ_sysclk = 0; // if we want to pixel_clk == lcd_clk, just make clkcnt = 0
     dev->lcd_clock.lcd_ck_out_edge = active_on_neg;
 }
 
+__attribute__((always_inline))
 static inline void lcd_ll_set_pixel_clock_prescale(lcd_cam_dev_t *dev, uint32_t prescale)
 {
     // Formula: pixel_clk = lcd_clk / (1 + clkcnt_n)
@@ -85,6 +80,7 @@ static inline void lcd_ll_enable_rgb_yuv_convert(lcd_cam_dev_t *dev, bool en)
     dev->lcd_rgb_yuv.lcd_conv_bypass = en;
 }
 
+__attribute__((always_inline))
 static inline void lcd_ll_set_phase_cycles(lcd_cam_dev_t *dev, uint32_t cmd_cycles, uint32_t dummy_cycles, uint32_t data_cycles)
 {
     HAL_ASSERT(cmd_cycles <= 2);
@@ -118,6 +114,7 @@ static inline void lcd_ll_enable_output_always_on(lcd_cam_dev_t *dev, bool en)
     dev->lcd_user.lcd_always_out_en = en;
 }
 
+__attribute__((always_inline))
 static inline void lcd_ll_start(lcd_cam_dev_t *dev)
 {
     dev->lcd_user.lcd_update = 1; // update parameters before start transaction
@@ -136,17 +133,20 @@ static inline void lcd_ll_reset(lcd_cam_dev_t *dev)
     dev->lcd_user.lcd_reset = 0;
 }
 
+__attribute__((always_inline))
 static inline void lcd_ll_reverse_data_bit_order(lcd_cam_dev_t *dev, bool en)
 {
     // whether to change LCD_DATA_out[N:0] to LCD_DATA_out[0:N]
     dev->lcd_user.lcd_bit_order = en;
 }
 
+__attribute__((always_inline))
 static inline void lcd_ll_reverse_data_byte_order(lcd_cam_dev_t *dev, bool en)
 {
     dev->lcd_user.lcd_byte_order = en;
 }
 
+__attribute__((always_inline))
 static inline void lcd_ll_reverse_data_8bits_order(lcd_cam_dev_t *dev, bool en)
 {
     dev->lcd_user.lcd_8bits_order = en;
@@ -158,6 +158,7 @@ static inline void lcd_ll_fifo_reset(lcd_cam_dev_t *dev)
     dev->lcd_misc.lcd_afifo_reset = 0;
 }
 
+__attribute__((always_inline))
 static inline void lcd_ll_set_dc_level(lcd_cam_dev_t *dev, bool idle_phase, bool cmd_phase, bool dummy_phase, bool data_phase)
 {
     dev->lcd_misc.lcd_cd_idle_edge = idle_phase;
@@ -171,6 +172,7 @@ static inline void lcd_ll_set_dc_delay_ticks(lcd_cam_dev_t *dev, uint32_t delay)
     dev->lcd_dly_mode.lcd_cd_mode = delay;
 }
 
+__attribute__((always_inline))
 static inline void lcd_ll_set_command(lcd_cam_dev_t *dev, uint32_t data_width, uint32_t command)
 {
     // if command phase has two cycles, in the first cycle, command[15:0] is sent out via lcd_data_out[15:0]
@@ -250,11 +252,13 @@ static inline void lcd_ll_enable_interrupt(lcd_cam_dev_t *dev, uint32_t mask, bo
     }
 }
 
+__attribute__((always_inline))
 static inline uint32_t lcd_ll_get_interrupt_status(lcd_cam_dev_t *dev)
 {
     return dev->lc_dma_int_st.val & 0x03;
 }
 
+__attribute__((always_inline))
 static inline void lcd_ll_clear_interrupt_status(lcd_cam_dev_t *dev, uint32_t mask)
 {
     dev->lc_dma_int_clr.val = mask & 0x03;

components/hal/esp32s3/include/hal/rmt_ll.h

@@ -1,16 +1,9 @@
-// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 #pragma once
 
 #include <stddef.h>
@@ -22,6 +15,7 @@
 extern "C" {
 #endif
 
+#define RMT_LL_MAX_LOOP_COUNT           (1023)/*!< Max loop count that hardware is supported */
 #define RMT_LL_HW_BASE  (&RMT)
 #define RMT_LL_MEM_BASE (&RMTMEM)
 
@@ -193,6 +187,11 @@ static inline bool rmt_ll_is_tx_loop_enabled(rmt_dev_t *dev, uint32_t channel)
     return dev->chnconf0[channel].tx_conti_mode_n;
 }
 
+static inline void rmt_ll_tx_enable_loop_autostop(rmt_dev_t *dev, uint32_t channel, bool enable)
+{
+    dev->chn_tx_lim[channel].loop_stop_en_chn = enable;
+}
+
 static inline void rmt_ll_tx_set_loop_count(rmt_dev_t *dev, uint32_t channel, uint32_t count)
 {
     dev->chn_tx_lim[channel].tx_loop_num_chn = count;

components/hal/esp32s3/include/hal/rtc_io_ll.h

@@ -1,16 +1,8 @@
-// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 /*******************************************************************************
  * NOTICE
@@ -56,14 +48,14 @@ typedef enum {
 static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func)
 {
     if (func == RTCIO_FUNC_RTC) {
-        // SENS.sar_io_mux_conf.iomux_clk_gate_en = 1;
+        SENS.sar_peri_clk_gate_conf.iomux_clk_en = 1;
         // 0: GPIO connected to digital GPIO module. 1: GPIO connected to analog RTC module.
         SET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, (rtc_io_desc[rtcio_num].mux));
         //0:RTC FUNCTION 1,2,3:Reserved
         SET_PERI_REG_BITS(rtc_io_desc[rtcio_num].reg, RTC_IO_TOUCH_PAD1_FUN_SEL_V, RTCIO_LL_PIN_FUNC, rtc_io_desc[rtcio_num].func);
     } else if (func == RTCIO_FUNC_DIGITAL) {
         CLEAR_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, (rtc_io_desc[rtcio_num].mux));
-        // SENS.sar_io_mux_conf.iomux_clk_gate_en = 0;
+        SENS.sar_peri_clk_gate_conf.iomux_clk_en = 0;
     }
 }
 
@@ -276,6 +268,7 @@ static inline void rtcio_ll_force_unhold_all(void)
  */
 static inline void rtcio_ll_wakeup_enable(int rtcio_num, rtcio_ll_wake_type_t type)
 {
+    SENS.sar_peri_clk_gate_conf.iomux_clk_en = 1;
     RTCIO.pin[rtcio_num].wakeup_enable = 0x1;
     RTCIO.pin[rtcio_num].int_type = type;
 }

components/hal/esp32s3/include/hal/touch_sensor_hal.h

@@ -1,16 +1,8 @@
-// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 /*******************************************************************************
  * NOTICE
@@ -18,7 +10,7 @@
  * See readme.md in hal/include/hal/readme.md
  ******************************************************************************/
 
-// The HAL layer for touch sensor (esp32s2 specific part)
+// The HAL layer for touch sensor (ESP32-S3 specific part)
 
 #pragma once
 

components/hal/esp32s3/include/hal/touch_sensor_ll.h

@@ -1,16 +1,8 @@
-// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 /*******************************************************************************
  * NOTICE
@@ -174,7 +166,11 @@ static inline void touch_ll_get_voltage_attenuation(touch_volt_atten_t *atten)
  */
 static inline void touch_ll_set_slope(touch_pad_t touch_num, touch_cnt_slope_t slope)
 {
-    abort();//IDF-3417
+    if (touch_num < TOUCH_PAD_NUM10) {
+        SET_PERI_REG_BITS(RTC_CNTL_TOUCH_DAC_REG, RTC_CNTL_TOUCH_PAD0_DAC_V, slope, (RTC_CNTL_TOUCH_PAD0_DAC_S - touch_num * 3));
+    } else {
+        SET_PERI_REG_BITS(RTC_CNTL_TOUCH_DAC1_REG, RTC_CNTL_TOUCH_PAD10_DAC_V, slope, (RTC_CNTL_TOUCH_PAD10_DAC_S - (touch_num - TOUCH_PAD_NUM10) * 3));
+    }
 }
 
 /**
@@ -189,7 +185,11 @@ static inline void touch_ll_set_slope(touch_pad_t touch_num, touch_cnt_slope_t s
  */
 static inline void touch_ll_get_slope(touch_pad_t touch_num, touch_cnt_slope_t *slope)
 {
-    abort();//IDF-3417
+    if (touch_num < TOUCH_PAD_NUM10) {
+        *slope = GET_PERI_REG_BITS2(RTC_CNTL_TOUCH_DAC_REG, RTC_CNTL_TOUCH_PAD0_DAC_V, (RTC_CNTL_TOUCH_PAD0_DAC_S - touch_num * 3));
+    } else {
+        *slope = GET_PERI_REG_BITS2(RTC_CNTL_TOUCH_DAC1_REG, RTC_CNTL_TOUCH_PAD10_DAC_V, (RTC_CNTL_TOUCH_PAD10_DAC_S - (touch_num - TOUCH_PAD_NUM10) * 3));
+    }
 }
 
 /**
@@ -413,7 +413,7 @@ static inline void touch_ll_clear_trigger_status_mask(void)
 static inline uint32_t IRAM_ATTR touch_ll_read_raw_data(touch_pad_t touch_num)
 {
     SENS.sar_touch_conf.touch_data_sel = TOUCH_LL_READ_RAW;
-    return SENS.sar_touch_status[touch_num - 1].touch_pad1_data;
+    return SENS.sar_touch_status[touch_num - 1].touch_pad_data;
 }
 
 /**
@@ -490,19 +490,22 @@ static inline touch_pad_t IRAM_ATTR touch_ll_get_current_meas_channel(void)
 static inline void touch_ll_intr_enable(touch_pad_intr_mask_t int_mask)
 {
     if (int_mask & TOUCH_PAD_INTR_MASK_DONE) {
-        RTCCNTL.int_ena.rtc_touch_done = 1;
+        RTCCNTL.int_ena_w1ts.rtc_touch_done_w1ts = 1;
     }
     if (int_mask & TOUCH_PAD_INTR_MASK_ACTIVE) {
-        RTCCNTL.int_ena.rtc_touch_active = 1;
+        RTCCNTL.int_ena_w1ts.rtc_touch_active_w1ts = 1;
     }
     if (int_mask & TOUCH_PAD_INTR_MASK_INACTIVE) {
-        RTCCNTL.int_ena.rtc_touch_inactive = 1;
+        RTCCNTL.int_ena_w1ts.rtc_touch_inactive_w1ts = 1;
     }
     if (int_mask & TOUCH_PAD_INTR_MASK_SCAN_DONE) {
-        RTCCNTL.int_ena.rtc_touch_scan_done = 1;
+        RTCCNTL.int_ena_w1ts.rtc_touch_scan_done_w1ts = 1;
     }
     if (int_mask & TOUCH_PAD_INTR_MASK_TIMEOUT) {
-        RTCCNTL.int_ena.rtc_touch_timeout = 1;
+        RTCCNTL.int_ena_w1ts.rtc_touch_timeout_w1ts = 1;
+    }
+    if (int_mask & TOUCH_PAD_INTR_MASK_PROXI_MEAS_DONE) {
+        RTCCNTL.int_ena_w1ts.rtc_touch_approach_loop_done_w1ts = 1;
     }
 }
 
@@ -514,19 +517,22 @@ static inline void touch_ll_intr_enable(touch_pad_intr_mask_t int_mask)
 static inline void touch_ll_intr_disable(touch_pad_intr_mask_t int_mask)
 {
     if (int_mask & TOUCH_PAD_INTR_MASK_DONE) {
-        RTCCNTL.int_ena.rtc_touch_done = 0;
+        RTCCNTL.int_ena_w1tc.rtc_touch_done_w1tc = 1;
     }
     if (int_mask & TOUCH_PAD_INTR_MASK_ACTIVE) {
-        RTCCNTL.int_ena.rtc_touch_active = 0;
+        RTCCNTL.int_ena_w1tc.rtc_touch_active_w1tc = 1;
     }
     if (int_mask & TOUCH_PAD_INTR_MASK_INACTIVE) {
-        RTCCNTL.int_ena.rtc_touch_inactive = 0;
+        RTCCNTL.int_ena_w1tc.rtc_touch_inactive_w1tc = 1;
     }
     if (int_mask & TOUCH_PAD_INTR_MASK_SCAN_DONE) {
-        RTCCNTL.int_ena.rtc_touch_scan_done = 0;
+        RTCCNTL.int_ena_w1tc.rtc_touch_scan_done_w1tc = 1;
     }
     if (int_mask & TOUCH_PAD_INTR_MASK_TIMEOUT) {
-        RTCCNTL.int_ena.rtc_touch_timeout = 0;
+        RTCCNTL.int_ena_w1tc.rtc_touch_timeout_w1tc = 1;
+    }
+    if (int_mask & TOUCH_PAD_INTR_MASK_PROXI_MEAS_DONE) {
+        RTCCNTL.int_ena_w1tc.rtc_touch_approach_loop_done_w1tc = 1;
     }
 }
 
@@ -552,6 +558,9 @@ static inline void touch_ll_intr_clear(touch_pad_intr_mask_t int_mask)
     if (int_mask & TOUCH_PAD_INTR_MASK_TIMEOUT) {
         RTCCNTL.int_clr.rtc_touch_timeout = 1;
     }
+    if (int_mask & TOUCH_PAD_INTR_MASK_PROXI_MEAS_DONE) {
+        RTCCNTL.int_clr.rtc_touch_approach_loop_done = 1;
+    }
 }
 
 /**
@@ -579,6 +588,9 @@ static inline uint32_t touch_ll_read_intr_status_mask(void)
     if (intr_st & RTC_CNTL_TOUCH_TIMEOUT_INT_ST_M) {
         intr_msk |= TOUCH_PAD_INTR_MASK_TIMEOUT;
     }
+    if (intr_st & RTC_CNTL_TOUCH_APPROACH_LOOP_DONE_INT_ST_M) {
+        intr_msk |= TOUCH_PAD_INTR_MASK_PROXI_MEAS_DONE;
+    }
     return (intr_msk & TOUCH_PAD_INTR_MASK_ALL);
 }
 
@@ -641,7 +653,7 @@ static inline void touch_ll_timeout_get_threshold(uint32_t *threshold)
 static inline void IRAM_ATTR touch_ll_filter_read_smooth(touch_pad_t touch_num, uint32_t *smooth_data)
 {
     SENS.sar_touch_conf.touch_data_sel = TOUCH_LL_READ_SMOOTH;
-    *smooth_data = SENS.sar_touch_status[touch_num - 1].touch_pad1_data;
+    *smooth_data = SENS.sar_touch_status[touch_num - 1].touch_pad_data;
 }
 
 /**
@@ -654,7 +666,7 @@ static inline void IRAM_ATTR touch_ll_filter_read_smooth(touch_pad_t touch_num,
 static inline void IRAM_ATTR touch_ll_read_benchmark(touch_pad_t touch_num, uint32_t *benchmark)
 {
     SENS.sar_touch_conf.touch_data_sel = TOUCH_LL_READ_BENCHMARK;
-    *benchmark = SENS.sar_touch_status[touch_num - 1].touch_pad1_data;
+    *benchmark = SENS.sar_touch_status[touch_num - 1].touch_pad_data;
 }
 
 /**
@@ -749,9 +761,9 @@ static inline void touch_ll_filter_get_debounce(uint32_t *dbc_cnt)
 static inline void touch_ll_filter_set_noise_thres(uint32_t noise_thr)
 {
     RTCCNTL.touch_filter_ctrl.touch_noise_thres = noise_thr;
-    RTCCNTL.touch_filter_ctrl.touch_neg_noise_thres = noise_thr;
-    RTCCNTL.touch_filter_ctrl.touch_neg_noise_limit = 0xF;
-    RTCCNTL.touch_filter_ctrl.touch_hysteresis = 2;
+    RTCCNTL.touch_filter_ctrl.config2 = noise_thr;
+    RTCCNTL.touch_filter_ctrl.config1 = 0xF;
+    RTCCNTL.touch_filter_ctrl.config3 = 2;
 }
 
 /**
@@ -889,7 +901,7 @@ static inline void touch_ll_denoise_get_grade(touch_pad_denoise_grade_t *grade)
  */
 static inline void touch_ll_denoise_read_data(uint32_t *data)
 {
-    *data = SENS.sar_touch_status0.touch_denoise_data;
+    *data =  SENS.sar_touch_denoise.touch_denoise_data;
 }
 
 /************************ Waterproof register setting ************************/
@@ -1014,6 +1026,13 @@ static inline void touch_ll_proximity_get_meas_times(uint32_t *times)
  */
 static inline void touch_ll_proximity_read_meas_cnt(touch_pad_t touch_num, uint32_t *cnt)
 {
+    if (SENS.sar_touch_conf.touch_approach_pad0 == touch_num) {
+        *cnt = SENS.sar_touch_appr_status.touch_approach_pad0_cnt;
+    } else if (SENS.sar_touch_conf.touch_approach_pad1 == touch_num) {
+        *cnt = SENS.sar_touch_appr_status.touch_approach_pad1_cnt;
+    } else if (SENS.sar_touch_conf.touch_approach_pad2 == touch_num) {
+        *cnt = SENS.sar_touch_appr_status.touch_approach_pad2_cnt;
+    }
 }
 
 /**
@@ -1111,17 +1130,22 @@ static inline bool touch_ll_sleep_get_approach_status(void)
  */
 static inline void touch_ll_sleep_read_benchmark(uint32_t *benchmark)
 {
+    SENS.sar_touch_conf.touch_data_sel = TOUCH_LL_READ_BENCHMARK;
+    *benchmark = SENS.sar_touch_slp_status.touch_slp_data;
 }
 
 static inline void touch_ll_sleep_read_smooth(uint32_t *smooth_data)
 {
+    SENS.sar_touch_conf.touch_data_sel = TOUCH_LL_READ_SMOOTH;
+    *smooth_data = SENS.sar_touch_slp_status.touch_slp_data;
 }
 
+/* Workaround: Note: sleep pad raw data is not in `sar_touch_slp_status` */
 static inline void touch_ll_sleep_read_data(uint32_t *raw_data)
 {
     uint32_t touch_num = RTCCNTL.touch_slp_thres.touch_slp_pad;
     SENS.sar_touch_conf.touch_data_sel = TOUCH_LL_READ_RAW;
-    *raw_data = SENS.sar_touch_status[touch_num - 1].touch_pad1_data;
+    *raw_data = SENS.sar_touch_status[touch_num - 1].touch_pad_data;
 }
 
 static inline void touch_ll_sleep_reset_benchmark(void)
@@ -1146,6 +1170,7 @@ static inline void touch_ll_sleep_low_power(bool is_low_power)
  */
 static inline void touch_ll_sleep_read_debounce(uint32_t *debounce)
 {
+    *debounce = SENS.sar_touch_slp_status.touch_slp_debounce;
 }
 
 /**
@@ -1154,6 +1179,7 @@ static inline void touch_ll_sleep_read_debounce(uint32_t *debounce)
  */
 static inline void touch_ll_sleep_read_proximity_cnt(uint32_t *approach_cnt)
 {
+    *approach_cnt = SENS.sar_touch_appr_status.touch_slp_approach_cnt;
 }
 
 /**

components/hal/esp32s3/touch_sensor_hal.c

@@ -1,19 +1,12 @@
-// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 // The HAL layer for Touch Sensor (common part)
 
+#include "soc/soc_pins.h"
 #include "hal/touch_sensor_hal.h"
 #include "hal/touch_sensor_types.h"
 #include "soc/soc_caps.h"

components/hal/i2s_hal.c

@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 
 // The HAL layer for I2S (common part)
@@ -104,6 +96,15 @@ void i2s_hal_tx_set_pdm_mode_default(i2s_hal_context_t *hal, uint32_t sample_rat
 {
     /* enable pdm tx mode */
     i2s_ll_tx_enable_pdm(hal->dev, true);
+#if SOC_I2S_SUPPORTS_TDM
+    i2s_ll_tx_enable_clock(hal->dev);
+    i2s_ll_tx_clk_set_src(hal->dev, I2S_CLK_D2CLK); // Set I2S_CLK_D2CLK as default
+    i2s_ll_mclk_use_tx_clk(hal->dev);
+    /* Still need to enable the first 2 TDM channel mask to get the correct number of frame */
+    i2s_ll_tx_set_active_chan_mask(hal->dev, I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH1);
+#else
+    i2s_ll_tx_force_enable_fifo_mod(hal->dev, true);
+#endif
     /* set pdm tx default presacle */
     i2s_ll_tx_set_pdm_prescale(hal->dev, 0);
     /* set pdm tx default sacle of high pass filter */
@@ -140,6 +141,18 @@ void i2s_hal_rx_set_pdm_mode_default(i2s_hal_context_t *hal)
     i2s_ll_rx_enable_pdm(hal->dev, true);
     /* set pdm rx downsample number */
     i2s_ll_rx_set_pdm_dsr(hal->dev, I2S_PDM_DSR_8S);
+#if !SOC_I2S_SUPPORTS_TDM
+    i2s_ll_rx_force_enable_fifo_mod(hal->dev, true);
+#endif
+#if SOC_I2S_SUPPORTS_TDM
+    i2s_ll_rx_enable_clock(hal->dev);
+    i2s_ll_rx_clk_set_src(hal->dev, I2S_CLK_D2CLK); // Set I2S_CLK_D2CLK as default
+    i2s_ll_mclk_use_rx_clk(hal->dev);
+    /* Still need to enable the first 2 TDM channel mask to get the correct number of frame */
+    i2s_ll_rx_set_active_chan_mask(hal->dev, I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH1);
+#else
+    i2s_ll_rx_force_enable_fifo_mod(hal->dev, true);
+#endif
 }
 #endif // SOC_I2S_SUPPORTS_PDM_RX
 
@@ -286,8 +299,8 @@ void i2s_hal_config_param(i2s_hal_context_t *hal, const i2s_hal_config_t *hal_cf
         {
             /* Set tx common mode */
             i2s_hal_tx_set_common_mode(hal, hal_cfg);
-            i2s_hal_tx_set_channel_style(hal, hal_cfg);
         }
+        i2s_hal_tx_set_channel_style(hal, hal_cfg);
     }
 
     /* Set configurations for RX mode */
@@ -304,8 +317,8 @@ void i2s_hal_config_param(i2s_hal_context_t *hal, const i2s_hal_config_t *hal_cf
         {
             /* Set rx common mode */
             i2s_hal_rx_set_common_mode(hal, hal_cfg);
-            i2s_hal_rx_set_channel_style(hal, hal_cfg);
         }
+        i2s_hal_rx_set_channel_style(hal, hal_cfg);
     }
 
     /* Set configurations for full-duplex mode */
@@ -318,3 +331,35 @@ void i2s_hal_config_param(i2s_hal_context_t *hal, const i2s_hal_config_t *hal_cf
         }
     }
 }
+
+void i2s_hal_start_tx(i2s_hal_context_t *hal)
+{
+#if SOC_I2S_SUPPORTS_TDM
+    i2s_ll_tx_enable_clock(hal->dev);
+#endif
+    i2s_ll_tx_start(hal->dev);
+}
+
+void i2s_hal_start_rx(i2s_hal_context_t *hal)
+{
+#if SOC_I2S_SUPPORTS_TDM
+    i2s_ll_rx_enable_clock(hal->dev);
+#endif
+    i2s_ll_rx_start(hal->dev);
+}
+
+void i2s_hal_stop_tx(i2s_hal_context_t *hal)
+{
+    i2s_ll_tx_stop(hal->dev);
+#if SOC_I2S_SUPPORTS_TDM
+    i2s_ll_tx_disable_clock(hal->dev);
+#endif
+}
+
+void i2s_hal_stop_rx(i2s_hal_context_t *hal)
+{
+    i2s_ll_rx_stop(hal->dev);
+#if SOC_I2S_SUPPORTS_TDM
+    i2s_ll_rx_disable_clock(hal->dev);
+#endif
+}

components/hal/include/hal/i2s_hal.h

@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 /*******************************************************************************
  * NOTICE
@@ -176,28 +168,28 @@ void i2s_hal_enable_slave_fd_mode(i2s_hal_context_t *hal);
  *
  * @param hal Context of the HAL layer
  */
-#define i2s_hal_start_tx(hal)               i2s_ll_tx_start((hal)->dev)
+void i2s_hal_start_tx(i2s_hal_context_t *hal);
 
 /**
  * @brief Start I2S rx
  *
  * @param hal Context of the HAL layer
  */
-#define i2s_hal_start_rx(hal)               i2s_ll_rx_start((hal)->dev)
+void i2s_hal_start_rx(i2s_hal_context_t *hal);
 
 /**
  * @brief Stop I2S tx
  *
  * @param hal Context of the HAL layer
  */
-#define i2s_hal_stop_tx(hal)                i2s_ll_tx_stop((hal)->dev)
+void i2s_hal_stop_tx(i2s_hal_context_t *hal);
 
 /**
  * @brief Stop I2S rx
  *
  * @param hal Context of the HAL layer
  */
-#define i2s_hal_stop_rx(hal)                i2s_ll_rx_stop((hal)->dev)
+void i2s_hal_stop_rx(i2s_hal_context_t *hal);
 
 /**
  * @brief Set the received data length to trigger `in_suc_eof` interrupt.