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13 Commits

Author SHA1 Message Date
Ivan Grokhotkov
1561fbd2c5 Merge branch 'ci/minimum_pipeline_for_revert_branch' into 'master'
ci: minimum pipeline for 'revert-' branches

Closes IDFCI-920

See merge request espressif/esp-idf!15592
2021-10-26 12:14:30 +00:00
Anton Maklakov
e525964f67 Merge branch 'bugfix/gdbstub_4_c3' into 'master'
Add missing function for C3

See merge request espressif/esp-idf!15538
2021-10-26 10:16:38 +00:00
Fu Hanxi
4cc18e9582 ci: minimum pipeline for 'revert-' branches 2021-10-26 17:55:58 +08:00
Alexey Gerenkov
e777653222 Merge branch 'feature/esp32s3_apptrace' into 'master'
apptrace/trax: Adds ESP32-S3 support

Closes IDF-1785

See merge request espressif/esp-idf!14857
2021-10-26 09:50:40 +00:00
Mahavir Jain
152d819707 Merge branch 'feature/sync_github_pr_to_gitlab' into 'master'
Sync approved Github PRs to Gitlab (ESP-IDF)

Closes RDT-58

See merge request espressif/esp-idf!15064
2021-10-26 09:32:25 +00:00
Ivan Grokhotkov
569440bd3c Merge branch 'bugfix/highint_hdl_link_gnumake' into 'master'
esp_system: fix high level interrupt handler not linked for GNU Make

Closes IDFGH-5728 and IDFGH-6078

See merge request espressif/esp-idf!15615
2021-10-26 09:25:34 +00:00
Kevin (Lao Kaiyao)
bc1cebe042 Merge branch 'bugfix/i2s_ws_polarity_in_tdm' into 'master'
i2s: fix ws signal polarity in tdm mode

Closes IDF-4140

See merge request espressif/esp-idf!15534
2021-10-26 07:13:49 +00:00
Laukik Hase
995b398165 gh_action: Sync approved Github PRs to Gitlab
- Checks for forbidden files modification (.gitlab/.github) and PR approver access level
- Approver decides the approach for PR merging (Rebase or direct Merge)
2021-10-26 12:46:42 +08:00
laokaiyao
f37595dee9 i2s: fix ws signal polarity in tdm mode 2021-10-26 11:12:30 +08:00
Dmitry
1457c42f6f bugfix/esp-gdbstrub: add missing function for esp32c3/esp32h2. 2021-10-25 10:30:50 +03:00
Ivan Grokhotkov
265038bea3 esp_system: fix high level interrupt handler not linked for GNU Make
In 4972605, high-level interrupt handler hook was renamed from
ld_include_highint_hdl to ld_include_panic_highint_hdl. However the
change wasn't applied in GNU Make based build system. As a result,
the default interrupt handler was linked and features which depended
on the high-level interrupt didn't work.

Closes https://github.com/espressif/esp-idf/issues/7759
Closes https://github.com/espressif/esp-idf/issues/7447
2021-10-24 11:08:40 +02:00
Alexey Gerenkov
111ba5bbe6 trax: Adds ESP32-S3 support 2021-10-22 23:36:28 +03:00
Alexey Gerenkov
5911eb3f3e apptrace: Adds ESP32-S3 support 2021-10-22 23:24:00 +03:00
28 changed files with 388 additions and 179 deletions

21
.github/workflows/pr_approved.yml vendored Normal file
View File

@ -0,0 +1,21 @@
name: GitHub PR to Internal Codebase Sync
on:
pull_request_review:
types: [submitted]
jobs:
sync_prs_to_internal_codebase:
name: GitHub PR to Internal Codebase Sync
runs-on: ubuntu-latest
if: github.event.review.state == 'approved' && (contains(github.event.review.body, '/rebase') || contains(github.event.review.body, '/merge'))
steps:
- uses: actions/checkout@master
- name: GitHub PR to Internal Codebase Sync
uses: espressif/github-actions/github_pr_to_internal_pr@master
env:
GITLAB_URL: ${{ secrets.GITLAB_URL }}
GITLAB_TOKEN: ${{ secrets.GITLAB_TOKEN }}
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
GIT_CONFIG_NAME: ${{ secrets.GIT_CONFIG_NAME }}
GIT_CONFIG_EMAIL: ${{ secrets.GIT_CONFIG_EMAIL }}
JIRA_PROJECT: IDFGH

View File

@ -1,18 +1,7 @@
#!/usr/bin/env python
#
# Copyright 2021 Espressif Systems (Shanghai) CO LTD
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: Apache-2.0
import argparse
import inspect
@ -88,6 +77,8 @@ class RulesWriter:
RULE_PROTECTED_NO_LABEL = ' - <<: *if-protected-no_label'
RULE_BUILD_ONLY = ' - <<: *if-label-build-only\n' \
' when: never'
RULE_REVERT_BRANCH = ' - <<: *if-revert-branch\n' \
' when: never'
RULE_LABEL_TEMPLATE = ' - <<: *if-label-{0}'
RULE_PATTERN_TEMPLATE = ' - <<: *if-dev-push\n' \
' changes: *patterns-{0}'
@ -211,7 +202,7 @@ class RulesWriter:
return '\n\n'.join(res)
def _format_rule(self, name, cfg): # type: (str, dict) -> str
_rules = []
_rules = [self.RULE_REVERT_BRANCH]
if name.endswith('-production'):
_rules.append(self.RULE_PROTECTED_NO_LABEL)
else:

View File

@ -196,6 +196,9 @@
.if-label-build-only: &if-label-build-only
if: '$CI_JOB_STAGE == "target_test" && $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*For Maintainers: Only Build Tests(?:,[^,\n\r]+)*$/i'
.if-revert-branch: &if-revert-branch
if: '$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME =~ /^revert-/'
#########
# Rules #
#########
@ -359,6 +362,8 @@
.rules:build:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-dev-push
@ -368,6 +373,8 @@
.rules:build:component_ut-esp32:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-component_ut
@ -383,6 +390,8 @@
.rules:build:component_ut-esp32c3:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-component_ut
@ -398,6 +407,8 @@
.rules:build:component_ut-esp32s2:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-component_ut
@ -413,6 +424,8 @@
.rules:build:component_ut-esp32s3:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-component_ut
@ -428,6 +441,8 @@
.rules:build:custom_test-esp32:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-custom_test
@ -442,6 +457,8 @@
.rules:build:custom_test-esp32c3:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-custom_test
@ -455,6 +472,8 @@
.rules:build:custom_test-esp32s2:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-custom_test
@ -468,6 +487,8 @@
.rules:build:custom_test-esp32s3:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-custom_test
@ -481,6 +502,8 @@
.rules:build:docker:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-docker
@ -489,6 +512,8 @@
.rules:build:example_test-esp32:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-example_test
@ -505,6 +530,8 @@
.rules:build:example_test-esp32c3:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-example_test
@ -520,6 +547,8 @@
.rules:build:example_test-esp32s2:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-example_test
@ -535,6 +564,8 @@
.rules:build:example_test-esp32s3:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-example_test
@ -550,6 +581,8 @@
.rules:build:integration_test:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-integration_test
@ -562,6 +595,8 @@
.rules:build:macos:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-macos
@ -571,6 +606,8 @@
.rules:build:target_test:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-component_ut
@ -615,6 +652,8 @@
.rules:build:unit_test-esp32:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-unit_test
@ -628,6 +667,8 @@
.rules:build:unit_test-esp32c3:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-unit_test
@ -641,6 +682,8 @@
.rules:build:unit_test-esp32s2:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-unit_test
@ -654,6 +697,8 @@
.rules:build:unit_test-esp32s3:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-unit_test
@ -667,6 +712,8 @@
.rules:build:windows:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build
- <<: *if-label-windows
@ -677,23 +724,33 @@
.rules:labels:fuzzer_test-weekend_test:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-label-fuzzer_test
- <<: *if-label-weekend_test
.rules:labels:iperf_stress_test:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-label-iperf_stress_test
.rules:labels:nvs_coverage:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-label-nvs_coverage
.rules:labels:weekend_test:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-label-weekend_test
.rules:test:any_test:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -738,6 +795,8 @@
.rules:test:component_ut-esp32:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -750,6 +809,8 @@
.rules:test:component_ut-esp32c3:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -762,6 +823,8 @@
.rules:test:component_ut-esp32s2:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -774,6 +837,8 @@
.rules:test:component_ut-esp32s3:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -786,6 +851,8 @@
.rules:test:custom_test-esp32:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -796,6 +863,8 @@
.rules:test:custom_test-esp32c3:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -806,6 +875,8 @@
.rules:test:custom_test-esp32s2:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -816,6 +887,8 @@
.rules:test:custom_test-esp32s3:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -826,6 +899,8 @@
.rules:test:example_test-esp32:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -838,6 +913,8 @@
.rules:test:example_test-esp32c3:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -850,6 +927,8 @@
.rules:test:example_test-esp32s2:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -862,6 +941,8 @@
.rules:test:example_test-esp32s3:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -874,6 +955,8 @@
.rules:test:host_test:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -883,6 +966,8 @@
.rules:test:integration_test:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -892,6 +977,8 @@
.rules:test:submodule:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -901,6 +988,8 @@
.rules:test:target_test:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -940,6 +1029,8 @@
.rules:test:unit_test-esp32:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -950,6 +1041,8 @@
.rules:test:unit_test-esp32c3:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -960,6 +1053,8 @@
.rules:test:unit_test-esp32s2:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never
@ -970,6 +1065,8 @@
.rules:test:unit_test-esp32s3:
rules:
- <<: *if-revert-branch
when: never
- <<: *if-protected
- <<: *if-label-build-only
when: never

View File

@ -341,7 +341,7 @@ test_app_test_003:
test_app_test_004:
extends: .test_app_esp32s2_template
parallel: 2
parallel: 4
tags:
- ESP32S2
- Example_GENERIC

View File

@ -18,11 +18,13 @@ menu "Application Level Tracing"
config APPTRACE_DEST_TRAX
bool
depends on IDF_TARGET_ARCH_XTENSA && !ESP32_TRAX && !ESP32S2_TRAX
depends on IDF_TARGET_ARCH_XTENSA && !ESP32_TRAX && !ESP32S2_TRAX && !ESP32S3_TRAX
select ESP32_MEMMAP_TRACEMEM
select ESP32S2_MEMMAP_TRACEMEM
select ESP32S3_MEMMAP_TRACEMEM
select ESP32_MEMMAP_TRACEMEM_TWOBANKS
select ESP32S2_MEMMAP_TRACEMEM_TWOBANKS
select ESP32S3_MEMMAP_TRACEMEM_TWOBANKS
default n
help
Enables/disable TRAX tracing HW.

View File

@ -1,3 +1,9 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <sys/param.h>
#include <string.h>
#include "sdkconfig.h"
@ -93,7 +99,8 @@ static esp_err_t esp_apptrace_membufs_swap(esp_apptrace_membufs_proto_data_t *pr
if (proto->hw->host_data_pending() && hdr->block_sz > 0) {
// TODO: add support for multiple blocks from host, currently there is no need for that
uint8_t *p = proto->blocks[new_block_num].start + proto->blocks[new_block_num].sz;
ESP_APPTRACE_LOGD("Recvd %d bytes from host [%x %x %x %x %x %x %x %x .. %x %x %x %x %x %x %x %x]", hdr->block_sz,
ESP_APPTRACE_LOGD("Recvd %d bytes from host (@ 0x%x) [%x %x %x %x %x %x %x %x .. %x %x %x %x %x %x %x %x]",
hdr->block_sz, proto->blocks[new_block_num].start,
*(proto->blocks[new_block_num].start+0), *(proto->blocks[new_block_num].start+1),
*(proto->blocks[new_block_num].start+2), *(proto->blocks[new_block_num].start+3),
*(proto->blocks[new_block_num].start+4), *(proto->blocks[new_block_num].start+5),

View File

@ -1,3 +1,9 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
//
// How It Works
// ************
@ -143,9 +149,9 @@
#include "sdkconfig.h"
#include "soc/soc.h"
#include "soc/dport_access.h"
#if CONFIG_IDF_TARGET_ESP32
#include "soc/dport_reg.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "soc/tracemem_config.h"
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
#include "soc/sensitive_reg.h"
#endif
#include "eri.h"
@ -154,18 +160,6 @@
#include "esp_app_trace_membufs_proto.h"
#include "esp_app_trace_port.h"
// TODO: move these (and same definitions in trax.c to dport_reg.h)
#if CONFIG_IDF_TARGET_ESP32
#define TRACEMEM_MUX_PROBLK0_APPBLK1 0
#define TRACEMEM_MUX_BLK0_ONLY 1
#define TRACEMEM_MUX_BLK1_ONLY 2
#define TRACEMEM_MUX_PROBLK1_APPBLK0 3
#elif CONFIG_IDF_TARGET_ESP32S2
#define TRACEMEM_MUX_BLK0_NUM 19
#define TRACEMEM_MUX_BLK1_NUM 20
#define TRACEMEM_BLK_NUM2ADDR(_n_) (0x3FFB8000UL + 0x4000UL*((_n_)-4))
#endif
// TRAX is disabled, so we use its registers for our own purposes
// | 31..XXXXXX..24 | 23 .(host_connect). 23 | 22 .(host_data). 22| 21..(block_id)..15 | 14..(block_len)..0 |
#define ESP_APPTRACE_TRAX_CTRL_REG ERI_TRAX_DELAYCNT
@ -182,18 +176,6 @@
#define ESP_APPTRACE_TRAX_INITED(_hw_) ((_hw_)->inited & (1 << cpu_hal_get_core_id()))
#if CONFIG_IDF_TARGET_ESP32
static uint8_t * const s_trax_blocks[] = {
(uint8_t *) 0x3FFFC000,
(uint8_t *) 0x3FFF8000
};
#elif CONFIG_IDF_TARGET_ESP32S2
static uint8_t * const s_trax_blocks[] = {
(uint8_t *)TRACEMEM_BLK_NUM2ADDR(TRACEMEM_MUX_BLK0_NUM),
(uint8_t *)TRACEMEM_BLK_NUM2ADDR(TRACEMEM_MUX_BLK1_NUM)
};
#endif
#define ESP_APPTRACE_TRAX_BLOCK_SIZE (0x4000UL)
/** TRAX HW transport data */
@ -223,6 +205,12 @@ static bool esp_apptrace_trax_host_data_pending(void);
const static char *TAG = "esp_apptrace";
static uint8_t * const s_trax_blocks[] = {
(uint8_t *)TRACEMEM_BLK0_ADDR,
(uint8_t *)TRACEMEM_BLK1_ADDR
};
esp_apptrace_hw_t *esp_apptrace_uart_hw_get(int num, void **data)
{
return NULL;
@ -300,6 +288,14 @@ static inline void esp_apptrace_trax_select_memory_block(int block_num)
DPORT_WRITE_PERI_REG(DPORT_TRACEMEM_MUX_MODE_REG, block_num ? TRACEMEM_MUX_BLK0_ONLY : TRACEMEM_MUX_BLK1_ONLY);
#elif CONFIG_IDF_TARGET_ESP32S2
WRITE_PERI_REG(DPORT_PMS_OCCUPY_3_REG, block_num ? BIT(TRACEMEM_MUX_BLK0_NUM-4) : BIT(TRACEMEM_MUX_BLK1_NUM-4));
#elif CONFIG_IDF_TARGET_ESP32S3
// select memory block to be exposed to the TRAX module (accessed by host)
uint32_t block_bits = block_num ? TRACEMEM_CORE0_MUX_BLK_BITS(TRACEMEM_MUX_BLK0_NUM)
: TRACEMEM_CORE0_MUX_BLK_BITS(TRACEMEM_MUX_BLK1_NUM);
block_bits |= block_num ? TRACEMEM_CORE1_MUX_BLK_BITS(TRACEMEM_MUX_BLK0_NUM)
: TRACEMEM_CORE1_MUX_BLK_BITS(TRACEMEM_MUX_BLK1_NUM);
ESP_EARLY_LOGV(TAG, "Select block %d @ %p (bits 0x%x)", block_num, s_trax_blocks[block_num], block_bits);
DPORT_WRITE_PERI_REG(SENSITIVE_INTERNAL_SRAM_USAGE_2_REG, block_bits);
#endif
}

View File

@ -73,6 +73,8 @@ Revision: $Rev: 3734 $
#include "esp32/clk.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/clk.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/clk.h"
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/clk.h"
#endif
@ -142,6 +144,8 @@ extern const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI;
#define SYSVIEW_TIMESTAMP_FREQ (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ * 1000000)
#elif CONFIG_IDF_TARGET_ESP32S2
#define SYSVIEW_TIMESTAMP_FREQ (CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ * 1000000)
#elif CONFIG_IDF_TARGET_ESP32S3
#define SYSVIEW_TIMESTAMP_FREQ (CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ * 1000000)
#endif
#endif // TS_USE_CCOUNT

View File

@ -1,16 +1,9 @@
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/uart_periph.h"
#include "soc/gpio_periph.h"
@ -122,3 +115,26 @@ int esp_gdbstub_readmem(intptr_t addr)
uint32_t shift = (addr & 3) * 8;
return (val_aligned >> shift) & 0xff;
}
int esp_gdbstub_writemem(unsigned int addr, unsigned char data)
{
if (!check_inside_valid_region(addr)) {
/* see esp_cpu_configure_region_protection */
return -1;
}
int *i = (int *)(addr & (~3));
if ((addr & 3) == 0) {
*i = (*i & 0xffffff00) | (data << 0);
}
if ((addr & 3) == 1) {
*i = (*i & 0xffff00ff) | (data << 8);
}
if ((addr & 3) == 2) {
*i = (*i & 0xff00ffff) | (data << 16);
}
if ((addr & 3) == 3) {
*i = (*i & 0x00ffffff) | (data << 24);
}
return 0;
}

View File

@ -1,16 +1,8 @@
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/uart_periph.h"
#include "soc/gpio_periph.h"
@ -122,3 +114,26 @@ int esp_gdbstub_readmem(intptr_t addr)
uint32_t shift = (addr & 3) * 8;
return (val_aligned >> shift) & 0xff;
}
int esp_gdbstub_writemem(unsigned int addr, unsigned char data)
{
if (!check_inside_valid_region(addr)) {
/* see esp_cpu_configure_region_protection */
return -1;
}
int *i = (int *)(addr & (~3));
if ((addr & 3) == 0) {
*i = (*i & 0xffffff00) | (data << 0);
}
if ((addr & 3) == 1) {
*i = (*i & 0xffff00ff) | (data << 8);
}
if ((addr & 3) == 2) {
*i = (*i & 0xff00ffff) | (data << 16);
}
if ((addr & 3) == 3) {
*i = (*i & 0x00ffffff) | (data << 24);
}
return 0;
}

View File

@ -453,7 +453,7 @@ menu "ESP System Settings"
config ESP_DEBUG_STUBS_ENABLE
bool
default COMPILER_OPTIMIZATION_LEVEL_DEBUG
depends on !ESP32_TRAX && !ESP32S2_TRAX
depends on !ESP32_TRAX && !ESP32S2_TRAX && !ESP32S3_TRAX
help
Debug stubs are used by OpenOCD to execute pre-compiled onboard code
which does some useful debugging stuff, e.g. GCOV data dump.

View File

@ -39,10 +39,10 @@ sections_ld := $(COMPONENT_BUILD_DIR)/ld/sections.ld
#specifies its own scripts.
LINKER_SCRIPTS += $(ld_output) $(sections_ld)
#ld_include_panic_highint_hdl is added as an undefined symbol because otherwise the
#linker will ignore panic_highint_hdl.S as it has no other files depending on any
#ld_include_highint_hdl is added as an undefined symbol because otherwise the
#linker will ignore highint_hdl.S as it has no other files depending on any
#symbols in it.
COMPONENT_ADD_LDFLAGS += -u ld_include_panic_highint_hdl \
COMPONENT_ADD_LDFLAGS += -u ld_include_highint_hdl \
$(addprefix -T ,$(LINKER_SCRIPTS)) \
# Preprocess memory.ld.in linker script into memory.ld

View File

@ -1,17 +1,9 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdio.h>
#include "esp_err.h"
@ -20,12 +12,13 @@
#include "trax.h"
#include "hal/trace_ll.h"
#include "soc/dport_reg.h"
#include "soc/tracemem_config.h"
#include "sdkconfig.h"
// Utility functions for enabling TRAX in early startup (hence the use
// of ESP_EARLY_LOGX) in Xtensa targets.
#if defined(CONFIG_ESP32_TRAX) || defined(CONFIG_ESP32S2_TRAX)
#if defined(CONFIG_ESP32_TRAX) || defined(CONFIG_ESP32S2_TRAX) || defined(CONFIG_ESP32S3_TRAX)
#define WITH_TRAX 1
#endif
@ -49,12 +42,33 @@ int trax_enable(trax_ena_select_t which)
trace_ll_mem_enable(0, (which == TRAX_ENA_PRO_APP || which == TRAX_ENA_PRO_APP_SWAP || which == TRAX_ENA_PRO));
trace_ll_mem_enable(1, (which == TRAX_ENA_PRO_APP || which == TRAX_ENA_PRO_APP_SWAP || which == TRAX_ENA_APP));
return ESP_OK;
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
#elif CONFIG_IDF_TARGET_ESP32S2
if (which != TRAX_ENA_PRO) {
return ESP_ERR_INVALID_ARG;
}
trace_ll_set_mem_block(TRACEMEM_MUX_BLK1_NUM);
return ESP_OK;
#elif CONFIG_IDF_TARGET_ESP32S3
if (which == TRAX_ENA_PRO) {
trace_ll_set_mem_block(0, TRACEMEM_MUX_BLK0_NUM);
}
else if (which == TRAX_ENA_APP) {
trace_ll_set_mem_block(1, TRACEMEM_MUX_BLK0_NUM);
}
#ifdef CONFIG_ESP32S3_TRAX_TWOBANKS
else if (which == TRAX_ENA_PRO_APP) {
trace_ll_set_mem_block(0, TRACEMEM_MUX_BLK0_NUM);
trace_ll_set_mem_block(1, TRACEMEM_MUX_BLK1_NUM);
}
else if (which == TRAX_ENA_PRO_APP_SWAP) {
trace_ll_set_mem_block(1, TRACEMEM_MUX_BLK0_NUM);
trace_ll_set_mem_block(0, TRACEMEM_MUX_BLK1_NUM);
}
#endif
else {
return ESP_ERR_INVALID_ARG;
}
return ESP_OK;
#endif
}

View File

@ -72,7 +72,7 @@
#include "soc/rtc.h"
#include "soc/spinlock.h"
#if CONFIG_ESP32_TRAX || CONFIG_ESP32S2_TRAX
#if CONFIG_ESP32_TRAX || CONFIG_ESP32S2_TRAX || CONFIG_ESP32S3_TRAX
#include "trax.h"
#endif
@ -186,10 +186,9 @@ void IRAM_ATTR call_start_cpu1(void)
//has started, but it isn't active *on this CPU* yet.
esp_cache_err_int_init();
#if CONFIG_IDF_TARGET_ESP32
#if CONFIG_ESP32_TRAX_TWOBANKS
#if (CONFIG_IDF_TARGET_ESP32 && CONFIG_ESP32_TRAX_TWOBANKS) || \
(CONFIG_IDF_TARGET_ESP32S3 && CONFIG_ESP32S3_TRAX_TWOBANKS)
trax_start_trace(TRAX_DOWNCOUNT_WORDS);
#endif
#endif
s_cpu_inited[1] = true;
@ -507,9 +506,9 @@ void IRAM_ATTR call_start_cpu0(void)
#endif
//Enable trace memory and immediately start trace.
#if CONFIG_ESP32_TRAX || CONFIG_ESP32S2_TRAX
#if CONFIG_IDF_TARGET_ESP32
#if CONFIG_ESP32_TRAX_TWOBANKS
#if CONFIG_ESP32_TRAX || CONFIG_ESP32S2_TRAX || CONFIG_ESP32S3_TRAX
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S3
#if CONFIG_ESP32_TRAX_TWOBANKS || CONFIG_ESP32S3_TRAX_TWOBANKS
trax_enable(TRAX_ENA_PRO_APP);
#else
trax_enable(TRAX_ENA_PRO);
@ -518,7 +517,7 @@ void IRAM_ATTR call_start_cpu0(void)
trax_enable(TRAX_ENA_PRO);
#endif
trax_start_trace(TRAX_DOWNCOUNT_WORDS);
#endif // CONFIG_ESP32_TRAX || CONFIG_ESP32S2_TRAX
#endif // CONFIG_ESP32_TRAX || CONFIG_ESP32S2_TRAX || CONFIG_ESP32S3_TRAX
esp_clk_init();
esp_perip_clk_init();

View File

@ -487,7 +487,7 @@ static inline void i2s_ll_rx_set_active_chan_mask(i2s_dev_t *hw, uint32_t chan_m
* @param hw Peripheral I2S hardware instance address.
* @param ws_pol_level pin level of WS(output) when receiving left channel data
*/
static inline void i2s_tx_set_ws_idle_pol(i2s_dev_t *hw, int ws_pol_level)
static inline void i2s_ll_tx_set_ws_idle_pol(i2s_dev_t *hw, bool ws_pol_level)
{
hw->tx_conf.tx_ws_idle_pol = ws_pol_level;
}
@ -498,7 +498,7 @@ static inline void i2s_tx_set_ws_idle_pol(i2s_dev_t *hw, int ws_pol_level)
* @param hw Peripheral I2S hardware instance address.
* @param ws_pol_level pin level of WS(input) when receiving left channel data
*/
static inline void i2s_rx_set_ws_idle_pol(i2s_dev_t *hw, int ws_pol_level)
static inline void i2s_ll_rx_set_ws_idle_pol(i2s_dev_t *hw, bool ws_pol_level)
{
hw->rx_conf.rx_ws_idle_pol = ws_pol_level;
}

View File

@ -488,7 +488,7 @@ static inline void i2s_ll_rx_set_active_chan_mask(i2s_dev_t *hw, uint32_t chan_m
* @param hw Peripheral I2S hardware instance address.
* @param ws_pol_level pin level of WS(output) when receiving left channel data
*/
static inline void i2s_tx_set_ws_idle_pol(i2s_dev_t *hw, int ws_pol_level)
static inline void i2s_ll_tx_set_ws_idle_pol(i2s_dev_t *hw, bool ws_pol_level)
{
hw->tx_conf.tx_ws_idle_pol = ws_pol_level;
}
@ -499,7 +499,7 @@ static inline void i2s_tx_set_ws_idle_pol(i2s_dev_t *hw, int ws_pol_level)
* @param hw Peripheral I2S hardware instance address.
* @param ws_pol_level pin level of WS(input) when receiving left channel data
*/
static inline void i2s_rx_set_ws_idle_pol(i2s_dev_t *hw, int ws_pol_level)
static inline void i2s_ll_rx_set_ws_idle_pol(i2s_dev_t *hw, bool ws_pol_level)
{
hw->rx_conf.rx_ws_idle_pol = ws_pol_level;
}

View File

@ -490,7 +490,7 @@ static inline void i2s_ll_rx_set_active_chan_mask(i2s_dev_t *hw, uint32_t chan_m
* @param hw Peripheral I2S hardware instance address.
* @param ws_pol_level pin level of WS(output) when receiving left channel data
*/
static inline void i2s_tx_set_ws_idle_pol(i2s_dev_t *hw, int ws_pol_level)
static inline void i2s_ll_tx_set_ws_idle_pol(i2s_dev_t *hw, bool ws_pol_level)
{
hw->tx_conf.tx_ws_idle_pol = ws_pol_level;
}
@ -501,7 +501,7 @@ static inline void i2s_tx_set_ws_idle_pol(i2s_dev_t *hw, int ws_pol_level)
* @param hw Peripheral I2S hardware instance address.
* @param ws_pol_level pin level of WS(input) when receiving left channel data
*/
static inline void i2s_rx_set_ws_idle_pol(i2s_dev_t *hw, int ws_pol_level)
static inline void i2s_ll_rx_set_ws_idle_pol(i2s_dev_t *hw, bool ws_pol_level)
{
hw->rx_conf.rx_ws_idle_pol = ws_pol_level;
}

View File

@ -1,24 +1,23 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdlib.h>
#include "soc/dport_reg.h"
#include "soc/tracemem_config.h"
static inline void trace_ll_set_mem_block(int block)
static inline void trace_ll_set_mem_block(int cpu, int block)
{
// IDF-1785
abort();
uint32_t block_bits = 0;
if (cpu == 0) {
block_bits = TRACEMEM_CORE0_MUX_BLK_BITS(block);
} else {
block_bits = TRACEMEM_CORE1_MUX_BLK_BITS(block);
}
DPORT_SET_PERI_REG_MASK(SENSITIVE_INTERNAL_SRAM_USAGE_2_REG, block_bits);
}

View File

@ -168,6 +168,10 @@ void i2s_hal_tx_set_common_mode(i2s_hal_context_t *hal, const i2s_hal_config_t *
i2s_ll_mclk_use_tx_clk(hal->dev);
i2s_ll_tx_set_active_chan_mask(hal->dev, hal_cfg->chan_mask);
// In TDM mode(more than 2 channels), the ws polarity should be high first.
if (hal_cfg->total_chan > 2) {
i2s_ll_tx_set_ws_idle_pol(hal->dev, true);
}
i2s_ll_tx_enable_left_align(hal->dev, hal_cfg->left_align);
i2s_ll_tx_enable_big_endian(hal->dev, hal_cfg->big_edin);
i2s_ll_tx_set_bit_order(hal->dev, hal_cfg->bit_order_msb);
@ -190,6 +194,10 @@ void i2s_hal_rx_set_common_mode(i2s_hal_context_t *hal, const i2s_hal_config_t *
i2s_ll_mclk_use_rx_clk(hal->dev);
i2s_ll_rx_set_active_chan_mask(hal->dev, hal_cfg->chan_mask);
// In TDM mode(more than 2 channels), the ws polarity should be high first.
if (hal_cfg->total_chan > 2) {
i2s_ll_rx_set_ws_idle_pol(hal->dev, true);
}
i2s_ll_rx_enable_left_align(hal->dev, hal_cfg->left_align);
i2s_ll_rx_enable_big_endian(hal->dev, hal_cfg->big_edin);
i2s_ll_rx_set_bit_order(hal->dev, hal_cfg->bit_order_msb);

View File

@ -1,16 +1,8 @@
// Copyright 2010-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef BOOTLOADER_BUILD
#include <stdlib.h>
@ -18,6 +10,7 @@
#include "sdkconfig.h"
#include "soc/soc.h"
#include "soc/tracemem_config.h"
#include "heap_memory_layout.h"
#include "esp_heap_caps.h"
@ -145,7 +138,8 @@ SOC_RESERVE_MEMORY_REGION( SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_HIGH, extram_dat
// Blocks 19 and 20 may be reserved for the trace memory
#if CONFIG_ESP32S2_TRACEMEM_RESERVE_DRAM > 0
SOC_RESERVE_MEMORY_REGION(0x3fffc000 - CONFIG_ESP32S2_TRACEMEM_RESERVE_DRAM, 0x3fffc000, trace_mem);
SOC_RESERVE_MEMORY_REGION(TRACEMEM_BLK0_ADDR, TRACEMEM_BLK0_ADDR + CONFIG_ESP32S2_TRACEMEM_RESERVE_DRAM / 2, trace_mem0);
SOC_RESERVE_MEMORY_REGION(TRACEMEM_BLK1_ADDR, TRACEMEM_BLK1_ADDR + CONFIG_ESP32S2_TRACEMEM_RESERVE_DRAM / 2, trace_mem1);
#endif
// RTC Fast RAM region

View File

@ -11,6 +11,8 @@
#include "sdkconfig.h"
#include "esp_attr.h"
#include "soc/soc.h"
#include "soc/dport_reg.h"
#include "soc/tracemem_config.h"
#include "heap_memory_layout.h"
#include "esp_heap_caps.h"
@ -107,7 +109,8 @@ SOC_RESERVE_MEMORY_REGION( SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_HIGH, extram_dat
#endif
#if CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM > 0
SOC_RESERVE_MEMORY_REGION(0x3fffc000 - CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM, 0x3fffc000, trace_mem);
SOC_RESERVE_MEMORY_REGION(TRACEMEM_BLK0_ADDR, TRACEMEM_BLK0_ADDR + CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM / 2, trace_mem0);
SOC_RESERVE_MEMORY_REGION(TRACEMEM_BLK1_ADDR, TRACEMEM_BLK1_ADDR + CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM / 2, trace_mem1);
#endif
// RTC Fast RAM region

View File

@ -0,0 +1,17 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#define TRACEMEM_BLK0_ADDR 0x3FFFC000UL
#define TRACEMEM_BLK1_ADDR 0x3FFF8000UL
#ifdef __cplusplus
}
#endif

View File

@ -1,16 +1,8 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _SOC_DPORT_REG_H_
#define _SOC_DPORT_REG_H_
@ -25,10 +17,6 @@ extern "C" {
#define DPORT_DATE_REG SYSTEM_DATE_REG
#define TRACEMEM_MUX_BLK0_NUM 19
#define TRACEMEM_MUX_BLK1_NUM 20
#define TRACEMEM_BLK_NUM2ADDR(_n_) (0x3FFB8000UL + 0x4000UL*((_n_)-4))
#ifndef __ASSEMBLER__
#include "dport_access.h"
#endif

View File

@ -0,0 +1,21 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#define TRACEMEM_MUX_BLK0_NUM 19
#define TRACEMEM_MUX_BLK1_NUM 20
#define TRACEMEM_BLK_NUM2ADDR(_n_) (0x3FFB8000UL + 0x4000UL*((_n_)-4))
#define TRACEMEM_BLK0_ADDR TRACEMEM_BLK_NUM2ADDR(TRACEMEM_MUX_BLK0_NUM)
#define TRACEMEM_BLK1_ADDR TRACEMEM_BLK_NUM2ADDR(TRACEMEM_MUX_BLK1_NUM)
#ifdef __cplusplus
}
#endif

View File

@ -1,16 +1,8 @@
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "soc.h"
@ -25,10 +17,6 @@ extern "C" {
#define DPORT_DATE_REG SYSTEM_DATE_REG
#define TRACEMEM_MUX_BLK0_NUM 19
#define TRACEMEM_MUX_BLK1_NUM 20
#define TRACEMEM_BLK_NUM2ADDR(_n_) (0x3FFB8000UL + 0x4000UL*((_n_)-4))
#ifndef __ASSEMBLER__
#include "dport_access.h"
#endif

View File

@ -0,0 +1,39 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#define TRACEMEM_MUX_BLK0_NUM 22
#define TRACEMEM_MUX_BLK1_NUM 23
#if (TRACEMEM_MUX_BLK0_NUM < 6) || (TRACEMEM_MUX_BLK0_NUM > 29)
#error Invalid TRAX block 0 num!
#endif
#if (TRACEMEM_MUX_BLK1_NUM < 6) || (TRACEMEM_MUX_BLK1_NUM > 29)
#error Invalid TRAX block 1 num!
#endif
#if TRACEMEM_MUX_BLK0_NUM < 6
#define TRACEMEM_BLK0_ADDR (0x3FC88000UL + 0x2000UL*(TRACEMEM_MUX_BLK0_NUM-2UL))
#elif TRACEMEM_MUX_BLK0_NUM < 30
#define TRACEMEM_BLK0_ADDR (0x3FC90000UL + 0x4000UL*(TRACEMEM_MUX_BLK0_NUM-6UL))
#endif
#if TRACEMEM_MUX_BLK1_NUM < 6
#define TRACEMEM_BLK1_ADDR (0x3FC88000UL + 0x2000UL*(TRACEMEM_MUX_BLK1_NUM-2UL))
#elif TRACEMEM_MUX_BLK1_NUM < 30
#define TRACEMEM_BLK1_ADDR (0x3FC90000UL + 0x4000UL*(TRACEMEM_MUX_BLK1_NUM-6UL))
#endif
#define TRACEMEM_MUX_BLK_ALLOC(_n_) (((_n_)-2UL)%4UL)
#define TRACEMEM_CORE0_MUX_BLK_BITS(_n_) (BIT(((_n_)-2UL)/4UL) | (TRACEMEM_MUX_BLK_ALLOC(_n_) << 14))
#define TRACEMEM_CORE1_MUX_BLK_BITS(_n_) (BIT(7UL+(((_n_)-2UL)/4UL)) | (TRACEMEM_MUX_BLK_ALLOC(_n_) << 16))
#ifdef __cplusplus
}
#endif

View File

@ -1,8 +1,5 @@
.gitlab/ci/dependencies/generate_rules.py
components/app_trace/app_trace_membufs_proto.c
components/app_trace/port/include/esp_app_trace_port.h
components/app_trace/port/riscv/port.c
components/app_trace/port/xtensa/port.c
components/app_trace/private_include/esp_app_trace_membufs_proto.h
components/app_trace/sys_view/Config/Global.h
components/app_trace/sys_view/Config/SEGGER_RTT_Conf.h
@ -786,9 +783,7 @@ components/esp_event/private_include/esp_event_private.h
components/esp_event/test/test_default_loop.c
components/esp_event/test/test_event.c
components/esp_gdbstub/esp32/gdbstub_target_config.h
components/esp_gdbstub/esp32c3/gdbstub_esp32c3.c
components/esp_gdbstub/esp32c3/gdbstub_target_config.h
components/esp_gdbstub/esp32h2/gdbstub_esp32h2.c
components/esp_gdbstub/esp32h2/gdbstub_target_config.h
components/esp_gdbstub/esp32s2/gdbstub_target_config.h
components/esp_gdbstub/esp32s3/gdbstub_target_config.h
@ -1114,7 +1109,6 @@ components/esp_system/panic.c
components/esp_system/port/arch/riscv/expression_with_stack.c
components/esp_system/port/arch/xtensa/debug_helpers.c
components/esp_system/port/arch/xtensa/expression_with_stack.c
components/esp_system/port/arch/xtensa/trax.c
components/esp_system/port/brownout.c
components/esp_system/port/include/esp_clk_internal.h
components/esp_system/port/include/port/panic_funcs.h
@ -1522,7 +1516,6 @@ components/hal/esp32s3/include/hal/spi_flash_ll.h
components/hal/esp32s3/include/hal/spi_ll.h
components/hal/esp32s3/include/hal/spimem_flash_ll.h
components/hal/esp32s3/include/hal/systimer_ll.h
components/hal/esp32s3/include/hal/trace_ll.h
components/hal/esp32s3/include/hal/twai_ll.h
components/hal/esp32s3/include/hal/uart_ll.h
components/hal/esp32s3/include/hal/uhci_ll.h
@ -1655,7 +1648,6 @@ components/heap/multi_heap_poisoning.c
components/heap/port/esp32/memory_layout.c
components/heap/port/esp32c3/memory_layout.c
components/heap/port/esp32h2/memory_layout.c
components/heap/port/esp32s2/memory_layout.c
components/heap/port/memory_layout_utils.c
components/heap/test/test_aligned_alloc_caps.c
components/heap/test/test_allocator_timings.c
@ -2339,7 +2331,6 @@ components/soc/esp32s2/include/soc/dac_channel.h
components/soc/esp32s2/include/soc/dedic_gpio_reg.h
components/soc/esp32s2/include/soc/dedic_gpio_struct.h
components/soc/esp32s2/include/soc/dport_access.h
components/soc/esp32s2/include/soc/dport_reg.h
components/soc/esp32s2/include/soc/efuse_reg.h
components/soc/esp32s2/include/soc/efuse_struct.h
components/soc/esp32s2/include/soc/extmem_reg.h
@ -2444,7 +2435,6 @@ components/soc/esp32s3/include/soc/clkout_channel.h
components/soc/esp32s3/include/soc/cpu.h
components/soc/esp32s3/include/soc/cpu_caps.h
components/soc/esp32s3/include/soc/dport_access.h
components/soc/esp32s3/include/soc/dport_reg.h
components/soc/esp32s3/include/soc/efuse_reg.h
components/soc/esp32s3/include/soc/efuse_struct.h
components/soc/esp32s3/include/soc/extmem_reg.h

View File

@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-S2 |
| ----------------- | ----- | -------- |
| Supported Targets | ESP32 | ESP32-S2 | ESP32-S3 | ESP32-C3 | ESP32-H2 |
| ----------------- | ----- | -------- | -------- | -------- | -------- |
# Building
Several configurations are provided as `sdkconfig.ci.XXX` and serve as a template.