mirror of
https://github.com/espressif/esp-idf
synced 2025-03-09 17:19:09 -04:00
1e11340061
This commit enabled RSA based secure boot scheme for ESP32C5 ECO1 module. This update also adds a check to ensure the selected secure boot scheme is valid for ECO0 modules.
61 lines
1.3 KiB
C
61 lines
1.3 KiB
C
/*
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* SPDX-FileCopyrightText: 2018-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include "esp_err.h"
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#include "esp_image_format.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**@{*/
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/**
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* @brief labels from bootloader linker script: bootloader.ld
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*
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*/
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extern int _bss_start;
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extern int _bss_end;
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extern int _data_start;
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extern int _data_end;
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/**@}*/
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/**
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* @brief bootloader image header
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*
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*/
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extern esp_image_header_t bootloader_image_hdr;
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/**@{*/
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/**
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* @brief Common initialization steps that are applied to all targets.
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*
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*/
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esp_err_t bootloader_read_bootloader_header(void);
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esp_err_t bootloader_check_bootloader_validity(void);
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void bootloader_clear_bss_section(void);
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void bootloader_config_wdt(void);
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void bootloader_enable_random(void);
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void bootloader_print_banner(void);
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/**@}*/
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/* @brief Prepares hardware for work.
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*
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* Setting up:
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* - Disable Cache access for both CPUs;
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* - Initialise cache mmu;
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* - Setting up pins and mode for SD, SPI, UART, Clocking.
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* @return ESP_OK - If the setting is successful.
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* ESP_FAIL - If the setting is not successful.
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* ESP_ERR_NOT_SUPPORTED - If selected secure boot scheme is not supported.
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*/
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esp_err_t bootloader_init(void);
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#ifdef __cplusplus
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}
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#endif
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