mirror of
https://github.com/espressif/esp-idf
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72 lines
2.1 KiB
C
72 lines
2.1 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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// The HAL layer for SPI (common part)
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#include "hal/spi_hal.h"
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#include "soc/soc_caps.h"
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#include "soc/clk_tree_defs.h"
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void spi_hal_init(spi_hal_context_t *hal, uint32_t host_id)
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{
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memset(hal, 0, sizeof(spi_hal_context_t));
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spi_dev_t *hw = SPI_LL_GET_HW(host_id);
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hal->hw = hw;
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spi_ll_master_init(hw);
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//Force a transaction done interrupt. This interrupt won't fire yet because
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//we initialized the SPI interrupt as disabled. This way, we can just
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//enable the SPI interrupt and the interrupt handler will kick in, handling
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//any transactions that are queued.
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spi_ll_enable_int(hw);
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spi_ll_set_int_stat(hw);
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spi_ll_set_mosi_delay(hw, 0, 0);
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spi_ll_apply_config(hw);
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}
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void spi_hal_config_io_default_level(spi_hal_context_t *hal, bool level)
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{
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#if SPI_LL_MOSI_FREE_LEVEL
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// Config default output data line level when don't have transaction
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spi_ll_set_mosi_free_level(hal->hw, level);
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spi_ll_apply_config(hal->hw);
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#endif
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}
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void spi_hal_deinit(spi_hal_context_t *hal)
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{
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spi_dev_t *hw = hal->hw;
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if (hw) {
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spi_ll_disable_int(hw);
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spi_ll_clear_int_stat(hw);
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}
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}
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#if SOC_SPI_SCT_SUPPORTED
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void spi_hal_sct_init(spi_hal_context_t *hal)
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{
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spi_ll_conf_state_enable(hal->hw, true);
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spi_ll_set_magic_number(hal->hw, SPI_LL_SCT_MAGIC_NUMBER);
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spi_ll_disable_int(hal->hw); //trans_done intr enabled in `add device` phase, sct mode should use sct_trans_done only
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spi_ll_enable_intr(hal->hw, SPI_LL_INTR_SEG_DONE);
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spi_ll_set_intr(hal->hw, SPI_LL_INTR_SEG_DONE);
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}
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void spi_hal_sct_deinit(spi_hal_context_t *hal)
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{
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spi_ll_conf_state_enable(hal->hw, false);
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spi_ll_disable_intr(hal->hw, SPI_LL_INTR_SEG_DONE);
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spi_ll_clear_intr(hal->hw, SPI_LL_INTR_SEG_DONE);
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spi_ll_clear_int_stat(hal->hw);
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spi_ll_enable_int(hal->hw); //recover trans_done intr
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}
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#endif //#if SOC_SPI_SCT_SUPPORTED
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int spi_hal_master_cal_clock(int fapb, int hz, int duty_cycle)
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{
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return spi_ll_master_cal_clock(fapb, hz, duty_cycle, NULL);
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}
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