Li Shuai 9b99fc9033 cpu retention: software cpu retention support for esp32c6 ...

cpu retention: add riscv core sleep critical and non-critical register layout structure definition

cpu retention: add assembly subroutine for cpu critical register backup and restore

cpu retention: add cpu core critical register context backup and restore support

cpu retention: add cpu core non-critical register context backup and restore support

cpu retention: add interrupt priority register context backup and restore support

cpu retention: add cache config register context backup and restore support

cpu retention: add plic interrupt register context backup and restore support

cpu retention: add clint interrupt register context backup and restore support

cpu retention: wait icache state idle before pmu enter sleep

2023-01-31 22:12:54 +08:00

..

include

cpu retention: software cpu retention support for esp32c6

2023-01-31 22:12:54 +08:00

CMakeLists.txt

G0: RISC-V targets have now an independent G0 layer

2022-06-14 15:00:53 +08:00

instruction_decode.c

interrupt: filter out reserved int number by decoding risc-v JAL instruction

2021-01-05 15:39:46 +08:00

interrupt.c

riscv: Remove redundant riscv_interrupts.h header

2022-09-16 16:45:43 +08:00

linker.lf

arch: move stdatomic

2021-02-26 18:40:00 +08:00

project_include.cmake

build: Adds support for universal Clang toolchain

2022-11-23 13:25:16 +03:00

vectors.S

riscv: Use 'li' instead of 'la' for loading peripheral reg address

2022-12-06 21:54:50 +03:00