Ivan Grokhotkov 099565635b soc: correct values of SOC_BYTE_ACCESSIBLE_LOW, SOC_MEM_INTERNAL_LOW ...

Internal byte accessible memory starts with Internal ROM 1 at 0x3FF90000.
Region of RTC fast memory starting at 0x3FF80000 is not used in IDF as
it is mapped to PRO CPU only.

2017-10-19 21:35:21 +08:00

..

include/soc

soc: correct values of SOC_BYTE_ACCESSIBLE_LOW, SOC_MEM_INTERNAL_LOW

2017-10-19 21:35:21 +08:00

test

soc: implement XTAL frequency detection

2017-04-24 15:29:30 +08:00

cpu_util.c

soc: add source code of rtc_clk, rtc_pm

2017-04-11 15:45:54 +08:00

i2c_apll.h

soc: add source code of rtc_clk, rtc_pm

2017-04-11 15:45:54 +08:00

i2c_bbpll.h

soc: add source code of rtc_clk, rtc_pm

2017-04-11 15:45:54 +08:00

i2c_rtc_clk.h

soc: add source code of rtc_clk, rtc_pm

2017-04-11 15:45:54 +08:00

rtc_clk.c

fix(global, log): fix esp_log(_early)_timestamp readings after startup by correct the CCOUNT register when switching CPU clock.

2017-09-26 15:18:17 +08:00

rtc_init.c

soc: fix typo in register name

2017-07-06 12:36:06 +08:00

rtc_pm.c

soc: add source code of rtc_clk, rtc_pm

2017-04-11 15:45:54 +08:00

rtc_sleep.c

sleep: add light sleep, factor out APIs common for deep/light sleep

2017-09-01 10:36:14 +08:00

rtc_time.c

Add support for 32k XTAL as RTC_SLOW_CLK source

2017-04-26 12:43:22 +08:00

soc_log.h

soc: add source code of rtc_clk, rtc_pm

2017-04-11 15:45:54 +08:00

soc_memory_layout.c

Add logic to make external RAM usable with malloc()

2017-09-28 17:17:50 +08:00