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https://github.com/espressif/esp-idf
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1ebeea7763
1. Fix incorrect meaning of SDMMC.clock bits, synchronize the names with the TRM. 2. Choose input and output phases to satisfy typical timing requirements. 3. Move use_hold_reg setting into the host driver, since it is related to timing. Closes https://github.com/espressif/esp-idf/issues/8521 Related to https://github.com/espressif/esp-idf/issues/8257
soc
The soc component provides hardware description for targets supported by ESP-IDF.
- `xxx_reg.h` - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h` - features/capabilities of the hardware
- `xxx_pins.h` - pin definitions
- `xxx_periph.h/*.c` - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware