mirror of
https://github.com/espressif/esp-idf
synced 2025-03-24 00:19:15 -04:00
24011ddd05
1. timer reg file for both time group 0 and time group 1, not only timer group 0 2. fix bug that io mux header file mismatch with chip 3. fix bug that some BASE address not correct 4. add some static function to eagle.fpga32.rom.addr.v7.ld 5. add interrupts usage table 6. add some comments for rom code functions
91 lines
2.2 KiB
C
91 lines
2.2 KiB
C
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef _ROM_EFUSE_H_
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#define _ROM_EFUSE_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** \defgroup efuse_APIs efuse APIs
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* @brief ESP32 efuse read/write APIs
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* @attention
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*
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*/
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/** @addtogroup efuse_APIs
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* @{
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*/
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/**
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* @brief Do a efuse read operation, to update the efuse value to efuse read registers.
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*
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* @param null
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*
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* @return null
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*/
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void ets_efuse_read_op(viid);
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/**
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* @brief Do a efuse write operation, to update efuse write registers to efuse, then you need call ets_efuse_read_op again.
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*
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* @param null
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*
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* @return null
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*/
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void ets_efuse_program_op(void);
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/**
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* @brief Read 8M Analog Clock value(8 bit) in efuse, the analog clock will not change with temperature.
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* It can be used to test the external xtal frequency, do not touch this efuse field.
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*
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* @param null
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*
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* @return u32: 1 for 100KHZ.
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*/
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u32 ets_efuse_get_8M_clock(void);
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/**
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* @brief Read spi pad configuration, show gpio number of flash pad, includes 5 pads.
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*
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* @param null
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*
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* @return uint32_t: 0, invalid, flash pad decided by strapping
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* else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
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*/
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uint32_t ets_efuse_get_spiconfig(void);
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/**
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* @brief A crc8 algorithm used in efuse check.
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*
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* @param unsigned char const * p : Pointer to original data.
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*
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* @param unsigned int len : Data length in byte.
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*
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* @return unsigned char: Crc value.
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*/
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unsigned char esp_crc8(unsigned char const * p, unsigned int len);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ROM_EFUSE_H_ */
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