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esp-idf/components/hal/esp32c2
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Omar Chebib 5bcd9b2db8 G0: RISC-V targets have now an independent G0 layer 
G0 doesn't depend on any G1+ layer for RISC-V based targets
2022-06-14 15:00:53 +08:00
..
include/hal
G0: RISC-V targets have now an independent G0 layer
2022-06-14 15:00:53 +08:00
brownout_hal.c
G0: RISC-V targets have now an independent G0 layer
2022-06-14 15:00:53 +08:00
efuse_hal.c
efuse_hal: Fix error bits for BLOCK0
2022-05-24 03:28:57 +08:00
rtc_cntl_hal.c
i2c: support esp32c2
2022-02-23 15:19:37 +08:00