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Activated AES, RSA and SHA hardware acceleration for esp32s2 and enabled related unit tests. Updated with changes made for ESP32 from 0a04034, 961f59f and caea288. Added performance targets for esp32s2beta Closes IDF-757
3 lines
74 B
Plaintext
3 lines
74 B
Plaintext
CONFIG_ESP32S2_DEFAULT_CPU_FREQ_240=y
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CONFIG_ESP32S2_ULP_COPROC_ENABLED=y
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