mirror of
https://github.com/espressif/esp-idf
synced 2025-03-10 01:29:21 -04:00
92d575379f
esp_ptr_executable does not consider that the PSRAM and FLASH memory mapping are not always matching. Added a "pointer is in PSRAM" specific check in the logic to fix the issue.
95 lines
2.7 KiB
C
95 lines
2.7 KiB
C
/*
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* SPDX-FileCopyrightText: 2010-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdlib.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include "sdkconfig.h"
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#include "soc/soc.h"
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#include "soc/soc_caps.h"
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#include "esp_attr.h"
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#include "esp_memory_utils.h"
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#if CONFIG_SPIRAM
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#include "esp_private/esp_psram_extram.h"
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#endif
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bool esp_ptr_dma_ext_capable(const void *p)
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{
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#if !SOC_PSRAM_DMA_CAPABLE
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return false;
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#endif //!SOC_PSRAM_DMA_CAPABLE
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#if CONFIG_SPIRAM
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return esp_psram_check_ptr_addr(p);
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#else
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return false;
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#endif //CONFIG_SPIRAM
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}
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bool esp_ptr_executable(const void *p)
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{
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intptr_t ip = (intptr_t) p;
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return (ip >= SOC_IROM_LOW && ip < SOC_IROM_HIGH)
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|| (ip >= SOC_IRAM_LOW && ip < SOC_IRAM_HIGH)
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|| (ip >= SOC_IROM_MASK_LOW && ip < SOC_IROM_MASK_HIGH)
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#if SOC_SPIRAM_SUPPORTED && CONFIG_SPIRAM
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|| esp_ptr_external_ram(p)
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#endif
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#if defined(SOC_CACHE_APP_LOW) && defined(CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE)
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|| (ip >= SOC_CACHE_APP_LOW && ip < SOC_CACHE_APP_HIGH)
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#endif
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#if SOC_RTC_FAST_MEM_SUPPORTED
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|| (ip >= SOC_RTC_IRAM_LOW && ip < SOC_RTC_IRAM_HIGH)
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#endif
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;
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}
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bool esp_ptr_byte_accessible(const void *p)
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{
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intptr_t ip = (intptr_t) p;
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bool r;
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r = (ip >= SOC_BYTE_ACCESSIBLE_LOW && ip < SOC_BYTE_ACCESSIBLE_HIGH);
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#if CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
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/* For ESP32 case, RTC fast memory is accessible to PRO cpu only and hence
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* for single core configuration (where it gets added to system heap) following
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* additional check is required */
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r |= (ip >= SOC_RTC_DRAM_LOW && ip < SOC_RTC_DRAM_HIGH);
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#endif
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#if CONFIG_SPIRAM
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r |= esp_psram_check_ptr_addr(p);
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#endif
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#if CONFIG_ESP32S3_DATA_CACHE_16KB
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/* For ESP32-S3, when the DCACHE size is set to 16 kB, the unused 48 kB is
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* added to the heap in 2 blocks of 32 kB (from 0x3FCF0000) and 16 kB
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* (from 0x3C000000 (SOC_DROM_LOW) - 0x3C004000).
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* Though this memory lies in the external memory vaddr, it is no different
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* from the internal RAM in terms of hardware attributes. It is a part of
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* the internal RAM when added to the heap and is byte-accessible .*/
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r |= (ip >= SOC_DROM_LOW && ip < (SOC_DROM_LOW + 0x4000));
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#endif
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return r;
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}
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bool esp_ptr_external_ram(const void *p)
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{
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#if !SOC_SPIRAM_SUPPORTED
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return false;
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#endif //!SOC_SPIRAM_SUPPORTED
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#if CONFIG_SPIRAM
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return esp_psram_check_ptr_addr(p);
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#else
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return false;
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#endif //CONFIG_SPIRAM
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}
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#if CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM
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bool esp_stack_ptr_in_extram(uint32_t sp)
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{
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//Check if stack ptr is on PSRAM, and 16 byte aligned.
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return (esp_psram_check_ptr_addr((void *)sp) && ((sp & 0xF) == 0));
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}
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#endif
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