mirror of
https://github.com/espressif/esp-idf
synced 2025-03-10 01:29:21 -04:00
83 lines
2.3 KiB
C
83 lines
2.3 KiB
C
/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "esp_private/esp_modem_clock.h"
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#include "soc/soc.h"
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#include "soc/periph_defs.h"
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#include "hal/ieee802154_ll.h"
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#include "esp_coex_i154.h"
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#include "esp_ieee802154_util.h"
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uint8_t ieee802154_freq_to_channel(uint8_t freq)
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{
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return (freq - 3) / 5 + IEEE802154_OQPSK_2P4G_CHANNEL_MIN;
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}
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uint8_t ieee802154_channel_to_freq(uint8_t channel)
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{
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return (channel - IEEE802154_OQPSK_2P4G_CHANNEL_MIN) * 5 + 3;
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}
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#if !CONFIG_IEEE802154_TEST && (CONFIG_ESP_COEX_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE)
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esp_ieee802154_coex_config_t s_coex_config = {
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.idle = IEEE802154_IDLE,
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.txrx = IEEE802154_LOW,
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.txrx_at = IEEE802154_MIDDLE,
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};
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void ieee802154_set_coex_config(esp_ieee802154_coex_config_t config)
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{
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s_coex_config.idle = config.idle;
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s_coex_config.txrx = config.txrx;
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s_coex_config.txrx_at = config.txrx_at;
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}
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esp_ieee802154_coex_config_t ieee802154_get_coex_config(void)
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{
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return s_coex_config;
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}
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void ieee802154_set_txrx_pti(ieee802154_txrx_scene_t txrx_scene)
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{
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switch (txrx_scene) {
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case IEEE802154_SCENE_IDLE:
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esp_coex_ieee802154_txrx_pti_set(s_coex_config.idle);
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break;
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case IEEE802154_SCENE_TX:
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case IEEE802154_SCENE_RX:
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esp_coex_ieee802154_txrx_pti_set(s_coex_config.txrx);
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break;
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case IEEE802154_SCENE_TX_AT:
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case IEEE802154_SCENE_RX_AT:
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esp_coex_ieee802154_txrx_pti_set(s_coex_config.txrx_at);
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break;
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default:
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assert(false);
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break;
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}
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}
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#endif // !CONFIG_IEEE802154_TEST && CONFIG_ESP_COEX_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
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// TZ-97: implement these two functions using ETM common interface
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void ieee802154_etm_channel_clear(uint32_t channel)
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{
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if (!(REG_READ(ETM_CHEN_AD0_REG) & (1 << channel))) {
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REG_WRITE(ETM_CHENCLR_AD0_REG, (REG_READ(ETM_CHENCLR_AD0_REG)) | 1 << channel);
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}
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}
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void ieee802154_etm_set_event_task(uint32_t channel, uint32_t event, uint32_t task)
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{
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ieee802154_etm_channel_clear(channel);
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REG_WRITE((ETM_CH0_EVT_ID_REG + ETM_CH_OFFSET * channel), event);
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REG_WRITE((ETM_CH0_TASK_ID_REG + ETM_CH_OFFSET * channel), task);
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REG_WRITE(ETM_CHENSET_AD0_REG, (REG_READ(ETM_CHENSET_AD0_REG) | 1 << channel));
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}
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