Aditya Patwardhan e09d50d244
feat(soc): Updated soc cap for flash encryption
1) In the ESP32-P4 SoC, we have an eFuse to disable the MSPI access
    when in download mode. This commit adds relevant soc cap for esp32p4
    chip.
    2) Added FE related soc caps
    3) Removed unwanted cap from soc_caps
    4) esp_hw_support: Enable flash encryption related ll APIs for esp32p4
2023-12-05 11:03:48 +05:30
..

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware