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Merge branch 'change/ble_update_lib_20250103_v5.2' into 'release/v5.2'

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change(ble): [AUTO_MR] 20250103 - Update ESP BLE Controller Lib (v5.2)

See merge request espressif/esp-idf!36371
This commit is contained in:
Jiang Jiang Jian 2025-01-17 10:44:25 +08:00
commit 72d91b5117
12 changed files with 139 additions and 37 deletions
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2
components/bt/CMakeLists.txt
View File

@ -893,7 +893,7 @@ if(CONFIG_BT_ENABLED)
if(CONFIG_IDF_TARGET_ESP32C6)
add_prebuilt_library(libble_app "controller/lib_${target}/${target}-bt-lib/esp32c6/libble_app.a")
else()
if(CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY)
if(CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY AND CONFIG_IDF_TARGET_ESP32C2)
add_prebuilt_library(libble_app "controller/lib_${target}/${target}-bt-lib/libble_app_flash.a")
else()
add_prebuilt_library(libble_app "controller/lib_${target}/${target}-bt-lib/libble_app.a")

32
components/bt/controller/esp32c2/bt.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -1145,12 +1145,20 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
switch (power_type) {
case ESP_BLE_PWR_TYPE_DEFAULT:
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_ADV:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_ADV, 0xFF, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_SCAN:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
case ESP_BLE_PWR_TYPE_CONN_HDL2:
@ -1177,9 +1185,13 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
esp_err_t stat = ESP_FAIL;
switch (power_type) {
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
@ -1202,11 +1214,15 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
int tx_level = 0;
switch (power_type) {
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_PWR_TYPE_ADV:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_ADV, 0);
break;
case ESP_BLE_PWR_TYPE_SCAN:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0);
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
case ESP_BLE_PWR_TYPE_CONN_HDL2:
@ -1235,9 +1251,11 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
switch (power_type) {
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:

8
components/bt/controller/esp32c6/Kconfig.in
View File

@ -697,3 +697,11 @@ config BT_LE_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS
Enabling this option will add stricter verification of the Access Address in the CONNECT_IND PDU.
This improves security by ensuring that only connection requests with valid Access Addresses are accepted.
If disabled, only basic checks are applied, improving compatibility.
config BT_CTRL_RUN_IN_FLASH_ONLY
bool "Reduce BLE IRAM usage (READ DOCS FIRST) (EXPERIMENTAL)"
default n
help
Move most IRAM into flash. This will increase the usage of flash and reduce ble performance.
Because the code is moved to the flash, the execution speed of the code is reduced.
To have a small impact on performance, you need to enable flash suspend (SPI_FLASH_AUTO_SUSPEND).

50
components/bt/controller/esp32c6/bt.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -131,6 +131,10 @@ extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
extern void r_ble_rtc_wake_up_state_clr(void);
extern int os_msys_init(void);
extern void os_msys_deinit(void);
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
extern void r_ble_ll_scan_start_time_init_compensation(uint32_t init_compensation);
extern void r_priv_sdk_config_insert_proc_time_set(uint16_t insert_proc_time);
#endif // CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
extern sleep_retention_entries_config_t *r_esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void r_esp_ble_set_wakeup_overhead(uint32_t overhead);
@ -495,11 +499,13 @@ static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer
return rc;
}
static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
void *arg, void **ret_handle_in)
static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in)
{
int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler,
arg, (intr_handle_t *)ret_handle_in);
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
int rc = esp_intr_alloc(source, flags, handler, arg, (intr_handle_t *)ret_handle_in);
#else
int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler, arg, (intr_handle_t *)ret_handle_in);
#endif
return rc;
}
@ -1043,6 +1049,10 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
coex_enable();
#endif // CONFIG_SW_COEXIST_ENABLE
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
r_ble_ll_scan_start_time_init_compensation(500);
r_priv_sdk_config_insert_proc_time_set(500);
#endif // CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
if (r_ble_controller_enable(mode) != 0) {
ret = ESP_FAIL;
goto error;
@ -1203,12 +1213,20 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
switch (power_type) {
case ESP_BLE_PWR_TYPE_DEFAULT:
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_ADV:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_ADV, 0xFF, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_SCAN:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
case ESP_BLE_PWR_TYPE_CONN_HDL2:
@ -1236,9 +1254,13 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
esp_err_t stat = ESP_FAIL;
switch (power_type) {
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
@ -1261,11 +1283,15 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
int tx_level = 0;
switch (power_type) {
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_PWR_TYPE_ADV:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_ADV, 0);
break;
case ESP_BLE_PWR_TYPE_SCAN:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0);
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
case ESP_BLE_PWR_TYPE_CONN_HDL2:
@ -1295,9 +1321,11 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
switch (power_type) {
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:

8
components/bt/controller/esp32h2/Kconfig.in
View File

@ -698,3 +698,11 @@ config BT_LE_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS
Enabling this option will add stricter verification of the Access Address in the CONNECT_IND PDU.
This improves security by ensuring that only connection requests with valid Access Addresses are accepted.
If disabled, only basic checks are applied, improving compatibility.
config BT_CTRL_RUN_IN_FLASH_ONLY
bool "Reduce BLE IRAM usage (READ DOCS FIRST) (EXPERIMENTAL)"
default n
help
Move most IRAM into flash. This will increase the usage of flash and reduce ble performance.
Because the code is moved to the flash, the execution speed of the code is reduced.
To have a small impact on performance, you need to enable flash suspend (SPI_FLASH_AUTO_SUSPEND).

48
components/bt/controller/esp32h2/bt.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -125,6 +125,10 @@ extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
extern void r_ble_rtc_wake_up_state_clr(void);
extern int os_msys_init(void);
extern void os_msys_deinit(void);
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
extern void r_ble_ll_scan_start_time_init_compensation(uint32_t init_compensation);
extern void r_priv_sdk_config_insert_proc_time_set(uint16_t insert_proc_time);
#endif // CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
extern sleep_retention_entries_config_t *r_esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
extern void r_esp_ble_set_wakeup_overhead(uint32_t overhead);
@ -495,8 +499,11 @@ static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer
static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
void *arg, void **ret_handle_in)
{
int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler,
arg, (intr_handle_t *)ret_handle_in);
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
int rc = esp_intr_alloc(source, flags, handler, arg, (intr_handle_t *)ret_handle_in);
#else
int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler, arg, (intr_handle_t *)ret_handle_in);
#endif
return rc;
}
@ -1020,7 +1027,10 @@ esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
#if CONFIG_SW_COEXIST_ENABLE
coex_enable();
#endif // CONFIG_SW_COEXIST_ENABLE
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
r_ble_ll_scan_start_time_init_compensation(500);
r_priv_sdk_config_insert_proc_time_set(500);
#endif // CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
if (r_ble_controller_enable(mode) != 0) {
ret = ESP_FAIL;
goto error;
@ -1181,12 +1191,20 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
switch (power_type) {
case ESP_BLE_PWR_TYPE_DEFAULT:
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_ADV:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_ADV, 0xFF, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_SCAN:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
case ESP_BLE_PWR_TYPE_CONN_HDL2:
@ -1214,9 +1232,13 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type
esp_err_t stat = ESP_FAIL;
switch (power_type) {
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
if (r_ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
@ -1239,11 +1261,15 @@ esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
int tx_level = 0;
switch (power_type) {
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_PWR_TYPE_ADV:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_ADV, 0);
break;
case ESP_BLE_PWR_TYPE_SCAN:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0);
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
case ESP_BLE_PWR_TYPE_CONN_HDL2:
@ -1273,9 +1299,11 @@ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t po
switch (power_type) {
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
tx_level = r_ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_SCAN, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:

2
components/bt/controller/lib_esp32c2/esp32c2-bt-lib

@ -1 +1 @@
Subproject commit 339d66ea3dce6e97bee6ce41aa3d06761efcaad2
Subproject commit c04f6f7c4958b7343acf1b1d0c3cc27a48b177a0

2
components/bt/controller/lib_esp32c6/esp32c6-bt-lib

@ -1 +1 @@
Subproject commit 2c3b919de82278768a98f66c02c63a148026a613
Subproject commit 04332117afd5d5ed479560f1191a816eceba34a2

2
components/bt/controller/lib_esp32h2/esp32h2-bt-lib

@ -1 +1 @@
Subproject commit 59c26f308e18809cc02351febcbecad542a365c9
Subproject commit f7ae7f056be96586e0915d9744d6233dc3ee5eef

14
components/bt/linker_esp_ble_controller.lf
View File

@ -1,8 +1,21 @@
[sections:bt_iram_text]
entries:
.iram1+
[sections:high_perf_iram_text]
entries:
.high_perf_code_iram1+
[scheme:bt_default]
entries:
bt_bss -> dram0_bss
bt_common -> dram0_bss
data -> dram0_data
high_perf_iram_text -> iram0_text
if BT_CTRL_RUN_IN_FLASH_ONLY = y:
bt_iram_text -> flash_text
else:
bt_iram_text -> iram0_text
# For the following fragments, order matters for
# 'ALIGN(4) ALIGN(4, post) SURROUND(sym)', which generates:
@ -27,7 +40,6 @@ entries:
bt_common -> dram0_bss ALIGN(4) ALIGN(4, post) SURROUND(bt_common),
data -> dram0_data ALIGN(4) ALIGN(4, post) SURROUND(bt_data)
[mapping:ble_app]
archive: libble_app.a
entries:

6
components/esp_rom/esp32c2/ld/esp32c2.rom.ble-eco4.ld
View File

@ -192,7 +192,7 @@ r_ble_ll_conn_chk_csm_flags = 0x40000d48;
r_ble_ll_conn_chk_phy_upd_start = 0x40000d4c;
r_ble_ll_conn_comp_event_send = 0x40000d50;
r_ble_ll_conn_connect_ind_pdu_make = 0x40000d54;
r_ble_ll_conn_create = 0x40000d58;
//r_ble_ll_conn_create = 0x40000d58;
r_ble_ll_conn_create_cancel = 0x40000d5c;
r_ble_ll_conn_created = 0x40000d60;
r_ble_ll_conn_cth_flow_enable = 0x40000d64;
@ -322,7 +322,7 @@ r_ble_ll_event_dbuf_overflow = 0x40000f50;
r_ble_ll_event_send = 0x40000f54;
r_ble_ll_event_tx_pkt = 0x40000f58;
r_ble_ll_ext_adv_phy_mode_to_local_phy = 0x40000f5c;
r_ble_ll_ext_conn_create = 0x40000f60;
//r_ble_ll_ext_conn_create = 0x40000f60;
r_ble_ll_ext_scan_parse_adv_info = 0x40000f64;
r_ble_ll_ext_scan_parse_aux_ptr = 0x40000f68;
r_ble_ll_flush_pkt_queue = 0x40000f6c;
@ -706,7 +706,7 @@ r_ble_lll_conn_process_in_isr = 0x40001550;
r_ble_lll_conn_recv_ack = 0x40001554;
r_ble_lll_conn_recv_valid_packet = 0x40001558;
r_ble_lll_conn_reset_pending_sched = 0x4000155c;
r_ble_lll_conn_rx_pkt_isr = 0x40001560;
//r_ble_lll_conn_rx_pkt_isr = 0x40001560;
r_ble_lll_conn_sched_next_anchor = 0x40001564;
r_ble_lll_conn_sched_next_event = 0x40001568;
r_ble_lll_conn_set_slave_flow_control = 0x4000156c;

2
components/esp_rom/esp32c2/ld/esp32c2.rom.ble.ld
View File

@ -611,7 +611,7 @@ r_ble_lll_per_adv_coex_dpc_update_on_data_updated = 0x40001638;
r_ble_lll_per_adv_coex_dpc_update_on_scheduled = 0x4000163c;
r_ble_lll_per_adv_coex_dpc_update_on_start = 0x40001640;
r_ble_lll_rfmgmt_is_enabled = 0x40001660;
r_ble_lll_rfmgmt_release = 0x40001664;
//r_ble_lll_rfmgmt_release = 0x40001664;
r_ble_lll_rfmgmt_scan_changed = 0x40001670;
r_ble_lll_rfmgmt_sched_changed = 0x40001674;
r_ble_lll_rfmgmt_set_sleep_cb = 0x40001678;