2631 Commits

Author SHA1 Message Date
Li Shuai
88c1c9c344 change(esp_hw_support): fix some sleep retention build error 2025-02-13 16:33:30 +08:00
Li Shuai
af5a9c87cd change(soc): define sleep retention module total number to 64 for esp32p4 2025-02-13 16:33:30 +08:00
Li Shuai
61b7a971d3 change(soc): add sleep retention module total number definition 2025-02-13 15:17:55 +08:00
Li Shuai
c60d991c28 feat(esp_hw_support): extend sleep retention module bitmap bit width 2025-02-13 11:28:25 +08:00
Song Ruo Jing
6975924104 feat(heap): add a MALLOC_CAP_SIMD flag
MALLOC_CAP_SIMD can be used to allocate memory to be used for SIMD instructions
2025-02-08 16:29:36 +08:00
Tomas Rezucha
fc39a5b836 refactor(usb): Include supported PHYs information in SoC 2025-01-27 08:07:59 +01:00
Tomas Rezucha
55f5f29517 fix(usb): Fixed missing GPIO drive capability on ESP32-P4
All USB PHYs that share their IOs with GPIOs must set
the GPIO's drive capability to maximum.
2025-01-27 08:07:46 +01:00
Mahavir Jain
e1a023e13d Merge branch 'feat/support_aes_pseudo_round_func_in_esp32h2_eco5_v5.3' into 'release/v5.3'
Support AES and XTS-AES's pseudo round function in ESP32H2-ECO5 (v5.3)

See merge request espressif/esp-idf!36464
2025-01-24 14:40:00 +08:00
morris
8f20eac2df Merge branch 'feat/spi_std_timing_and_bit_trans_v5.3' into 'release/v5.3'
feat(driver_spi): support adjust master rx to standard timing (v5.3)

See merge request espressif/esp-idf!36400
2025-01-24 10:24:14 +08:00
harshal.patil
ae4e693cfc
feat(hal/spi_flash_encrypted): Enable pseudo rounds function during XTS-AES operations 2025-01-23 14:06:16 +05:30
harshal.patil
8d30077744
feat(hal/aes): Enable pseudo rounds function during AES operations 2025-01-23 14:06:16 +05:30
Konstantin Kondrashov
ae7857416e feat(espefuse): Adds efuses for esp32h2 eco5
- Support efuses that are not present in the main efuse table
2025-01-23 13:29:36 +08:00
Jiang Jiang Jian
427304105d Merge branch 'bugfix/clic_register_issues_v5.3' into 'release/v5.3'
fix(soc): fix clic register definition and description (backport v5.3)

See merge request espressif/esp-idf!35589
2025-01-20 20:20:36 +08:00
morris
8ec35b4d75 Merge branch 'refactor/improve_the_compatible_method_on_h2_v5.3' into 'release/v5.3'
refactor(lpperi): improve compatibility solution (v5.3)

See merge request espressif/esp-idf!36421
2025-01-17 12:40:00 +08:00
wanckl
e1cc1e2568 feat(driver_spi): support using SPI_DEVICE_STD_TIMING to adjust master rx in standard timing 2025-01-17 10:48:52 +08:00
Tomas Rezucha
005ae0554a refactor(usb/phy): Do not use deprecated variables in usb_phy 2025-01-16 16:39:59 +08:00
laokaiyao
2abf73d94c refactor(lpperi): improve compatibility solution 2025-01-16 10:18:02 +08:00
laokaiyao
90457a9a4e refactor(lpperi): compatible refactor for H2 ECO5 2025-01-13 14:39:33 +08:00
wanckl
65d3591cf7 fix(pmu): c61 and h2 update pmu_icg_mapping.h 2025-01-10 10:20:20 +08:00
Michael (XIAO Xufeng)
4c422b18ff Merge branch 'bugfix/warn_rc32k_use_in_kconfig_v5.3' into 'release/v5.3'
fix(clk): add an inevitable kconfig option to be selected to use rc32k (v5.3)

See merge request espressif/esp-idf!35965
2025-01-07 15:50:42 +08:00
C.S.M
056f0bdb0e fix(i2c_slave): Support 10-bit address on esp32 2024-12-30 13:41:01 +08:00
Song Ruo Jing
a2178b0fa2 fix(clk): add an inevitable kconfig option to be selected to use rc32k 2024-12-25 20:01:37 +08:00
gaoxiaojie
da028bce66 fix(soc): fix clic register define and add description 2024-12-12 09:53:18 +08:00
morris
2c9ab21629 Merge branch 'refactor/fine_tune_dphy_pll_v5.3' into 'release/v5.3'
feat(mipi): fine tune DPHY PLL clock (v5.3)

See merge request espressif/esp-idf!35292
2024-12-10 11:36:03 +08:00
Jiang Jiang Jian
42ef2887f4 Merge branch 'fix/fix_regdma_wait_node_issue_v5.3' into 'release/v5.3'
fix(esp_driver_gptimer): do gptimer retention by timer unit rather than timer group (v5.3)

See merge request espressif/esp-idf!35358
2024-12-09 15:27:24 +08:00
morris
e3a628e1db Merge branch 'feature/efuse_s3_adds_psram_cap_bit_v5.3' into 'release/v5.3'
feat(efuse): Adds 3 bit for PSRAM_CAP efuse field (v5.3)

See merge request espressif/esp-idf!35121
2024-12-09 10:20:57 +08:00
morris
3946fbb142 Merge branch 'feat/dynamic_usb_hal_backport_v5.3' into 'release/v5.3'
feat(hal/usb): Make USB-DWC HAL&LL configuration independent backport v5.3

See merge request espressif/esp-idf!34811
2024-12-07 23:19:56 +08:00
morris
75a9b80bd4 Merge branch 'fix/spi_enable_p4_c5_test_v5.3' into 'release/v5.3'
fix(driver_spi): enable p4 test (v5.3)

See merge request espressif/esp-idf!34281
2024-12-06 17:03:38 +08:00
morris
90399d0d5c Merge branch 'feat/parlio_sleep_retention_v5.3' into 'release/v5.3'
fix(parlio): fix spelling error in reg_base.h (v5.3)

See merge request espressif/esp-idf!34736
2024-12-06 16:14:05 +08:00
morris
1503d0f80f Merge branch 'feat/mcpwm_sleep_rentention_v5.3' into 'release/v5.3'
fix(mcpwm): fix mcpwm register offset on p4 (v5.3)

See merge request espressif/esp-idf!34803
2024-12-06 16:13:28 +08:00
wuzhenghui
1a23d3cd53
fix(esp_driver_gptimer): do gptimer retention by timer unit rather than timer group 2024-12-03 10:44:56 +08:00
wuzhenghui
97d9f01134
fix(esp_hw_support): remove p4 wdt retention on entry2 2024-12-02 17:44:53 +08:00
Li Shuai
2c31e2b118
fix(esp_hw_support): fix the issue of regdma wait node to immediately return to done 2024-12-02 17:44:48 +08:00
morris
6f992acf31 feat(mipi): fine tune DPHY PLL clock 2024-11-29 10:04:38 +08:00
Konstantin Kondrashov
524dbd1fee feat(efuse): Adds 3 bit for PSRAM_CAP efuse field 2024-11-28 17:04:53 +02:00
Konstantin Kondrashov
a593f41b25 feat(efuse): Adds efuse ADC calib data for ESP32-C61 2024-11-25 17:05:48 +02:00
Tomas Rezucha
177679b74e feat(hal/usb): Make USB-DWC HAL&LL configuration independent
Previously, we included symbols from soc/usb_dwc_cfg.h and configured
the HAL and LL according to it. Now we get the configuration in runtime
from USB-DWC registers.

Added missing definition for USB FS peripheral on ESP32-P4.
2024-11-22 17:32:22 +08:00
Tomas Rezucha
7019a9f61c feat(soc/usb): Add USB related changes to soc_caps and usb_dwc_periph
This commit changes the following:

- Add types and data structures indicating the available USB controllers
for each target.
2024-11-22 17:32:22 +08:00
Konstantin Kondrashov
427e8e5fe4 feat(efuse): Adds efuse ADC calib data for ESP32-C5 2024-11-22 08:10:15 +02:00
Konstantin Kondrashov
b4ebb04184 feat(efuse): Adds efuse ADC calib data for ESP32-P4 2024-11-22 08:10:15 +02:00
Chen Jichang
0526a285ed fix(mcpwm): fix mcpwm register offset on p4 2024-11-19 17:49:39 +08:00
Chen Jichang
6a22acc02f fix(parlio): fix spelling error in reg_base.h 2024-11-19 11:00:22 +08:00
wanlei
9aeaf03f95 feat(spi_master): add test clock src and config validation 2024-11-15 14:59:49 +08:00
wanckl
b5eca3a8a1 fix(driver_spi): enable p4 multi dut test 2024-11-15 14:59:49 +08:00
Jiang Jiang Jian
f3e99aa4e7 Merge branch 'fix/fix_top_domain_pd_v5.3' into 'release/v5.3'
fix(esp_pm): move clock module out of TOP_DOMAIN_PERIPHERALS_BM (v5.3)

See merge request espressif/esp-idf!34881
2024-11-15 11:13:54 +08:00
Jiang Jiang Jian
c5a3c7e78f Merge branch 'ci/backport_i2s_ci_fix_to_v5.3' into 'release/v5.3'
ci(i2s&parlio): backport i2s and parlio ci fix (v5.3)

See merge request espressif/esp-idf!34587
2024-11-14 19:00:39 +08:00
Jiang Jiang Jian
6b2ac26da3 Merge branch 'feature/support_apll_on_p4_v5.3' into 'release/v5.3'
feat(clock): support apll clock on p4 (v5.3)

See merge request espressif/esp-idf!33214
2024-11-14 18:54:59 +08:00
wuzhenghui
06fa736f84
fix(esp_pm): move clock module out of TOP_DOMAIN_PERIPHERALS_BM 2024-11-13 16:12:02 +08:00
C.S.M
4049f2b5fb feat(bod): Update bod threshold on esp32p4-eco2 2024-11-01 15:31:02 +08:00
laokaiyao
035f2f8280 ci(parlio_rx): enable logic analyzer example test 2024-11-01 11:18:59 +08:00