Jiang Jiang Jian
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0ba53566fa
|
Merge branch 'fix/fix_s2_s3_rtc_iomux_clock_management_v5.4' into 'release/v5.4'
fix(esp_hw_support): fix esp32s2/esp32s3 RTC IOMUX clock management (v5.4)
See merge request espressif/esp-idf!37145
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2025-02-21 12:19:07 +08:00 |
|
Jiang Jiang Jian
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aa97a0fc3c
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Merge branch 'bugfix/fix_i2s_std_initializer_order_for_cpp_compiler_v5.4' into 'release/v5.4'
fix(i2s): fixed i2s_std initializer order for cpp compiler (v5.4)
See merge request espressif/esp-idf!37047
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2025-02-21 11:48:58 +08:00 |
|
wuzhenghui
|
8e6ec50bcc
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fix(esp_hw_support): fix esp32s2/esp32s3 RTC IOMUX clock management
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2025-02-21 09:50:42 +08:00 |
|
laokaiyao
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b18506da8b
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fix(i2s): fixed the pdm2pcm capability on c5 and c61
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2025-02-20 21:41:33 +08:00 |
|
laokaiyao
|
202b74eca8
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refactor(ecdsa): rely on efuse to get chip revision
|
2025-02-20 21:03:10 +08:00 |
|
Aditya Patwardhan
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2ff128ebf4
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fix(soc): Fixed ECDSA register compatibility
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2025-02-20 21:03:10 +08:00 |
|
Mahavir Jain
|
748d29b5ad
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feat(ecc): enable ECC constant time mode for ESP32-H2 ECO5
|
2025-02-20 21:03:10 +08:00 |
|
Jiang Jiang Jian
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f9ae8dfb04
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Merge branch 'fix/esp32p4_lightsleep_fixes_v5.4' into 'release/v5.4'
fix(esp_hw_support): some fixes of esp32p4 lightsleep retention & power switch process (v5.4)
See merge request espressif/esp-idf!37086
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2025-02-20 13:48:50 +08:00 |
|
Jiang Jiang Jian
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69bd12d792
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Merge branch 'fix/backport_wifi_fixes_v5.4' into 'release/v5.4'
fix(wifi): backport some fixes to v5.4
See merge request espressif/esp-idf!37008
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2025-02-19 21:59:20 +08:00 |
|
wuzhenghui
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228e74e06c
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feat(esp_hw_support): do esp32p4 l1 cache invalidate by regdma
|
2025-02-19 14:32:04 +08:00 |
|
wuzhenghui
|
f3cc52d234
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feat(esp_hw_support): do esp32p4 l1&l2 cache regs retention by regdma
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2025-02-19 14:32:00 +08:00 |
|
Jiang Jiang Jian
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da3f2ea5ce
|
Merge branch 'fix/add_sleep_duration_check_for_timer_wakeup_v5.4' into 'release/v5.4'
fix(esp_hw_support): add timer wakeup sleep duration check (v5.4)
See merge request espressif/esp-idf!37010
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2025-02-19 13:48:17 +08:00 |
|
Jiang Jiang Jian
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c7c332761a
|
Merge branch 'fix/disable_wfe_feature_for_e906_chips_v5.4' into 'release/v5.4'
change(esp_hw_support): disable CPU wait-for-event mode on cpu start (v5.4)
See merge request espressif/esp-idf!37000
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2025-02-19 13:48:02 +08:00 |
|
Nachiket Kukade
|
597cfcb4f3
|
feat(wifi): Enable Wi-Fi Aware (NAN) for ESP32C5 and ESP32C61
|
2025-02-19 10:48:43 +08:00 |
|
wuzhenghui
|
95fb085fe3
|
fix(esp_hw_support): add timer wakeup sleep duration check
Closes https://github.com/espressif/esp-idf/issues/15255
|
2025-02-18 19:21:57 +08:00 |
|
wuzhenghui
|
1e11f287e1
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change(esp_hw_support): disable CPU wait-for-event mode on cpu start
|
2025-02-18 19:21:09 +08:00 |
|
Li Shuai
|
61fb531471
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fix(esp_hw_support): fix the issue of mmu table content loss due to default sd signal
|
2025-02-18 10:39:50 +08:00 |
|
morris
|
7d07fe5047
|
Merge branch 'feat/async_memcpy_any_alignment_v5.4' into 'release/v5.4'
async memcpy destination address doesn't have to be cache aligned (v5.4)
See merge request espressif/esp-idf!36633
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2025-02-13 10:36:23 +08:00 |
|
morris
|
952f1aa2b8
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Merge branch 'feature/malloc_cap_simd_flag_v5.4' into 'release/v5.4'
feat(heap): add a MALLOC_CAP_SIMD flag (v5.4)
See merge request espressif/esp-idf!36649
|
2025-02-11 17:42:09 +08:00 |
|
morris
|
5c0611cb3b
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feat(async_memcpy): support rx buffer unaligned to cache line size
|
2025-02-11 13:46:12 +08:00 |
|
Jiang Jiang Jian
|
5436955fd9
|
Merge branch 'bugfix/esp32c5_eco1_wifi_ps_v5.4' into 'release/v5.4'
backport v5.4: fix some wifi power save issues and optimize phy sleep for esp32c5 eco1 and beta5
See merge request espressif/esp-idf!36561
|
2025-02-10 15:22:59 +08:00 |
|
Song Ruo Jing
|
6cb64d7025
|
feat(heap): add a MALLOC_CAP_SIMD flag
MALLOC_CAP_SIMD can be used to allocate memory to be used for SIMD instructions
|
2025-02-08 16:28:41 +08:00 |
|
Tomas Rezucha
|
cd7fab3bdc
|
refactor(usb): Include supported PHYs information in SoC
|
2025-01-27 08:08:02 +01:00 |
|
Tomas Rezucha
|
d12312bf76
|
fix(usb): Fixed missing GPIO drive capability on ESP32-P4
All USB PHYs that share their IOs with GPIOs must set
the GPIO's drive capability to maximum.
|
2025-01-27 08:07:42 +01:00 |
|
Li Shuai
|
9e1b5eb173
|
change(soc): fix idf_size error caused by ldgen to run success for ci pipeline
|
2025-01-26 14:54:33 +08:00 |
|
Mahavir Jain
|
649f9a72ae
|
Merge branch 'feat/support_aes_pseudo_round_func_in_esp32h2_eco5_v5.4' into 'release/v5.4'
Support AES and XTS-AES's pseudo round function in ESP32H2-ECO5 (v5.4)
See merge request espressif/esp-idf!36463
|
2025-01-23 13:20:20 +08:00 |
|
morris
|
206b3a22ad
|
Merge branch 'feat/spi_std_timing_and_bit_trans_v5.4' into 'release/v5.4'
feat(driver_spi): support adjust master rx to standard timing (v5.4)
See merge request espressif/esp-idf!36399
|
2025-01-23 10:38:07 +08:00 |
|
Jiang Jiang Jian
|
f4721d8170
|
Merge branch 'bugfix/clic_register_issues_v5.4' into 'release/v5.4'
fix(soc): fix clic register definition and description (backport v5.4)
See merge request espressif/esp-idf!35590
|
2025-01-21 15:52:58 +08:00 |
|
harshal.patil
|
e3acb360e3
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feat(hal/spi_flash_encrypted): Enable pseudo rounds function during XTS-AES operations
|
2025-01-21 12:28:23 +05:30 |
|
harshal.patil
|
7d803e661e
|
feat(hal/aes): Enable pseudo rounds function during AES operations
|
2025-01-21 12:28:23 +05:30 |
|
morris
|
cad9cc2ab2
|
Merge branch 'refactor/improve_the_compatible_method_on_h2_v5.4' into 'release/v5.4'
refactor(lpperi): improve compatibility solution (v5.4)
See merge request espressif/esp-idf!36422
|
2025-01-17 16:56:56 +08:00 |
|
gaoxiaojie
|
58df18a361
|
fix(soc): fix clic register define and add description
|
2025-01-17 11:40:50 +08:00 |
|
Jiang Jiang Jian
|
74896d4187
|
Merge branch 'feature/efuse_update_for_esp32h2_eco5_v5.4' into 'release/v5.4'
feat(efuse): Adds efuses for esp32h2 eco5 (v5.4)
See merge request espressif/esp-idf!36238
|
2025-01-17 11:39:31 +08:00 |
|
wanckl
|
6c6454357c
|
feat(driver_spi): support using SPI_DEVICE_STD_TIMING to adjust master rx in standard timing
|
2025-01-17 10:51:47 +08:00 |
|
morris
|
9fb37219a2
|
Merge branch 'refactor/cleanup_usb_phy_v5.4' into 'release/v5.4'
Cleanup USB PHY (backport v5.4)
See merge request espressif/esp-idf!36236
|
2025-01-16 16:53:31 +08:00 |
|
laokaiyao
|
889537960e
|
refactor(lpperi): improve compatibility solution
|
2025-01-16 10:21:17 +08:00 |
|
laokaiyao
|
25f64d9cbd
|
refactor(lpperi): compatible refactor for H2 ECO5
|
2025-01-13 14:36:00 +08:00 |
|
Konstantin Kondrashov
|
a98c20d4e0
|
feat(espefuse): Adds efuses for esp32h2 eco5
- Support efuses that are not present in the main efuse table
|
2025-01-08 11:16:49 +02:00 |
|
Tomas Rezucha
|
b78bcaea36
|
refactor(usb/phy): Do not use deprecated variables in usb_phy
|
2025-01-08 09:26:41 +01:00 |
|
morris
|
e456840f2c
|
Merge branch 'feat/mcpwm_sleep_retention_support_p4_v5.4' into 'release/v5.4'
feat(mcpwm): support mcpwm sleep retention on p4 (v5.4)
See merge request espressif/esp-idf!35342
|
2025-01-07 10:42:39 +08:00 |
|
morris
|
92208b309d
|
Merge branch 'feat/support_step_notify_on_h2eco5_v5.4' into 'release/v5.4'
feat(pcnt): support step_notify on esp32h2 eco5 (v5.4)
See merge request espressif/esp-idf!35620
|
2025-01-07 10:38:10 +08:00 |
|
morris
|
c670044eab
|
Merge branch 'feature/uart_sleep_retention_support_c5_c61_v5.4' into 'release/v5.4'
feat(uart): support uart sleep retention on C5/C61 (v5.4)
See merge request espressif/esp-idf!35400
|
2025-01-07 10:29:23 +08:00 |
|
morris
|
446aa359d3
|
Merge branch 'feature/efuse_s3_adds_psram_cap_bit_v5.4' into 'release/v5.4'
feat(efuse): Adds 3 bit for PSRAM_CAP efuse field (v5.4)
See merge request espressif/esp-idf!35120
|
2025-01-06 15:02:01 +08:00 |
|
morris
|
da06959166
|
Merge branch 'bugfix/uart_8_16_bit_access_v5.4' into 'release/v5.4'
fix(uart): fix 8/16-bit uart register access (v5.4)
See merge request espressif/esp-idf!35958
|
2025-01-06 14:59:09 +08:00 |
|
morris
|
fd31502ca7
|
Merge branch 'fix/ble_i2c_v5.4' into 'release/v5.4'
fix(i2c_slave): Support 10-bit address on esp32 (backport v5.4)
See merge request espressif/esp-idf!36055
|
2025-01-06 14:53:48 +08:00 |
|
morris
|
c02a6fc523
|
Merge branch 'bugfix/gdma_burst_config_esp32c5_v5.4' into 'release/v5.4'
fix(gdma): burst size should be configurable on esp32c5 (v5.4)
See merge request espressif/esp-idf!35363
|
2025-01-06 13:20:35 +08:00 |
|
morris
|
cd1ce6164b
|
Merge branch 'refactor/fine_tune_dphy_pll_v5.4' into 'release/v5.4'
feat(mipi): fine tune DPHY PLL clock (v5.4)
See merge request espressif/esp-idf!35291
|
2025-01-06 13:20:01 +08:00 |
|
C.S.M
|
f29110eee7
|
fix(i2c_slave): Support 10-bit address on esp32
|
2024-12-30 13:49:51 +08:00 |
|
Song Ruo Jing
|
7167b04e6e
|
fix(uart): fix 8/16-bit uart register access
|
2024-12-25 15:32:06 +08:00 |
|
Chen Jichang
|
3779757cd3
|
feat(pcnt): support step_notify on esp32h2 eco5
|
2024-12-12 19:40:20 +08:00 |
|