1001 Commits

Author SHA1 Message Date
Armando
df202585e6 refactor(rng): refactor to use hal/ll apis for h2 2025-02-13 09:40:05 +08:00
Mahavir Jain
870a1846b1 Merge branch 'feature/esp_tee_flash_prot_spi1' into 'master'
feat(esp_tee): Add support for flash memory isolation and protection (SPI1)

Closes IDF-10481, IDF-10083, and IDF-8915

See merge request espressif/esp-idf!36454
2025-02-12 18:35:49 +08:00
Chen Ji Chang
9342b3fba1 Merge branch 'feat/h4_introduce_step1_add_target' into 'master'
feat(esp32h4): introduce target esp32h4(stage 1)

See merge request espressif/esp-idf!36780
2025-02-11 18:11:08 +08:00
Laukik Hase
c23714f775
feat(esp_tee): Add support for flash memory isolation and protection (SPI1) 2025-02-11 12:30:05 +05:30
Mahavir Jain
f428a1e784 Merge branch 'bugfix/coverity_issues' into 'master'
Fix some coverity reported issues

Closes IDF-12188, IDF-12197, and IDF-12193

See merge request espressif/esp-idf!36719
2025-02-10 22:05:30 +08:00
Chen Jichang
6f83f39dce feat(esp32h4): introduce target esp32h4(stage 1) 2025-02-08 17:07:44 +08:00
gaoxu
5ef4f20778 feat(esp32h21): disable unsupported build test 2025-02-06 15:47:51 +08:00
Mahavir Jain
46965784b8
fix(bootloader_support): coverity reported warning 2025-02-04 11:41:17 +05:30
harshal.patil
f6be421a48
fix(bootloader_support): Enable pseudo round function in flash enc release mode for H2-ECO5 2025-01-21 12:21:42 +05:30
laokaiyao
692ca37edf refactor(lpperi): improve compatibility solution 2025-01-15 17:12:59 +08:00
Guillaume Souchere
4d11fe5847 Merge branch 'fix/memory-utils-unused-var' into 'master'
fix(esp_hw_support): Unused variables in memory_utils functions

See merge request espressif/esp-idf!36295
2025-01-15 14:05:01 +08:00
laokaiyao
aac16530a0 refactor(lpperi): compatible refactor for H2 ECO5 2025-01-10 18:47:43 +08:00
Guillaume Souchere
e2b7cce13c fix(esp_hw_support): Unused variables in memory_utils functions 2025-01-10 11:05:50 +01:00
Armando (Dou Yiwen)
3aba0ff704 Merge branch 'refactor/mspi_ll' into 'master'
mspi: rename mspi_timing_tuning_ll.h to mspi_ll.h

Closes IDF-11918

See merge request espressif/esp-idf!36039
2025-01-08 16:29:28 +08:00
Mahavir Jain
4f416abfe2 Merge branch 'feature/esp_tee_flash_prot' into 'master'
feat(esp_tee): Support for flash memory isolation and protection (SPI0)

See merge request espressif/esp-idf!35486
2025-01-08 12:46:17 +08:00
Armando
14b5db0e87 refactor(mspi): rename to mspi_ll.h 2025-01-07 16:16:06 +08:00
Gao Xu
0974d66680 Merge branch 'feature/esp32c5_p4_adc_calibration' into 'master'
Feature/esp32 p4 adc calibration

Closes IDF-7467, IDF-9573, and IDFGH-13617

See merge request espressif/esp-idf!35060
2025-01-07 10:18:11 +08:00
gaoxu
1b49a1674e feat(adc): support ADC calibration on ESP32P4 2025-01-06 11:04:29 +08:00
Laukik Hase
1499c65754
feat(esp_tee): Add support for flash memory isolation and protection (SPI0) 2025-01-03 11:44:01 +05:30
gaoxu
d7f7f0ad24 fix(adc): fix adc1 error after bootloader random 2024-12-31 11:28:28 +08:00
gaoxu
25731d0c1e feat(esp32h21): finnal introduce hello world support 2024-12-30 20:14:40 +08:00
C.S.M
d448c4ed05 feat(spi_flash): Add 32M flash support on esp32c5 2024-12-25 16:06:43 +08:00
Armando
b963c0f013 feat(adc): supported adc calibration on esp32c5 2024-12-19 12:12:30 +08:00
Gao Xu
7ff0a07d3d Merge branch 'feat/h21_introduce_step2_3' into 'master'
feat(esp32h21): add soc register header files (stage 2/8, part 3/3)

See merge request espressif/esp-idf!35492
2024-12-14 18:58:14 +08:00
gaoxu
07862cf93e feat(esp32h21): fix soc file and add soc files from verification branch (stage 2-3) 2024-12-14 17:08:19 +08:00
Guillaume Souchere
c80ba4023d Merge branch 'fix/heap-allocate-in-rtc-iram' into 'master'
fix(heap): MALLOC_CAP_EXEC does not allocate in RTC IRAM

Closes IDFGH-14012

See merge request espressif/esp-idf!34750
2024-12-12 18:51:52 +08:00
Konstantin Kondrashov
1937ef2b13 Merge branch 'fix/fix_coverity_issues' into 'master'
fix(system): Fixes some false-positive coverity issues

Closes IDF-11768, IDF-11760, and IDF-11740

See merge request espressif/esp-idf!35288
2024-12-12 15:47:40 +08:00
Armando
6528ab5971 refactor(mspi): refactor mspi clock src settings 2024-12-11 14:46:07 +08:00
Guillaume Souchere
a995a5339b fix(heap): MALLOC_CAP_EXEC does not allocate in RTC IRAM
This commit fixes the issue when trying to allocate memory
with the MALLOC_CAP_EXEC in RTC memory. Prior to the fix,
the heap allocator was returning an address in RTC DRAM.

To fix this issue:
- modified memory_layout.c of the concerned targets to fill the iram_address
field in the rtc entry of the soc_memory_region array properly.
- modified heap component  related functions to return IRAM address when
an allocation in RTC memory with MALLOC_CAP_EXEC is requested.

Closes https://github.com/espressif/esp-idf/issues/14835
2024-12-09 09:34:56 +01:00
Konstantin Kondrashov
ad38ba16dd fix(bootloader_support): Fix overflowed constant in process_segment 2024-12-05 15:10:27 +08:00
Konstantin Kondrashov
5a245a389b fix(bootloader_support): Fix overflowed constant in bootloader_sha256_flash_contents 2024-12-05 15:10:27 +08:00
C.S.M
2b1c27feb4 Merge branch 'feat/custom_flash_component' into 'master'
feature(spi_flash): New customized flash drivers framework, including bootloader📡

Closes IDFGH-8624

See merge request espressif/esp-idf!32774
2024-12-04 18:05:58 +08:00
Mahavir Jain
6a4a124d65 Merge branch 'feature/enable_rsa_based_secure_boot_for_c5_eco1' into 'master'
feat(bootloader_support): enabled RSA based secure boot scheme for ESP32C5 ECO1

Closes IDF-10453 and IDF-11441

See merge request espressif/esp-idf!35104
2024-12-04 18:00:34 +08:00
Mahavir Jain
30dbc69428 Merge branch 'feat/enable_pseudo_rounds_function_in_aes' into 'master'
Enable pseudo rounds function in AES and XTS-AES peripherals

Closes IDF-11305

See merge request espressif/esp-idf!33970
2024-12-04 13:48:09 +08:00
nilesh.kale
1e11340061 feat(bootloader_support): enabled RSA based secure boot scheme for ESP32C5 ECO1
This commit enabled RSA based secure boot scheme for ESP32C5 ECO1 module.
This update also adds a check to ensure the selected secure boot scheme is
valid for ECO0 modules.
2024-12-03 16:48:56 +05:30
Song Ruo Jing
547fa88a44 Merge branch 'bugfix/periph_clk_init_p4' into 'master'
fix(esp_system): hp periph clk should not be gated on core/system reset

Closes FCS-1638

See merge request espressif/esp-idf!35317
2024-12-03 15:45:28 +08:00
harshal.patil
f02dc64ce6
feat(bootloader_support): Permanently enable pseudo rounds function for XTS-AES during start-up 2024-12-03 11:17:54 +05:30
C.S.M
af31ec11f1 feat(spi_flash): New customise flash drivers framework, including bootloader 2024-12-02 17:48:40 +08:00
Laukik Hase
54c3f1bae4
feat(esp_tee): Support for ESP-TEE - bootloader_support component 2024-12-02 12:20:03 +05:30
Song Ruo Jing
7b852faf66 fix(esp_system): hp periph clk should not be gated on core/system reset 2024-11-29 21:42:06 +08:00
Armando (Dou Yiwen)
4cb18200d5 Merge branch 'feat/120m_flash_p4' into 'master'
flash: 120MHz timing tuning support on ESP32P4 (no merge now)

Closes IDF-11678

See merge request espressif/esp-idf!34995
2024-11-29 11:40:29 +08:00
Armando
5237876213 flash: fix qio 2nd bootloader cannot boot issue 2024-11-28 14:53:20 +08:00
zlq
225c0513f5 fix(H2):fix pll low temp bug 2024-11-27 17:52:34 +08:00
laokaiyao
13f7b55ae5 change(soc): update lp_ana_peri soc header on C5 2024-11-26 11:14:57 +08:00
Gao Xu
bbcfb35d67 Merge branch 'feat/h21_introduce_step1_target' into 'master'
feat(esp32h21): introduce target esp32h21 (stage 1/8) 😐

See merge request espressif/esp-idf!34542
2024-11-14 10:46:44 +08:00
Konstantin Kondrashov
52f14f344d feat(partition_table): Support recovery bootloader subtype 2024-11-12 17:22:53 +08:00
gaoxu
64bbb53b8f feat(esp32h21): introduce target esp32h21(stage 1) 2024-11-12 15:42:27 +08:00
Laukik Hase
19ab0213d9
change(bootloader): Map only the necessary length when fetching the app description struct 2024-11-07 18:13:53 +05:30
Mahavir Jain
4c6cda734d Merge branch 'feature/mmu_page_size_from_app_bin' into 'master'
feat(bootloader): add support to use MMU page size from app binary

Closes IDF-8209

See merge request espressif/esp-idf!33989
2024-11-06 17:14:31 +08:00
Mahavir Jain
afa46c06a8
feat(bootloader): add support to use MMU page size from app binary
For the SoCs that support configurable MMU page size, it is possible
that the bootloader and application are built with different MMU page
size configuration. This mismatch is not supported at the moment and
application verification fails (at bootup or during OTA update).

Configuring MMU page size helps to optimize the flash space by having
smaller alignment and padding (secure) requirements. Please note that
the MMU page size is tied with the flash size configuration at the
moment (`ESPTOOLPY_FLASHSIZE_XMB`).

This MR ensures that application verification happens using the MMU page
size configured in its binary header. Thus, bootloader and application
can now have different MMU page sizes and different combinations shall
be supported.
2024-11-05 20:37:18 +05:30